LETI INNOVATION DAYS 2019 | Sébastien KERDILES | 2019, June 28th
NANOSECOND LASER ANNEALING FOR 3D MONOLITHIC INTEGRATION LETI - - PowerPoint PPT Presentation
NANOSECOND LASER ANNEALING FOR 3D MONOLITHIC INTEGRATION LETI - - PowerPoint PPT Presentation
LETI INNOVATION DAYS NANOSECOND LASER ANNEALING FOR 3D MONOLITHIC INTEGRATION LETI INNOVATION DAYS 2019 | Sbastien KERDILES | 2019, June 28th 3D SEQUENTIAL INTEGRATION : THERMAL BUDGET LIMITATION Cold processing required for the
| 2 LETI INNOVATION DAYS 2019 | Sébastien KERDILES | 2019, June 28th
- ‘Cold’ processing required for the top level, to
avoid any degradation of the bottom one.
Challenging for :
- Epitaxy
- Spacers deposition
- Dopant activation
- Gate stack formation
Using ‘classical’ thermal treatment, i.e. heating
the whole wafer, maximum thermal budget is limited to ~ 500°C during ~2 hours 3D SEQUENTIAL INTEGRATION : THERMAL BUDGET LIMITATION
BEOL Top device tier i-BEOL Bottom device tier
| 3 LETI INNOVATION DAYS 2019 | Sébastien KERDILES | 2019, June 28th
- Principle : surface exposed to a sub-µs pulsed laser beam
- High-T° anneal : extremely fast heating of the surface region during
the laser pulse. Sub-melt or melt regimes possible
- Selective anneal : only the surface is heated, not the volume
UV radiation (308nm) energy deposited in first 10-20 nm Si Ultra-short pulse ( ~ 160ns) very limited heat diffusion
- UV-Nanosecond laser annealing enables selective surface
annealing : UV-NLA only heats the top transistor ! ALTERNATIVE : UV NANOSECOND LASER ANNEALING (UV-NLA)
UV pulse Absorption in Si Limited heat diffusion
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SCREEN LT-3100
- XeCl excimer laser :
- = 308nm
- Pulse duration : 160ns (FWHM)
- Repetition rate : 4Hz
- Laser energy density range : 0.08 4.2 J/cm² ( bulk Si melts @ 1.75 J/cm²)
- Large uniform laser beam : 26x36mm² or smaller (full die)
- Scan mode : step & repeat
- Other process conditions :
- Wafers : 300mm, 200mm, pieces
- Heating chuck : 25-450°C
- Atmosphere : N2 or Ar
- In-situ metrology : surface melt detection
UV NANOSECOND LASER ANNEALING PLATFORM :
SCREEN LT-3100 platform for UV-NLA
Uniformity : +/-1.5% (+/-3) 160ns 15x15mm² beam profile :
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- Melt regime : single laser pulse
- Perfect crystal recovery
- Dopant activation at least
equivalent to high-T° RTP
Liquid phase epitaxy
- Sub-melt regime : multi-pulse
Solid phase epitaxial regrowth
- In-situ monitoring of the regrowth
APPLICATION : CRYSTAL CURING & DOPANT ACTIVATION
[Fenouillet-Béranger et al, S3S 2016]
SOI amorphized by As implantation SOI perfectly recrystallized
[Kerdilès et al, IWJT 2016] [Acosta et al, SSDM 2019]
Sheet resistance (ohm/sq.)
Start Final
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- Low temperature gate stack integration
- Challenges : low resistance & good reliability
- Laser annealing used to crystallize a-Si:P & activate the dopants
APPLICATION : GATE STACK ANNEALING
UV-NLA 50 or 70 nm a-Si:P poly-Si:P UV-NLA a-Si:P poly-Si:P SiO2 (145 nm) HfO2+TiN SOI Bulk Si 50 nm = 308 nm
No anneal : Rs ~ 540 ohm/sq.
AFM 1x1µm² Poly-Si:P TiN 10 nm HfO2 BOX SOI
Minimal resistivity reached at the ‘near-total
melt’ of the a-Si:P layer
Poly-Si grains ~ 100-300nm & SOI channel still
monocrystalline
| 7 LETI INNOVATION DAYS 2019 | Sébastien KERDILES | 2019, June 28th
- 1D, 2D & 3D numerical simulations
- LIAB software, developped by SCREEN
- Temperature, phase, dopant concentration as a function of time and depth
Ex : Gate stack annealing Guidelines on the process conditions
SIMULATION CAPABILITY
0.50 J/cm² 0.75 J/cm² 0.95 J/cm² 1.05 J/cm² Solid phase Liquid phase SiO2 SOI a-Si:P
| 8 LETI INNOVATION DAYS 2019 | Sébastien KERDILES | 2019, June 28th
- UV-Nanosecond laser annealing enables selective surface annealing : it only
heats the top layer, not the embedded structures
- Particularly relevant for 3D sequential integration but not only
- UV Nanosecond Laser Annealing : available @ LETI, open for any collaboration
TAKE AWAY MESSAGES
Leti, technology research institute Commissariat à l’énergie atomique et aux énergies alternatives Minatec Campus | 17 rue des Martyrs | 38054 Grenoble Cedex | France www.leti-cea.com