Memory Management Outline Processes (done) Memory Management - PDF document

Memory Management Outline • Processes (done) • Memory Management – Basic (done) – Paging (done) ← ← ← ← Operating Systems – Virtual memory Virtual Memory (Chapter 4.3) Motivation Paging Implementation Validation • Logical address space larger than physical Bit memory – 2 32 about 4 GB in size 0 1 v Page 0 0 – “Virtual Memory” 1 0 i Page 1 1 Page 0 0 3 – on special disk 2 3 v Page 2 2 • Abstraction for programmer 1 3 0 i Page 3 3 Page 2 • Performance ok? Examples: 2 Logical Page Table – Unused libraries Physical Memory Memory – Error handling not used “What happens when access invalid page?” – Maximum arrays Accessing Invalid Pages Performance of Demand Paging • Page not in memory • Page Fault Rate ( p ) – interrupt OS => page fault 0 < p < 1.0 (no page faults to every ref is a fault) • OS looks in table: • Page Fault Overhead – invalid reference? => abort = write page in + update + restart – not in memory? => bring it in • Get empty frame (from list) – Dominated by time to write page in • Effective Access Time • Write page from disk into frame = (1- p ) (memory access) + p (page fault overhead) • Reset tables (set valid bit = 1) • Restart instruction 1

Performance Example No Free Frames • Memory access time = 100 nanoseconds • Page fault => What if no free frames? • Page fault overhead = 25 msec – terminate process (out of memory) • Page fault rate = 1/1000 – swap out process (reduces degree of multiprog) – replace another page with needed page • EAT = (1-p) * 100 + p * (25 msec) – Page replacement = (1-p) * 100 + p * 25,000,000 • Page fault with page replacement: = 100 + 24,999,900 * p – if free frame, use it = 100 + 24,999,900 * 1/1000 = 25 microseconds! – else use algorithm to select victim frame • Want less than 10% degradation – write page to disk 110 > 100 + 24,999,900 * p – read in new page – change page tables 10 > 24,999,9000 * p – restart process p < .0000004 or 1 fault in 2,500,000 accesses! Page Replacement Page Replacement Algorithms 0 1 v • Every system has its own (0) 1 0 2 i v (3) • Want lowest page fault rate Page 0 2 3 v 0 • Evaluate by running it on a particular string (1) Page 1 3 0 i (4) of memory references ( reference string ) and 1 Page 0 0 3 Page 2 Page Table computing number of page faults 2 victim 1 • Example: 1,2,3,4,1,2,5,1,2,3,4,5 Page 3 (2) 0 1 v i 3 Page 2 (3) 2 Logical 1 0 i Physical Memory Memory Page Table First-In-First-Out (FIFO) First-In-First-Out (FIFO) 1,2,3,4,1,2,5,1,2,3,4,5 1,2,3,4,1,2,5,1,2,3,4,5 4 5 1 1 3 Frames / Process 3 Frames / Process 9 Page Faults 2 2 1 3 3 3 2 4 How could we reduce the number of page faults? 2

Optimal Optimal vs. vs. • Replace the page that will not be used for • Replace the page that will not be used for the longest period of time the longest period of time 1,2,3,4,1,2,5,1,2,3,4,5 1,2,3,4,1,2,5,1,2,3,4,5 1 1 4 4 Frames / Process 4 Frames / Process 2 2 6 Page Faults 3 3 How do we know this? 4 4 5 Use as benchmark Least Recently Used Least Recently Used • Replace the page that has not been used for • Replace the page that has not been used for the longest period of time the longest period of time 1,2,3,4,1,2,5,1,2,3,4,5 1,2,3,4,1,2,5,1,2,3,4,5 1 1 5 2 2 8 Page Faults 3 3 5 4 4 4 3 LRU Implementation LRU Approximations • Counter implementation • LRU good, but hardware support expensive – every page has a counter; every time page is • Some hardware support by reference bit referenced, copy clock to counter – when a page needs to be changed, compare the – with each page, initially = 0 counters to determine which to change – when page is referenced, set = 1 • Stack implementation – replace the one which is 0 (no order) – keep a stack of page numbers – page referenced: move to top • Enhance by having 8 bits and shifting – no search needed for replacement • (Can we do this in software?) – approximate LRU 3

Second-Chance Second-Chance (a) (b) • FIFO replacement, but … – Get first in FIFO 1 1 0 1 – Look at reference bit 0 2 0 2 + bit == 0 then replace Next 1 3 0 3 + bit == 1 then set bit = 0, get next in FIFO Vicitm • If page referenced enough, never replaced 1 4 0 4 • Implement with circular queue If all 1, degenerates to FIFO Enhanced Second-Chance Page Buffering • 2-bits, reference bit and modify bit • Pool of frames • (0,0) neither recently used nor modified – start new process immediately, before writing old – best page to replace • (0,1) not recently used but modified + write out when system idle – list of modified pages – needs write-out (“dirty” page) + write out when system idle • (1,0) recently used but “clean” – pool of free frames, remember content – probably used again soon + page fault => check pool • (1,1) recently used and modified – used soon, needs write-out • Circular queue in each class -- (Macintosh) Thrashing Thrashing • If a process does not have “enough” pages, the page-fault rate is very high utilization – low CPU utilization CPU – OS thinks it needs increased multiprogramming – adds another process to system • Thrashing is when a process is busy swapping pages in and out degree of muliprogramming 4

Cause of Thrashing Working-Set Model • Why does paging work? • Working set window W = a fixed number of – Locality model page references + process migrates from one locality to another – total number of pages references in time T + localities may overlap • Total = sum of size of W ’s • Why does thrashing occur? • m = number of frames – sum of localities > total memory size • How do we fix thrashing? – Working Set Model – Page Fault Frequency Page Fault Frequency Working Set Example increase number of • T = 5 frames Page Fault Rate • 1 2 3 2 3 1 2 4 3 4 7 4 3 3 4 1 1 2 2 2 1 upper bound W={1,2,3} W={3,4,7} W={1,2} lower bound – if T too small, will not encompass locality decrease number of – if T too large, will encompass several localities frames – if T => infinity, will encompass entire program Number of Frames • if Total > m => thrashing, so suspend a process • Establish “acceptable” page-fault rate • Modify LRU appx to include Working Set – If rate too low, process loses frame – If rate too high, process gains frame Outline Prepaging • Demand Paging Intro (done) • Pure demand paging has many page faults • Page Replacement Algorithms (done) initially – use working set • Thrashing (done) – does cost of prepaging unused frames outweigh • Misc Paging cost of page-faulting? • WinNT • Linux • “Application Performance Studies” 5

Page Size Program Structure • Old - Page size fixed, New -choose page size • consider: • How do we pick the right page size? Tradeoffs: int A[1024][1024]; – Fragmentation for (j=0; j<1024; j++) – Table size – Minimize I/O for (i=0; i<1024; i++) + transfer small (.1ms), latency + seek time large (10ms) A[i][j] = 0; – Locality • suppose: + small finer resolution, but more faults – process has 1 frame – ex: 200K process (1/2 used), 1 fault / 200k, 100K faults/1 byte • Historical trend towards larger page sizes – 1 row per page – CPU, mem faster proportionally than disks – => 1024x1024 page faults! Program Structure Priority Processes int A[1024][1024]; • Consider for (i=0; i<1024; i++) – low priority process faults, for (j=0; j<1024; j++) A[i][j] = 0; + bring page in • 1024 page faults – low priority process in ready queue for awhile, • Stack vs. Hash table waiting while high priority process runs • Compiler – high priority process faults – separate code from data + low priority page clean, not used in a while – keep routines that call each other together => perfect! • LISP (pointers) vs. Pascal (no-pointers) • Lock-bit (like for I/O) until used once Virtual Memory and WinNT/2000 Real-Time Processes • Page Replacement Algorithm • Real-time – FIFO – bounds on delay – Missing page, plus adjacent pages – hard-real time: systems crash, lives lost • Working set + air-traffic control, factor automation – default is 30 – soft-real time: application sucks – take victim frame periodically + audio, video – if no fault, reduce set size by 1 • Paging adds unexpected delays • Reserve pool – don’t do it – hard page faults – lock bits for real-time processes – soft page faults 6