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Mastering Complex Complex Analogue Analogue Mixed Signal Mixed - - PowerPoint PPT Presentation

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Mastering Complex Complex Analogue Analogue Mixed Signal Mixed Signal Mastering Systems with with SystemC SystemC- -AMS AMS Systems Karsten Einwich Fraunhofer IIS EAS Dresden karsten.einwich@eas.iis.fraunhofer.de Thomas Arndt, Uwe

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Mastering Mastering Complex Complex Analogue Analogue Mixed Signal Mixed Signal Systems Systems with with SystemC SystemC-

  • AMS

AMS

Karsten Einwich

Fraunhofer IIS – EAS Dresden

karsten.einwich@eas.iis.fraunhofer.de Thomas Arndt, Uwe Eichler, Thomas Uhle, Thomas Markwirth, Uwe Knöchel

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Content Content

♦ Introduction SystemC-AMS ♦ Aplication Examples

  • Wired Communication Application
  • Automotive Sensor Application
  • Mixed Signal Embedded Core Application
  • Wireless Applications

♦ Conclusion

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S ystemC S ystemC-

  • AMS

AMS

♦ Extension Library for SystemC ♦ Developed by the OSCI Analog Mixed Signal Working group ♦ Prototype versions public available based on the Fraunhofer implementation ♦ Public version supports modeling of:

  • Non-conservative systems
  • Multi rate synchronous dataflow (SDF)
  • Linear electrical networks
  • Linear behavioral functions (linear transfer function numerator/denumerator and pole

zero, state space),

  • Frequency domain simulation
  • Powerful trace functionality

♦ Experimental extensions availabel at FhG: Switched Capacitor solver, Nonlinear DAE solver with de-synchronization

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S ystemC S ystemC-

  • AMS

is an extension of S ystemC AMS is an extension of S ystemC

  • AMS
  • no changes to the SystemC

implementation

use of the same SystemC

implementation

no restrictions for the use of

the SystemC language

  • as far as possible, only LRM

documented features used for the library implementation

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S ystemC / S ystemC / S ystemC S ystemC-

  • AMS

AMS language architecture language architecture

Programming language C++ Core language Modules Ports Processes Interfaces Channels Events Predefined channels Signal, Clock, FIFO, Mutex, Semaphore Utilities Report handling, Tracing Methodology- and technology-specific libraries SystemC verification library, bus models, TLM interfaces Application Written by the end user Data types 4-valued logic type 4-valued logic vectors Bit vectors Arbitrary-precision integers Fixed-point types Methodology- and technology-specific libraries SystemC-AMS testbench utilities, electrical / mechanical macro models, … Analogue core language analogue modules, ports, signals, nodes, solver and synchronisation basics Predefined analogue MoC (non-)conservative modules, linear DAE solver, constant time step synchronisation, … Analogue utilities complex numbers, matrices, … Predefined domains electrical, mechanical, magnetic …

S ystemC S ystemC-

  • AMS

AMS

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Concept of S ystemC Concept of S ystemC– –AMS AMS

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Why having different analogue Models of Computation? Why having different analogue Models of Computation?

♦ Modelling on different abstraction / accuracy levels yields the possibility to apply specialised algorithms, which are orders of magnitude faster than a general approach. ♦ It is possible to reduce the solvability problem significantly. ♦ Due to the encapsulation of analogue MoC / solvers SystemC-AMS models are very well scalable – very large models can be handled. ♦ Examples for specialised analogue Models of Computations (MoC):

  • Linear Networks / Differential-Algebraic Equation (DAE) systems
  • Non-linear Networks / DAE systems
  • Switched Capacitor Networks (leads to simple algebraic equation)
  • Dataflow solver for Signalflow Descriptions and Bond Graphs
  • …
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Application of S ystemC Application of S ystemC-

  • AMS

to a Voice Codec S ystem AMS to a Voice Codec S ystem

Linear electrical net- works (conservative) Discrete event (SystemC modules) Embedded linear analogue equations Multi-rate static dataflow, frequency domain Signalflow (non-conservative), frequency domain C – Code for target processor

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S ystemC/ S ystemC S ystemC/ S ystemC-

  • AMS

specific Advantages AMS specific Advantages

♦ Can be tailored and optimized for specific applications ♦ Support of customized methodologies and their combination ♦ The tradeoff between accuracy, simulation performance and modeling effort can be optimized for each system part by using the interoperability of an arbitrary number of Models of Computations (MoC) ♦ Encapsulation of subsystems which leads to scalability and modularity ♦ Easy software integration and powerful debug possibilities ♦ Full power of C++ available (e.g. language, libraries, encapsulation concepts) ♦ Easy IP protection by pre-compilation and integration into other tools and design flows via C interfaces

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Application areas of S ystemC Application areas of S ystemC-

  • AMS

AMS

Description, Simulation and Verification for: ♦ Functional complex integrated systems ♦ Analogue Mixed-Signal systems / Heterogeneous systems ♦ Specification / Concept and System Engineering ♦ System design, development of a (“golden”) reference model ♦ Embedded Software development ♦ Next Layer (Driver) Software development ♦ Customer model, IP protection

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POTS Splitter PST SLIC AD/DA HW- Filter DSP's Analog POTS Linecard Line Driver AD/DA HW- Filter ADSL Datapump ADSL Linecard Data

Application Application Example Example

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POTS POTS

  • S

ystem S ystem

♦ Complete System functionality modeled ♦ All relevant analogue effects ♦ Digital parts “bittrue”, original code of embedded software ♦ Hundreds of simulation scenarios as regression tests available ♦ Simulation scenarios partially re- used for silicon verification ♦ Embedded software debugged before silicon

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S imulation Time for S imulation Time for Vinetic Vinetic 2CPE S ystem 2CPE S ystem

♦ SystemC-AMS Simulation

  • 2 channel including: SLIC, externals, AFE, DFE,

ASDSP and part of Carmel FW

  • 1 sec realtime 1,5h simulation time

♦ VHDL RTL

  • 2 channel including: AFE, DFE, ASDSP, Carmel

and Interfaces

  • 1 sec realtime 300h simulation time

♦ Nano Sim (Fast CMOS simulator)

  • 2 channel including: AFE top level
  • 1 ms realtime 15h simulation time

♦ Titan Simulation

  • 2 channel including: AFE top level
  • 1 ms realtime 500h simulation time

♦ SystemC-AMS Simulation

  • nly one channel
  • reduce sampling rate for analog blocks (used for

FW simulation only)

  • 1sec realtime 90 sec simulation time

Source: Gerhard Nössing Infineon COM

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ADS L / VDS L S ystems ADS L / VDS L S ystems

♦ Transient settling behavior ♦ Interaction Voice / Data transmission ♦ Training algorithm ♦ BER estimations ♦ Number of use scenarios ♦ Interaction of different lines ♦ Multi level simulation environment essential

POTS Splitter PST SLIC AD/DA HW- Filter DSP's Analog POTS Linecard Line Driver AD/DA HW- Filter ADSL Datapump ADSL Linecard Data

CO0 CO1 CON NEXT FEXT (Central Office) Cabinet Cable Binder DropWire NEXT CPE N CPE 1 CPE 0

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Automotive S ensor Applications Automotive S ensor Applications

pressure pulse

TIER2 TIER1 OEM

Bias

A D

uC

D A A D

Temp. Sense ROM firmware EEPROM Interface

enable

OUT VDD GND Supply OBD VDD

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S imulation Performance Challenge for Automotive Applications S imulation Performance Challenge for Automotive Applications

2 SPS 0,2 SPS variable 0,02 SPS 9600 BAUD

A D

ΔC ~ p

rf-IF

bit- stream temperature

DSP

battery V

control feedback loop (pwr. mgmt.,…)

  • pwr. mgmt.,…

Source: Wolfgang Scherr Infineon AIM

♦ Temperature compensated TPMS sensor (MEMS)

  • application (driving) 2 hrs. (1/t ~ 250µHz)
  • battery voltage update rate ~ 20mHz
  • temperature update rate ~ 200mHz
  • pressure update rate (wakeup) ~ 2Hz
  • analog processing rate ~ 1MHz
  • digital processing rate ~ 4Mhz

4 500000 10 speed factor: 16*109 10 80

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Automotive S ensor Proj ects Automotive S ensor Proj ects

♦ Systemlevel model including the embedded processor on a cycle accurate level ♦ Switched capacitor converter ♦ Diagnose modes, offset calibration, temperature dependencies, noise, manchester interface, synchronization via supply voltage, ... ♦ Original code of embedded software ♦ TLM based modeling for processor communication ♦ IP protected customer model as Matlab/Simulink Module (mex – dll) ♦ Simulation performance ~ 10min /sec

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Mixed Mixed-

  • S

ignal Embedded Core Proj ect S ignal Embedded Core Proj ect

♦ Serial ATA physical layer chip set for 3 / 6 GBit serial data transmission e.g. to/from hard discs ♦ Concept engineering model of transceiver /receiver including the pll’s ♦ Goal estimation of bit error rates, simulation of pll locking behavior ♦ Pin compatibles VHDL-model for digital design via SystemC Modelsimintegration as reference and stimuli generator

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S ATA Proj ect Results S ATA Proj ect Results

♦ Simulation performance ~ 2h/ms = 6e6 clock cycle ♦ PLL settling / locking ♦ Equalizer coefficient adaption ♦ Estimation of BER

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Wireless Transmission S ystem Wireless Transmission S ystem

Data Up converter Data Down converter Modu- lation Demod./ recovery Ethernet access

modulator front-end modulator baseband microwave unit ♦ System level design and design space exploration ♦ Performance estimation (especially BER) for different Architectures ♦ Settling behavior ♦ Algorithm design

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Wireless Transmission S ystem Wireless Transmission S ystem

♦ Baseband Modeling ♦ Multi Rate Synchronous Dataflow Modeling due high oversampling rates ♦ Table based models for analogue imperfections ♦ Simulation time e.g. for BER of 16 billion bits take around 15 hours

Constellation diagram phase noise only balance error quadrature error bias error

1E-7 1E-6 1E-5 1E-4 1E-3 1E-2 1E-1 0,05 0,1 0,15 0,2 0,25 Quadrature Error * PI [rad]

BER

Settling

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Conclusion Conclusion

♦ SystemC-AMS extends SystemC for modeling analogue mixed signal behavior ♦ Together with SystemC, SystemC-AMS permits overall system modeling for different purposes ♦ Prototype available at: www.systemc-ams.org ♦ SystemC-AMS will be further developed and standardized by the OSCI AMS Working group – which is open for all OSCI members