levels for system-on-chip Giovanni Funchal STMicroelectronics - - PowerPoint PPT Presentation

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levels for system-on-chip Giovanni Funchal STMicroelectronics - - PowerPoint PPT Presentation

Components and abstraction levels for system-on-chip Giovanni Funchal STMicroelectronics Verimag Synchron2008 Introduction Simulation mechanics In practice Contributions Future work Imagine a system Display USB FM radio PAL/NTSC


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Giovanni Funchal STMicroelectronics Verimag Synchron’2008

Components and abstraction levels for system-on-chip

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Giovanni Funchal Components and abstraction levels for system-on-chip 2

Imagine a system…

5Mp camera 16Gb Flash 256Mb RAM RF FM radio Internet WLAN USB PAL/NTSC TV-out Bluetooth Browser MPEG4 WCDMA, GSM GPS Maps MP3 Internet radio, podcasts 2Mp camera Display E-mail MMS/SMS Battery Microphone Java Operating System Keypad

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 3

…-on-chip

Introduction In practice Contributions Future work Simulation mechanics

Nokia N96 STMicroelectronics Nomadik STn8815

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Giovanni Funchal Components and abstraction levels for system-on-chip 4

Design flow

RTL model

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 5

Register transfer level

Precise description of hardware Synchronous, deterministic

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 6

Design flow

Fabrication RTL model

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 7

Design flow

Fabrication Software RTL model

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 8

Design flow

Fabrication Software Too late! RTL model

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 9

Design flow

Fabrication Software RTL model

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 10

Design flow

Fabrication Software Simulator RTL model

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 11

Design flow

Fabrication Software Too slow! Simulator RTL model

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 12

Design flow

RTL model Fabrication Software Simulator TLM model Simpler, faster

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 13

Abstraction levels

Introduction In practice Contributions Future work Simulation mechanics

RTL models

  • Late (hw fab)
  • Precise
  • Slow

TLM models

  • Early (sw dev)
  • Less precise
  • Fast
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Giovanni Funchal Components and abstraction levels for system-on-chip 14

Transaction level modeling

Abstract transfers of data Asynchronous, non-deterministic

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal STMicroelectronics Verimag Synchron’2008

Components and abstraction levels for system-on-chip

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Giovanni Funchal Components and abstraction levels for system-on-chip 16

Components

Target port Initiator port Component Data interface Interrupt interf.

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 17

Components

Introduction In practice Contributions Future work Simulation mechanics

What’s inside?

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Giovanni Funchal Components and abstraction levels for system-on-chip 18

SystemC

  • Processes (C++ code)

Running Waiting Ready

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 19

SystemC

  • Processes (C++ code)
  • Events

Running Waiting Ready

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 20

SystemC

  • Processes (C++ code)
  • Events
  • Scheduler

Running Waiting Ready

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 21

SystemC

  • Processes (C++ code)

– wait()

  • Events
  • Scheduler

Running Waiting Ready wait()

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 22

Transactions in SystemC

port. void irq() { … } irq();

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 23

Transactions in SystemC

port. void irq() { … } irq(); Interface function calls

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 24

Video decoder

An example

Display controller Memory

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 25

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { x = read(flag); } while(!x); img = read(mem); display(img); irq();

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 26

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { x = read(flag); } while(!x); img = read(mem); display(img); irq();

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 27

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { x = read(flag); } while(!x); img = read(mem); display(img); irq();

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 28

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { x = read(flag); } while(!x); img = read(mem); display(img); irq();

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 29

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { x = read(flag); } while(!x); img = read(mem); display(img); irq();

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 30

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { x = read(flag); } while(!x); img = read(mem); display(img); irq();

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 31

yield()

  • Like “wait()” but without saying what it is

waiting for

  • The scheduler may choose the same

process again

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 32

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { yield(); x = read(flag); yield(); } while(!x); img = read(mem); display(img); irq();

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 33

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { yield(); x = read(flag); } while(!x); img = read(mem); display(img); irq();

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 34

Introduction In practice Contributions Future work Simulation mechanics

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { yield(); x = read(flag); } while(!x); img = read(mem); display(img); irq();

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Giovanni Funchal Components and abstraction levels for system-on-chip 35

Introduction In practice Contributions Future work Simulation mechanics

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { yield(); x = read(flag); } while(!x); img = read(mem); display(img); irq();

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Giovanni Funchal Components and abstraction levels for system-on-chip 36

Introduction In practice Contributions Future work Simulation mechanics

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { yield(); x = read(flag); } while(!x); img = read(mem); display(img); irq();

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Giovanni Funchal Components and abstraction levels for system-on-chip 37

Observations

  • “yield()”
  • 1. Avoids livelocks by possibly giving other

processes a chance to run

  • 2. Finds bugs (next slides)

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 38

Introduction In practice Contributions Future work Simulation mechanics

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { yield(); x = read(flag); } while(!x); img = read(mem); display(img); irq();

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Giovanni Funchal Components and abstraction levels for system-on-chip 39

Introduction In practice Contributions Future work Simulation mechanics

Decoder: decode(image); write(flag, true); write(mem, image); wait(irq); Display: do { yield(); x = read(flag); } while(!x); img = read(mem); display(img); irq();

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Giovanni Funchal Components and abstraction levels for system-on-chip 40

Design flow

RTL model Fabrication Software Simulator TLM model

In practice Future work Introduction

Software

Contributions Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 41

Introduction In practice Contributions Future work Simulation mechanics

Decoder: decode(image); write(flag, true); yield(); write(mem, image); wait(irq); Display: do { yield(); x = read(flag); } while(!x); img = read(mem); display(img); irq();

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Giovanni Funchal Components and abstraction levels for system-on-chip 42

Introduction In practice Contributions Future work Simulation mechanics

Decoder: decode(image); write(mem, image); yield(); write(flag, true); wait(irq); Display: do { x = read(flag); yield(); } while(!x); img = read(mem); display(img); yield(); irq();

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Giovanni Funchal Components and abstraction levels for system-on-chip 43

Conclusions

  • A minimum amount of yielding makes a

certain platform work

  • A bit more is needed to

–make any platform work –finding bugs

  • Essential for component based approach!

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 44

Approaches at ST

  • TAC1

–yield() between any two accesses –Poor performance

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 45

Approaches at ST

  • TAC2

–Tag addresses “synchro” ( ) or “data” –yield() after any “synchro” –Very good performance

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 46

Introduction Contributions Future work

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { x = read(flag); } while(!x); img = read(mem); display(img); irq();

In practice Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 47

Introduction Contributions Future work

Decoder: decode(image); write(mem, image); write(flag, true); yield(); wait(irq); Display: do { x = read(flag); yield(); } while(!x); img = read(mem); display(img); irq();

In practice Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 48

Introduction Contributions Future work

Decoder: decode(image); write(mem, image); yield(); write(flag, true); yield(); wait(irq); Display: do { x = read(flag); yield(); } while(!x); img = read(mem); display(img); yield(); irq();

In practice Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 49

State-of-the-art

  • TAC2.5

–Experimental results by Jérôme Cornet –Tag addresses “synchro” ( ) or “data” –yield()

  • before and after any “synchro”
  • before irq’s

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 50

Introduction Future work

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { x = read(flag); } while(!x); img = read(mem); display(img); irq();

Simulation mechanics In practice Contributions

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Giovanni Funchal Components and abstraction levels for system-on-chip 51

Introduction Future work

Decoder: decode(image); write(mem, image); yield(); write(flag, true); yield(); wait(irq); Display: do { yield(); x = read(flag); yield(); } while(!x); img = read(mem); display(img); yield(); irq();

Simulation mechanics In practice Contributions

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Giovanni Funchal Components and abstraction levels for system-on-chip 52

Memory consistency contracts

  • Contract between processor and software in a

multiprocessor system –Assume: software follows guidelines –Guarantee: memory stays consistent

  • Cache flushes, out-of-order execution,…

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 53

synchro data access

Memory consistency contracts

  • Guidelines:

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 54

synchro data access competing non-competing acquire release

Memory consistency contracts

  • Guidelines:

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal Components and abstraction levels for system-on-chip 55

Design flow

RTL model Fabrication TLM model

In practice Simulation mechanics Contributions Future work Introduction

Valid implementation? Seen as specification

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Giovanni Funchal Components and abstraction levels for system-on-chip 56

Introduction In practice Contributions Future work Simulation mechanics

write mem ... write flag true read flag true read mem ... read flag false irq read flag false

From TLM…

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Giovanni Funchal Components and abstraction levels for system-on-chip 57

Introduction In practice Contributions Future work Simulation mechanics

write mem ... write flag true read flag true read mem ... read flag false irq read flag false

…to RTL

write mem ... read mem ...

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Giovanni Funchal Components and abstraction levels for system-on-chip 58

Introduction In practice Contributions Future work Simulation mechanics

write mem ... write flag true read flag true read mem ... read flag false irq read flag false

…to RTL

write mem ... read mem ...

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Giovanni Funchal Components and abstraction levels for system-on-chip 59

Introduction In practice Contributions Future work Simulation mechanics

write mem ... write flag true read flag true read mem ... read flag false irq read flag false

And from RTL…

write mem ... read mem ...

  • “happens-before” partial-order
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Giovanni Funchal Components and abstraction levels for system-on-chip 60

Introduction In practice Contributions Future work Simulation mechanics

write mem ... write flag true read flag true read mem ... read flag false irq read flag false

Back to TLM…

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Giovanni Funchal Components and abstraction levels for system-on-chip 61

Understand yield

  • Link with “happens-before” partial-order

Introduction In practice Contributions Future work Simulation mechanics

Decoder: decode(image); write(mem, image); write(flag, true); wait(irq); Display: do { x = read(flag); } while(!x); img = read(mem); display(img); irq();

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Giovanni Funchal Components and abstraction levels for system-on-chip 62

Future work

  • Import memory consistency contracts to TLM

– Formal justification for “synchro” – Better understanding helps placing tags

  • Multi abstraction-level components

– “happens-before” order must be maintained by valid implementations (contracts?)

Introduction In practice Contributions Future work Simulation mechanics

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Giovanni Funchal STMicroelectronics Verimag Synchron’2008

Components and abstraction levels for system-on-chip