Language using Dependent Types -Ware: An Embedded Hardware - - PowerPoint PPT Presentation

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 1

Π-Ware: An Embedded Hardware Description Language using Dependent Types

Author: João Paulo Pizani Flor

<joaopizani@uu.nl>

Supervisor: Wouter Swierstra

<w.s.swierstra@uu.nl>

Department of Information and Computing Sciences Utrecht University

Tuesday 26th August, 2014

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 2

What is Π-Ware

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 3

What is Π-Ware

“Π-Ware is a Domain-Specific Language (DSL) for hardware, embedded in the dependently-typed Agda programming

• language. It allows for the description, simulation, synthesis and

verification of circuits, all in the same language.”

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 4

Background

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 5

Hardware design is hard(er)

▶ Strict(er) correctness requirements

• You can’t simply update a full-custom chip after production
• Intel Pentium’s FDIV
• Expensive verification / validation
• Up to 50% of development costs

▶ Low-level details (more) important

• Layout / area
• Power consumption / fault tolerance

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 6

Hardware design is growing

▶ Moore’s law will still apply for some time

• We can keep packing more transistors into same silicon area

▶ But optimizations in CPUs display diminishing returns

• Thus, more algorithms directly in hardware

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 7

Hardware Description Languages

▶ All started in the 1980s ▶ De facto industry standards: VHDL and Verilog ▶ Were intended for simulation, not modelling or synthesis

• Unsynthesizable constructs
• Widely variable tool support

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 8

Functional Hardware Description

▶ A functional program describes a circuit

• Easier to reason about program properties
• Inherently parallel and stateless semantics

▶ Several functional HDLs during the 1980s

• For example, 𝜈FP [Sheeran, 1984]

▶ Later, embedded hardware DSLs

• For example, Lava (Haskell) [Bjesse et al., 1998]

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 9

Embedded DSLs for Hardware

▶ Lava

• Simulation / Synthesis / Verification
• Limitations: almost untyped / no size checks

adder :: (Signal Bool, ([Signal Bool], [Signal Bool]))

• > ([Signal Bool], Signal Bool)

▶ Others:

• ForSyDe [Sander and Jantsch, 1999]
• Hawk [Launchbury et al., 1999], etc.

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 10

Dependently-Typed Programming

▶ Dependent type systems: systems in which types can

depend on values

▶ It makes a big difference:

• More expressivity
• Certified programming

▶ DTP often touted as “successor” of functional

programming

• Very well-suited for DSLs [Oury and Swierstra, 2008]

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 11

Research Question / Methodology

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 12

Research Question / Methodology

▶ Question:

• What are the improvements that Dependently-Typed

Programming (DTP) can bring to hardware design?

• Compared to other functional hardware languages

▶ Methodology:

• Develop a hardware DSL, embedded in a

dependently-typed language (Agda)

• Allowing simulation, synthesis and verification

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 13

Big picture

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 14

Dependently-Typed Programming

▶ Disclaimer: Suspend disbelief in syntax

• Examples are in Agda
• Syntax similar to Haskell, details further ahead

▶ Types can depend on values

• Example:

𝖾𝖻𝗎𝖻 𝖶𝖿𝖽 (𝑏 ∶ 𝖳𝖿𝗎) ∶ ℕ → 𝖳𝖿𝗎 𝗑𝗂𝖿𝗌𝖿…

• Compare with Haskell:

data List (a :: *) :: * where

▶ Types of arguments can depend on values of previous

arguments

• Ensure a “safe” domain
• 𝗎𝖻𝗅𝖿 ∶ (𝑛 ∶ ℕ) → 𝖶𝖿𝖽 𝛽 (𝑛 + 𝑜) → 𝖶𝖿𝖽 𝛽 𝑛

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 15

Dependently-Typed Programming

▶ Type checking requires evaluation of functions

• We want 𝖶𝖿𝖽 𝖢𝗉𝗉𝗆 (𝟥 + 𝟥) to unify with 𝖶𝖿𝖽 𝖢𝗉𝗉𝗆 𝟧

▶ Consequence: all functions must be total ▶ Termination checker (heuristics)

• Structurally-decreasing recursion
• This passes the check:

𝖻𝖾𝖾 ∶ ℕ → ℕ → ℕ 𝖻𝖾𝖾 𝗔𝖿𝗌𝗉 𝑧 = 𝑧 𝖻𝖾𝖾 (𝗍𝗏𝖽 𝑦′) 𝑧 = 𝗍𝗏𝖽 (𝖻𝖾𝖾 𝑦′ 𝑧)

• This does not:

𝗍𝗃𝗆𝗆𝗓 ∶ ℕ → ℕ 𝗍𝗃𝗆𝗆𝗓 𝗔𝖿𝗌𝗉 = 𝗔𝖿𝗌𝗉 𝗍𝗃𝗆𝗆𝗓 (𝗍𝗏𝖽 𝑜′) = 𝗍𝗃𝗆𝗆𝗓 ⌊ 𝑜′ /𝟥⌋

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 16

Dependently-Typed Programming

▶ Dependent pattern matching can rule out impossible cases ▶ Classic example: safe 𝗂𝖿𝖻𝖾 function

𝗂𝖿𝖻𝖾 ∶ 𝖶𝖿𝖽 𝛽 (𝗍𝗏𝖽 𝑜) → 𝛽 𝗂𝖿𝖻𝖾 (𝑦 ∷ 𝑦𝑡) = 𝑦

• The only constructor returning 𝖶𝖿𝖽 𝛽 (𝗍𝗏𝖽 𝑜) is _∷_

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 17

Depedent types as logic

▶ Programming language / Theorem prover

• Types as propositions, terms as proofs [Wadler, 2014]

▶ Example:

• Given the relation:

𝖾𝖻𝗎𝖻 _≤_ ∶ ℕ → ℕ → 𝖳𝖿𝗎 𝗑𝗂𝖿𝗌𝖿 𝗔≤𝗈 ∶ ∀ {𝑜} → 𝗔𝖿𝗌𝗉 ≤ 𝑜 𝗍≤𝗍 ∶ ∀ {𝑛 𝑜} → 𝑛 ≤ 𝑜 → 𝗍𝗏𝖽 𝑛 ≤ 𝗍𝗏𝖽 𝑜

• Proposition:

𝗎𝗑𝗉𝖬𝖥𝖱𝖦𝗉𝗏𝗌 ∶ 𝟥 ≤ 𝟧

• Proof:

𝗎𝗑𝗉𝖬𝖥𝖱𝖦𝗉𝗏𝗌 = 𝗍≤𝗍 (𝗍≤𝗍 𝗔≤𝗈) 𝗍≤𝗍 (𝗍≤𝗍 (𝗔≤𝗈 ∶ 𝟣 ≤ 𝟧) ∶ 𝟤 ≤ 𝟧) ∶ 𝟥 ≤ 𝟧

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 18

Agda

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 19

Agda syntax for Haskell programmers

▶ Liberal identifier lexing (Unicode everywhere)

• 𝖻≡𝖼+𝖽 is a valid identifier, 𝑏 ≡ 𝑐 + 𝑑 an expression
• Used a lot in Agda’s standard library: ×, ⊎, ∧
• And in Π-Ware: ℂ, ⟦ 𝑑 ⟧, ⇓, ⇑

▶ Mixfix notation

• _[_]≔_ is the vector update function: 𝗐 [ # 𝟦 ] ≔ 𝗎𝗌𝗏𝖿.
• _[_]≔_ 𝗐 (# 𝟦) 𝗎𝗌𝗏𝖿 ⟺ 𝗐 [ # 𝟦 ] ≔ 𝗎𝗌𝗏𝖿

▶ Almost nothing built-in

• _+_ ∶ ℕ → ℕ → ℕ defined in 𝖤𝖻𝗎𝖻.𝖮𝖻𝗎
• 𝗃𝗀_𝗎𝗂𝖿𝗈_𝖿𝗆𝗍𝖿_ ∶ 𝖢𝗉𝗉𝗆 → 𝛽 → 𝛽 → 𝛽 defined in 𝖤𝖻𝗎𝖻.𝖢𝗉𝗉𝗆

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 20

Agda syntax for Haskell programmers

▶ Implicit arguments

• Don’t have to be passed if Agda can guess it
• Syntax: 𝜁 ∶ {𝛽 ∶ 𝖳𝖿𝗎} → 𝖶𝖿𝖽 𝛽 𝗔𝖿𝗌𝗉

▶ “For all” syntax: ∀ 𝑜 ⟺ (𝑜 ∶ _)

• Where _ means: guess this type (based on other args)
• Example:
• ∀ 𝑜 → 𝗔𝖿𝗌𝗉 ≤ 𝑜
• 𝖾𝖻𝗎𝖻 _≤_ ∶ ℕ → ℕ → 𝖳𝖿𝗎

▶ It’s common to combine both:

• ∀ {𝛽 𝑜} → 𝖶𝖿𝖽 𝛽 (𝗍𝗏𝖽 𝑜) → 𝛽 ⟺

{𝛽 ∶ _} {𝑜 ∶ _} → 𝖶𝖿𝖽 𝛽 𝑜 → 𝛽

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 21

Circuit Syntax

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 22

Low-level circuits

▶ Structural representation ▶ Untyped but sized

𝖾𝖻𝗎𝖻 ℂ′ ∶ ℕ → ℕ → 𝖳𝖿𝗎 𝖾𝖻𝗎𝖻 ℂ′ 𝗑𝗂𝖿𝗌𝖿 𝖮𝗃𝗆 ∶ ℂ′ 𝗔𝖿𝗌𝗉 𝗔𝖿𝗌𝗉 𝖧𝖻𝗎𝖿 ∶ (𝑕# ∶ 𝖧𝖻𝗎𝖿𝗍#) → ℂ′ (|𝗃𝗈| 𝑕#) (|𝗉𝗏𝗎| 𝑕#) 𝖰𝗆𝗏𝗁 ∶ ∀ {𝑗 𝑝} → (𝑔 ∶ 𝖦𝗃𝗈 𝑝 → 𝖦𝗃𝗈 𝑗) → ℂ′ 𝑗 𝑝 𝖤𝖿𝗆𝖻𝗓𝖬𝗉𝗉𝗊 ∶ (𝑑 ∶ ℂ′ (𝑗 + 𝑚) (𝑝 + 𝑚)) {𝖽𝗉𝗇𝖼′ 𝑑} → ℂ′ 𝑗 𝑝 _⟫′_ ∶ ℂ′ 𝑗 𝑛 → ℂ′ 𝑛 𝑝 → ℂ′ 𝑗 𝑝 _|′_ ∶ ℂ′ 𝑗1 𝑝1 → ℂ′ 𝑗2 𝑝2 → ℂ′ (𝑗1 + 𝑗2) (𝑝1 + 𝑝2) _|+′_ ∶ ℂ′ 𝑗1 𝑝 → ℂ′ 𝑗2 𝑝 → ℂ′ (𝗍𝗏𝖽 (𝑗1 ⊔ 𝑗2)) 𝑝

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 23

Atoms

▶ How to carry values of an Agda type in one wire ▶ Defined by the 𝖡𝗎𝗉𝗇𝗃𝖽 type class in 𝖰𝗃𝖷𝖻𝗌𝖿.𝖡𝗎𝗉𝗇

𝗌𝖿𝖽𝗉𝗌𝖾 𝖡𝗎𝗉𝗇𝗃𝖽 ∶ 𝖳𝖿𝗎𝟤 𝗑𝗂𝖿𝗌𝖿 𝗀𝗃𝖿𝗆𝖾 𝖡𝗎𝗉𝗇 ∶ 𝖳𝖿𝗎 |𝖡𝗎𝗉𝗇|−𝟤 ∶ ℕ 𝗈→𝖻𝗎𝗉𝗇 ∶ 𝖦𝗃𝗈 (𝗍𝗏𝖽 |𝐵𝑢𝑝𝑛|−1) → 𝐵𝑢𝑝𝑛 𝖻𝗎𝗉𝗇→𝗈 ∶ 𝐵𝑢𝑝𝑛 → 𝖦𝗃𝗈 (𝗍𝗏𝖽 |𝐵𝑢𝑝𝑛|−1) 𝗃𝗈𝗐−𝗆𝖿𝗀𝗎 ∶ ∀ 𝑗 → 𝑏𝑢𝑝𝑛→𝑜 (𝑜→𝑏𝑢𝑝𝑛 𝑗) ≡ 𝑗 𝗃𝗈𝗐−𝗌𝗃𝗁𝗂𝗎 ∶ ∀ 𝑏 → 𝑜→𝑏𝑢𝑝𝑛 (𝑏𝑢𝑝𝑛→𝑜 𝑏) ≡ 𝑏 |𝖡𝗎𝗉𝗇| = 𝗍𝗏𝖽 |𝖡𝗎𝗉𝗇|−𝟤 𝖡𝗎𝗉𝗇# = 𝖦𝗃𝗈 |𝖡𝗎𝗉𝗇|

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 24

𝖡𝗎𝗉𝗇𝗃𝖽 instances

▶ Examples of types that can be 𝖡𝗎𝗉𝗇𝗃𝖽

• 𝖢𝗉𝗉𝗆, std_logic, other multi-valued logics
• Predefined in the library: 𝖰𝗃𝖷𝖻𝗌𝖿.𝖡𝗎𝗉𝗇.𝖢𝗉𝗉𝗆

▶ First, define how many atoms we are interested in

• Need at least 1 (later why)

|𝖢|−𝟤 = 𝟤 |𝖢| = 𝗍𝗏𝖽 |𝖢|−𝟤

▶ Friendlier names for the indices (elements of 𝖦𝗃𝗈 𝟥)

𝗊𝖻𝗎𝗎𝖿𝗌𝗈 𝖦𝖻𝗆𝗍𝖿# = 𝖦𝗔 𝗊𝖻𝗎𝗎𝖿𝗌𝗈 𝖴𝗌𝗏𝖿# = 𝖦𝗍 𝖦𝗔

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 25

𝖡𝗎𝗉𝗇𝗃𝖽 instance (𝖢𝗉𝗉𝗆)

▶ Bijection between {𝑜 ∈ ℕ | 𝑜 < 2} (𝖦𝗃𝗈 𝟥) and 𝖢𝗉𝗉𝗆

𝗈→𝖢 = 𝜇 { 𝖦𝖻𝗆𝗍𝖿# → 𝗀𝖻𝗆𝗍𝖿; 𝖴𝗌𝗏𝖿# → 𝗎𝗌𝗏𝖿 } 𝖢→𝗈 = 𝜇 { 𝗀𝖻𝗆𝗍𝖿 → 𝖦𝖻𝗆𝗍𝖿#; 𝗎𝗌𝗏𝖿 → 𝖴𝗌𝗏𝖿# }

▶ Proof that 𝗈→𝖢 and 𝖢→𝗈 are inverses

𝗃𝗈𝗐−𝗆𝖿𝗀𝗎−𝖢 = 𝜇 { 𝖦𝖻𝗆𝗍𝖿# → 𝗌𝖿𝗀𝗆; 𝖴𝗌𝗏𝖿# → 𝗌𝖿𝗀𝗆; } 𝗃𝗈𝗐−𝗌𝗃𝗁𝗂𝗎−𝖢 = 𝜇 { 𝗀𝖻𝗆𝗍𝖿 → 𝗌𝖿𝗀𝗆; 𝗎𝗌𝗏𝖿 → 𝗌𝖿𝗀𝗆 }

▶ With all pieces at hand, we construct the instance

𝖡𝗎𝗉𝗇𝗃𝖽−𝖢 = 𝗌𝖿𝖽𝗉𝗌𝖾 { 𝖡𝗎𝗉𝗇 = 𝖢 ; |𝖡𝗎𝗉𝗇|−𝟤 = |𝖢|−𝟤 ; 𝗈→𝖻𝗎𝗉𝗇 = 𝗈→𝖢 ; 𝖻𝗎𝗉𝗇→𝗈 = 𝖢→𝗈 ; 𝗃𝗈𝗐−𝗆𝖿𝗀𝗎 = 𝗃𝗈𝗐−𝗆𝖿𝗀𝗎−𝖢 ; 𝗃𝗈𝗐−𝗌𝗃𝗁𝗂𝗎 = 𝗃𝗈𝗐−𝗌𝗃𝗁𝗂𝗎−𝖢 }

.

. .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. .

Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 26

Gates

▶ Circuits parameterized by collection of fundamental gates ▶ Examples:

• {NOT, AND, OR} (𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉)
• {NAND}
• Arithmetic, Crypto, etc.

▶ The definition of what means to be such a collection is in

𝖰𝗃𝖷𝖻𝗌𝖿.𝖧𝖻𝗎𝖿𝗍.𝖧𝖻𝗎𝖿𝗍

.

. .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. .

Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 27

The 𝖧𝖻𝗎𝖿𝗍 type class

𝖷 ∶ ℕ → 𝖳𝖿𝗎 𝖷 = 𝖶𝖿𝖽 𝖡𝗎𝗉𝗇 𝗌𝖿𝖽𝗉𝗌𝖾 𝖧𝖻𝗎𝖿𝗍 ∶ 𝖳𝖿𝗎 𝗑𝗂𝖿𝗌𝖿 𝗀𝗃𝖿𝗆𝖾 |𝖧𝖻𝗎𝖿𝗍| ∶ ℕ |𝗃𝗈| |𝗉𝗏𝗎| ∶ 𝖦𝗃𝗈 |𝐻𝑏𝑢𝑓𝑡| → ℕ 𝗍𝗊𝖿𝖽 ∶ (𝑕 ∶ 𝖦𝗃𝗈 |𝐻𝑏𝑢𝑓𝑡|) → (𝖷 (|𝑗𝑜| 𝑕) → 𝖷 (|𝑝𝑣𝑢| 𝑕)) 𝖧𝖻𝗎𝖿𝗍# = 𝖦𝗃𝗈 |𝖧𝖻𝗎𝖿𝗍|

.

. .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. .

Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 28

𝖧𝖻𝗎𝖿𝗍 instances

▶ Example: 𝖰𝗃𝖷𝖻𝗌𝖿.𝖧𝖻𝗎𝖿𝗍.𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉 ▶ First, how many gates are there in the library

|𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉| = 𝟨

▶ Then the friendlier names for the indices

𝗊𝖻𝗎𝗎𝖿𝗌𝗈 𝖦𝖻𝗆𝗍𝖿𝖣𝗉𝗈𝗍𝗎# = 𝖦𝗔 𝗊𝖻𝗎𝗎𝖿𝗌𝗈 𝖴𝗌𝗏𝖿𝖣𝗉𝗈𝗍𝗎# = 𝖦𝗍 𝖦𝗔 𝗊𝖻𝗎𝗎𝖿𝗌𝗈 𝖮𝗉𝗎# = 𝖦𝗍 (𝖦𝗍 𝖦𝗔) 𝗊𝖻𝗎𝗎𝖿𝗌𝗈 𝖡𝗈𝖾# = 𝖦𝗍 (𝖦𝗍 (𝖦𝗍 𝖦𝗔)) 𝗊𝖻𝗎𝗎𝖿𝗌𝗈 𝖯𝗌# = 𝖦𝗍 (𝖦𝗍 (𝖦𝗍 (𝖦𝗍 𝖦𝗔)))

.

. .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. .

Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 29

𝖧𝖻𝗎𝖿𝗍 instance (𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉)

▶ Defining the interfaces of the gates

|𝗃𝗈| 𝖦𝖻𝗆𝗍𝖿𝖣𝗉𝗈𝗍𝗎# = 𝟣 |𝗃𝗈| 𝖴𝗌𝗏𝖿𝖣𝗉𝗈𝗍𝗎# = 𝟣 |𝗃𝗈| 𝖮𝗉𝗎# = 𝟤 |𝗃𝗈| 𝖡𝗈𝖾# = 𝟥 |𝗃𝗈| 𝖯𝗌# = 𝟥 |𝗉𝗏𝗎| _ = 𝟤

▶ And the specification function for each gate

𝗍𝗊𝖿𝖽−𝗀𝖻𝗆𝗍𝖿 _ = [ 𝗀𝖻𝗆𝗍𝖿 ] 𝗍𝗊𝖿𝖽−𝗎𝗌𝗏𝖿 _ = [ 𝗎𝗌𝗏𝖿 ] 𝗍𝗊𝖿𝖽−𝗈𝗉𝗎 (𝑦 ∷ 𝜁) = [ 𝗈𝗉𝗎 𝑦 ] 𝗍𝗊𝖿𝖽−𝖻𝗈𝖾 (𝑦 ∷ 𝑧 ∷ 𝜁) = [ 𝑦 ∧ 𝑧 ] 𝗍𝗊𝖿𝖽−𝗉𝗌 (𝑦 ∷ 𝑧 ∷ 𝜁) = [ 𝑦 ∨ 𝑧 ]

.

. .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. .

Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 30

𝖧𝖻𝗎𝖿𝗍 instance (𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉)

▶ Mapping each gate index to its respective specification

𝗍𝗊𝖿𝖽𝗍−𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉 𝖦𝖻𝗆𝗍𝖿𝖣𝗉𝗈𝗍𝗎# = 𝗍𝗊𝖿𝖽−𝗀𝖻𝗆𝗍𝖿 𝗍𝗊𝖿𝖽𝗍−𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉 𝖴𝗌𝗏𝖿𝖣𝗉𝗈𝗍𝗎# = 𝗍𝗊𝖿𝖽−𝗎𝗌𝗏𝖿 𝗍𝗊𝖿𝖽𝗍−𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉 𝖮𝗉𝗎# = 𝗍𝗊𝖿𝖽−𝗈𝗉𝗎 𝗍𝗊𝖿𝖽𝗍−𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉 𝖡𝗈𝖾# = 𝗍𝗊𝖿𝖽−𝖻𝗈𝖾 𝗍𝗊𝖿𝖽𝗍−𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉 𝖯𝗌# = 𝗍𝗊𝖿𝖽−𝗉𝗌

▶ With all pieces at hand, we construct the instance

𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉 ∶ 𝖧𝖻𝗎𝖿𝗍 𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉 = 𝗌𝖿𝖽𝗉𝗌𝖾 { |𝖧𝖻𝗎𝖿𝗍| = |𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉| ; |𝗃𝗈| = |𝗃𝗈| ; |𝗉𝗏𝗎| = |𝗉𝗏𝗎| ; 𝗍𝗊𝖿𝖽 = 𝗍𝗊𝖿𝖽𝗍−𝖢𝗉𝗉𝗆𝖴𝗌𝗃𝗉 }

.

. .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. .

Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 31

High-level circuits

▶ User is not supposed to describe circuits at low level (ℂ′) ▶ The high level circuit type (ℂ) allows for typed circuit

interfaces

• Input and output indices are Agda types

𝖾𝖻𝗎𝖻 ℂ (𝛽 𝛾 ∶ 𝖳𝖿𝗎) {𝑗 𝑘 ∶ ℕ} ∶ 𝖳𝖿𝗎 𝗑𝗂𝖿𝗌𝖿 𝖭𝗅ℂ ∶ ⦃ 𝑡𝛽 ∶ ⇓𝖷⇑ 𝛽 {𝑗} ⦄ ⦃ 𝑡𝛾 ∶ ⇓𝖷⇑ 𝛾 {𝑘} ⦄ → ℂ′ 𝑗 𝑘 → ℂ 𝛽 𝛾 {𝑗} {𝑘}

▶ 𝖭𝗅ℂ takes:

• Low level description (ℂ′)
• Information on how to synthesize elements of 𝛽 and 𝛾
• Passed as instance arguments (class constraints)

.

. .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. .

Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 32

Synthesizable

▶ ⇓𝖷⇑ type class (pronounced Synthesizable)

• Describes how to synthesize a given Agda type (𝛽)
• Two fields: from element of 𝛽 to a word and back

𝗌𝖿𝖽𝗉𝗌𝖾 ⇓𝖷⇑ (𝛽 ∶ 𝖳𝖿𝗎) {𝑗 ∶ ℕ} ∶ 𝖳𝖿𝗎 𝗑𝗂𝖿𝗌𝖿 𝖽𝗉𝗈𝗍𝗎𝗌𝗏𝖽𝗎𝗉𝗌 ⇓𝖷⇑[_, _] 𝗀𝗃𝖿𝗆𝖾 ⇓ ∶ 𝛽 → 𝖷 𝑗 ⇑ ∶ 𝖷 𝑗 → 𝛽

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 33

⇓𝖷⇑ instances

▶ Any finite type can have such an instance ▶ Predefined in the library: 𝖢𝗉𝗉𝗆; _×_; _⊎_; 𝖶𝖿𝖽 ▶ Example: instance for products (_×_)

⇓𝖷⇑−× ∶ ⦃ 𝑡𝛽 ∶ ⇓𝖷⇑ 𝛽 {𝑗} ⦄ ⦃ 𝑡𝛾 ∶ ⇓𝖷⇑ 𝛾 {𝑘} ⦄ → ⇓𝖷⇑ (𝛽 × 𝛾) ⇓𝖷⇑−× ⦃ 𝑡𝛽 ⦄ ⦃ 𝑡𝛾 ⦄ = ⇓𝖷⇑[ 𝖾𝗉𝗑𝗈 , 𝗏𝗊 ] 𝗑𝗂𝖿𝗌𝖿 𝖾𝗉𝗑𝗈 ∶ (𝛽 × 𝛾) → 𝖷 (𝑗 + 𝑘) 𝖾𝗉𝗑𝗈 (𝑏 , 𝑐) = (⇓ 𝑏) ++ (⇓ 𝑐) 𝗏𝗊 ∶ 𝖷 (𝑗 + 𝑘) → (𝛽 × 𝛾) 𝗏𝗊 𝑥 𝗑𝗃𝗎𝗂 𝗍𝗊𝗆𝗃𝗎𝖡𝗎 𝑗 𝑥 𝗏𝗊 .(⇓𝑏 ++ ⇓𝑐) | ⇓𝑏 , ⇓𝑐 , 𝗌𝖿𝗀𝗆 = ⇑ ⇓𝑏 , ⇑ ⇓𝑐

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 34

Synthesizable

▶ Both fields ⇓ and ⇑ should be inverses of each other

• Due to how high-level simulation is defined using ⇓ and ⇑

▶ Not enforced as a field of of ⇓𝖷⇑

• Too big of a proof burden while quick prototyping

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 35

Semantics

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 36

Circuit semantics

▶ Synthesis semantics: produce a netlist

• Tool integration / implement in FPGA or ASIC.

▶ Simulation semantics: execute a circuit

• Given circuit model and inputs, calculate outputs

▶ Other semantics possible:

• Timing analysis, power estimation, etc.
• This possibility guided Π-Ware’s development

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 37

Synthesis semantics

▶ Netlist: digraph with gates as nodes and buses as edges ▶ Synthesis semantics: given netlists of subcircuits, build

combination

Gate g# : ℂ (ins g#) (outs g#) g# : Gate#

ins g#

• uts g#

Gate g# Nil Nil : ℂ 0 0 i o : ℕ f : Fin o → Fin i Plug f : ℂ i o Plug f

i

• i

c

i+l

• +l

clk reset in

• ut

l l

• c : ℂ (i+l) (o+l)

DelayLoop : ℂ i o

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 38

Synthesis semantics

c₁

i m

c₂

m

• c₁ : ℂ i m

c₂ : ℂ m o c₁ ⟫' c₂ : ℂ i o c₁

i₁

• ₁

c₂

• ₂

i₂

• ₁+o₂

i₁+i₂

c₁ : ℂ i₁ o₁ c₂ : ℂ i₂ o₂ c₁ |' c₂ : ℂ (i₁+i₂) (o₁+o₂)

1+(i₁⊔i₂)

c₁

i₁

• c₂

i₂

• 1

U N P A D

• c₁ : ℂ i₁ o

c₂ : ℂ i₂ o c₁ |+' c₂ : ℂ (1+(i₁⊔i₂)) o

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 39

Synthesis semantics

Missing “pieces”:

▶ Adapt 𝖡𝗎𝗉𝗇𝗃𝖽

• New field: a 𝖶𝖨𝖤𝖬𝖴𝗓𝗊𝖿𝖤𝖿𝖽𝗆
• Such as: type ident is (elem1, elem2);
• Enumerations, integers (ranges), records.
• New field: 𝖻𝗎𝗉𝗇𝖶𝖨𝖤𝖬 ∶ 𝖡𝗎𝗉𝗇# → 𝖶𝖨𝖤𝖬𝖥𝗒𝗊𝗌

▶ Adapt 𝖧𝖻𝗎𝖿𝗍

• For each gate, a corresponding 𝖶𝖨𝖤𝖬𝖥𝗈𝗎𝗃𝗎𝗓
• 𝗈𝖿𝗎𝗆𝗃𝗍𝗎 ∶ (𝑕# ∶ 𝖧𝖻𝗎𝖿𝗍#) → 𝖶𝖨𝖤𝖬𝖥𝗈𝗎𝗃𝗎𝗓 (|𝗃𝗈| 𝑕#) (|𝗉𝗏𝗎| 𝑕#)
• The VHDL entity has the interface of corresponding gate

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 40

Simulation semantics

▶ Two levels of abstraction

• High-level simulation (⟦_⟧) for high-level circuits (ℂ)
• Low-level simulation (⟦_⟧′) for low-level circuits (ℂ′)

▶ Two kinds of simulation

• Combinational simulation (⟦_⟧) for stateless circuits
• Sequential simulation (⟦_⟧∗) for stateful circuits

▶ High level defined in terms of low level

⟦_⟧ ∶ ∀ {𝛽 𝑗 𝛾 𝑘} → (𝑑 ∶ ℂ 𝛽 𝛾 {𝑗} {𝑘}) → (𝛽 → 𝛾) ⟦ 𝖭𝗅ℂ ⦃ 𝑡𝛽 ⦄ ⦃ 𝑡𝛾 ⦄ 𝑑′ ⟧ = ⇑ ∘ ⟦ 𝑑′ ⟧′ ∘ ⇓

.

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 41

Combinational simulation (excerpt)

⟦_⟧′ ∶ ∀ {𝑗 𝑝} → (𝑑 ∶ ℂ′ 𝑗 𝑝) {𝑞 ∶ 𝖽𝗉𝗇𝖼′ 𝑑} → (𝖷 𝑗 → 𝖷 𝑝) ⟦ 𝖮𝗃𝗆 ⟧′ = 𝖽𝗉𝗈𝗍𝗎 𝜁 ⟦ 𝖧𝖻𝗎𝖿 𝑕# ⟧′ = 𝗍𝗊𝖿𝖽 𝑕# ⟦ 𝖰𝗆𝗏𝗁 𝑞 ⟧′ = 𝗊𝗆𝗏𝗁𝖯𝗏𝗎𝗊𝗏𝗎𝗍 𝑞 ⟦ 𝖤𝖿𝗆𝖻𝗓𝖬𝗉𝗉𝗊 𝑑 ⟧′ {()} 𝑤 ⟦ 𝑑1 ⟫′ 𝑑2 ⟧′ {𝑞1 , 𝑞2} = ⟦ 𝑑2 ⟧′ {𝑞2} ∘ ⟦ 𝑑1 ⟧′ {𝑞1} ⟦ _|+′_ {𝑗1} 𝑑1 𝑑2 ⟧′ {𝑞1 , 𝑞2} = [ ⟦ 𝑑1 ⟧′ {𝑞1} , ⟦ 𝑑2 ⟧′ {𝑞2} ]′ ∘ 𝗏𝗈𝗎𝖻𝗁 {𝑗1}

▶ Remarks:

• Proof requires 𝑑 to be combinational
• 𝖧𝖻𝗎𝖿 case uses specification function
• 𝖤𝖿𝗆𝖻𝗓𝖬𝗉𝗉𝗊 case can be discharged

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 42

Sequential simulation

▶ Inputs and outputs become 𝖳𝗎𝗌𝖿𝖻𝗇s

• ℂ′ 𝑗 𝑝 ⟹ 𝖳𝗎𝗌𝖿𝖻𝗇 (𝖷 𝑗) → 𝖳𝗎𝗌𝖿𝖻𝗇 (𝖷 𝑝)
• 𝖳𝗎𝗌𝖿𝖻𝗇: infinite list

▶ We can’t write a recursive evaluation function over 𝖳𝗎𝗌𝖿𝖻𝗇𝗍

• Sum case (_|+′_) needs a function of type

(𝖳𝗎𝗌𝖿𝖻𝗇 (𝛽 ⊎ 𝛾) → 𝖳𝗎𝗌𝖿𝖻𝗇 𝛽 × 𝖳𝗎𝗌𝖿𝖻𝗇 𝛾)

• What if there are no lefts (or rights)?

▶ A stream function is not an accurate model for hardware

• A function of type (𝖳𝗎𝗌𝖿𝖻𝗇 𝛽 → 𝖳𝗎𝗌𝖿𝖻𝗇 𝛾) can “look ahead”
• For example, 𝗎𝖻𝗃𝗆 (𝑦0 ∷ 𝑦1 ∷ 𝑦2 ∷ 𝑦𝑡) = 𝑦1 ∷ 𝑦2 ∷ 𝑦𝑡

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 43

Causal stream functions

Solution: sequential simulation based on causal stream function Some definitions:

▶ Causal context: past + present values

Γ𝖽 ∶ (𝛽 ∶ 𝖳𝖿𝗎) → 𝖳𝖿𝗎 Γ𝖽 𝛽 = 𝛽 × 𝖬𝗃𝗍𝗎 𝛽

▶ Causal stream function: produces one (current) output

_⇒𝖽_ ∶ (𝛽 𝛾 ∶ 𝖳𝖿𝗎) → 𝖳𝖿𝗎 𝛽 ⇒𝖽 𝛾 = Γ𝖽 𝛽 → 𝛾

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 44

Causal sequential simulation

▶ Core sequential simulation function:

⟦_⟧𝖽 ∶ {𝑗 𝑝 ∶ ℕ} → ℂ′ 𝑗 𝑝 → (𝖷 𝑗 ⇒𝖽 𝖷 𝑝) ⟦ 𝖮𝗃𝗆 ⟧𝖽 (𝑥0 , _) = ⟦ 𝖮𝗃𝗆 ⟧′ 𝑥0 ⟦ 𝖧𝖻𝗎𝖿 𝑕# ⟧𝖽 (𝑥0 , _) = ⟦ 𝖧𝖻𝗎𝖿 𝑕# ⟧′ 𝑥0 ⟦ 𝖰𝗆𝗏𝗁 𝑞 ⟧𝖽 (𝑥0 , _) = 𝗊𝗆𝗏𝗁𝖯𝗏𝗎𝗊𝗏𝗎𝗍 𝑞 𝑥0 ⟦ 𝖤𝖿𝗆𝖻𝗓𝖬𝗉𝗉𝗊 𝑑 {𝑞} ⟧𝖽 = 𝗎𝖻𝗅𝖿𝗐 𝑘 ∘ 𝖾𝖿𝗆𝖻𝗓 𝑑 {𝑞} ⟦ 𝑑1 ⟫′ 𝑑2 ⟧𝖽 = ⟦ 𝑑2 ⟧𝖽 ∘ 𝗇𝖻𝗊+ ⟦ 𝑑1 ⟧𝖽 ∘ 𝗎𝖻𝗃𝗆𝗍+

▶ 𝖮𝗃𝗆, 𝖧𝖻𝗎𝖿 and 𝖰𝗆𝗏𝗁 cases use combinational simulation ▶ 𝖤𝖿𝗆𝖻𝗓𝖬𝗉𝗉𝗊 calls a recursive helper (𝖾𝖿𝗆𝖻𝗓) ▶ Example structural case: _⟫′_ (sequence)

• Context of ⟦ 𝑑1 ⟧𝖽 is context of the whole compound
• Context of ⟦ 𝑑2 ⟧𝖽 is past and present outputs of c1

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 45

Sequential simulation

▶ We can then “run” the step-by-step function to produce a

whole 𝖳𝗎𝗌𝖿𝖻𝗇

• Idea from “The Essence of Dataflow

Programming” [Uustalu and Vene, 2005]

𝗌𝗏𝗈𝖽′ ∶ (𝛽 ⇒𝖽 𝛾) → (Γ𝖽 𝛽 × 𝖳𝗎𝗌𝖿𝖻𝗇 𝛽) → 𝖳𝗎𝗌𝖿𝖻𝗇 𝛾 𝗌𝗏𝗈𝖽′ 𝑔 ((𝑦0 , 𝑦−) , (𝑦1 ∷ 𝑦+)) = 𝑔 (𝑦0 , 𝑦−) ∷ ♯ 𝗌𝗏𝗈𝖽′ 𝑔 ((𝑦1 , 𝑦0 ∷ 𝑦−) , ♭ 𝑦+) 𝗌𝗏𝗈𝖽 ∶ (𝛽 ⇒𝖽 𝛾) → (𝖳𝗎𝗌𝖿𝖻𝗇 𝛽 → 𝖳𝗎𝗌𝖿𝖻𝗇 𝛾) 𝗌𝗏𝗈𝖽 𝑔 (𝑦0 ∷ 𝑦+) = 𝗌𝗏𝗈𝖽′ 𝑔 ((𝑦0 , []) , ♭ 𝑦+)

▶ Obtaining the stream-based simulation function:

⟦_⟧∗′ ∶ ∀ {𝑗 𝑝} → ℂ′ 𝑗 𝑝 → (𝖳𝗎𝗌𝖿𝖻𝗇 (𝖷 𝑗) → 𝖳𝗎𝗌𝖿𝖻𝗇 (𝖷 𝑝)) ⟦_⟧∗′ = 𝗌𝗏𝗈𝖽 ∘ ⟦_⟧𝖽

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 46

Proofs

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 47

Properties of circuits

▶ Tests and proofs about circuits depend on the semantics

• We focused on the functional simulation semantics
• Other possibilities (gate count, critical path, etc.)

▶ Very simple sample circuit to illustrate: XOR

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 48

Sample circuit: XOR

∨ℂ idℂ ¬ℂ ∧ℂ idℂ ¬ℂ ∧ℂ ×ℂ ⊻ℂ ⊻ℂ ∶ ℂ (𝖢 × 𝖢) 𝖢 ⊻ℂ = 𝗊𝖦𝗉𝗌𝗅× ⟫ (¬ℂ || 𝗃𝖾ℂ ⟫ ∧ℂ) || (𝗃𝖾ℂ || ¬ℂ ⟫ ∧ℂ) ⟫ ∨ℂ

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 49

Specification of XOR

▶ To define correctness we need a specification function

• Listing all possibilities (truth table)
• Based on pre-exisiting functions (standard library)

▶ Truth table

⊻ℂ−𝗍𝗊𝖿𝖽−𝗎𝖻𝖼𝗆𝖿 ∶ (𝖢 × 𝖢) → 𝖢 ⊻ℂ−𝗍𝗊𝖿𝖽−𝗎𝖻𝖼𝗆𝖿 (𝗀𝖻𝗆𝗍𝖿 , 𝗀𝖻𝗆𝗍𝖿) = 𝗀𝖻𝗆𝗍𝖿 ⊻ℂ−𝗍𝗊𝖿𝖽−𝗎𝖻𝖼𝗆𝖿 (𝗀𝖻𝗆𝗍𝖿 , 𝗎𝗌𝗏𝖿 ) = 𝗎𝗌𝗏𝖿 ⊻ℂ−𝗍𝗊𝖿𝖽−𝗎𝖻𝖼𝗆𝖿 (𝗎𝗌𝗏𝖿 , 𝗀𝖻𝗆𝗍𝖿) = 𝗎𝗌𝗏𝖿 ⊻ℂ−𝗍𝗊𝖿𝖽−𝗎𝖻𝖼𝗆𝖿 (𝗎𝗌𝗏𝖿 , 𝗎𝗌𝗏𝖿 ) = 𝗀𝖻𝗆𝗍𝖿

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 50

Proof of XOR (truth table)

⊻ℂ−𝗊𝗌𝗉𝗉𝗀−𝗎𝖻𝖼𝗆𝖿 ∶ ⟦ ⊻ℂ ⟧ (𝑏 , 𝑐) ≡ ⊻ℂ−𝗍𝗊𝖿𝖽−𝗎𝖻𝖼𝗆𝖿 (𝑏 , 𝑐) ⊻ℂ−𝗊𝗌𝗉𝗉𝗀−𝗎𝖻𝖼𝗆𝖿 𝗀𝖻𝗆𝗍𝖿 𝗀𝖻𝗆𝗍𝖿 = 𝗌𝖿𝗀𝗆 ⊻ℂ−𝗊𝗌𝗉𝗉𝗀−𝗎𝖻𝖼𝗆𝖿 𝗀𝖻𝗆𝗍𝖿 𝗎𝗌𝗏𝖿 = 𝗌𝖿𝗀𝗆 ⊻ℂ−𝗊𝗌𝗉𝗉𝗀−𝗎𝖻𝖼𝗆𝖿 𝗎𝗌𝗏𝖿 𝗀𝖻𝗆𝗍𝖿 = 𝗌𝖿𝗀𝗆 ⊻ℂ−𝗊𝗌𝗉𝗉𝗀−𝗎𝖻𝖼𝗆𝖿 𝗎𝗌𝗏𝖿 𝗎𝗌𝗏𝖿 = 𝗌𝖿𝗀𝗆

▶ Proof by case analysis

• Can probably be automated by

reflection [van der Walt and Swierstra, 2013]

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 51

Specification of XOR

▶ Based (_𝗒𝗉𝗌_) from 𝖤𝖻𝗎𝖻.𝖢𝗉𝗉𝗆

_𝗒𝗉𝗌_ ∶ 𝖢 → 𝖢 → 𝖢 𝗎𝗌𝗏𝖿 𝗒𝗉𝗌 𝑐 = 𝗈𝗉𝗎 𝑐 𝗀𝖻𝗆𝗍𝖿 𝗒𝗉𝗌 𝑐 = 𝑐

▶ Adapted interface to match exactly ⊻ℂ

⊻ℂ−𝗍𝗊𝖿𝖽−𝗍𝗏𝖼𝗀𝗏𝗈𝖽 ∶ (𝖢 × 𝖢) → 𝖢 ⊻ℂ−𝗍𝗊𝖿𝖽−𝗍𝗏𝖼𝗀𝗏𝗈𝖽 = 𝗏𝗈𝖽𝗏𝗌𝗌𝗓′ _𝗒𝗉𝗌_

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 52

Proof of XOR (pre-existing)

▶ Proof based on ⊻ℂ−𝗍𝗊𝖿𝖽−𝗍𝗏𝖼𝗀𝗏𝗈𝖽

⊻ℂ−𝗊𝗌𝗉𝗉𝗀−𝗍𝗏𝖼𝗀𝗏𝗈𝖽 ∶ ⟦ ⊻ℂ ⟧ (𝑏 , 𝑐) ≡ ⊻ℂ−𝗍𝗊𝖿𝖽−𝗍𝗏𝖼𝗀𝗏𝗈𝖽 (𝑏 , 𝑐) ⊻ℂ−𝗊𝗌𝗉𝗉𝗀−𝗍𝗏𝖼𝗀𝗏𝗈𝖽 = ⊻ℂ−𝗒𝗉𝗌−𝖿𝗋𝗏𝗃𝗐

▶ Need a lemma to complete the proof

• Circuit is defined using {NOT, AND, OR}
• _𝗒𝗉𝗌_ is defined directly by pattern matching

⊻ℂ−𝗒𝗉𝗌−𝖿𝗋𝗏𝗃𝗐 ∶ (𝗈𝗉𝗎 𝑏 ∧ 𝑐) ∨ (𝑏 ∧ 𝗈𝗉𝗎 𝑐) ≡ (𝑏 𝗒𝗉𝗌 𝑐)

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 53

Circuit “families”

▶ We can also prove properties of circuit “families” ▶ Example: an AND gate definition with generic number of

inputs 𝖻𝗈𝖾𝖮′ ∶ ∀ 𝑜 → ℂ′ 𝑜 𝟤 𝖻𝗈𝖾𝖮′ 𝗔𝖿𝗌𝗉 = ⊤ℂ′ 𝖻𝗈𝖾𝖮′ (𝗍𝗏𝖽 𝑜) = 𝗃𝖾ℂ′ |′ 𝖻𝗈𝖾𝖮′ 𝑜 ⟫′ ∧ℂ′

▶ Example proof: when all inputs are 𝗎𝗌𝗏𝖿, output is 𝗎𝗌𝗏𝖿

• For any number of inputs
• Proof by induction on 𝑜 (number of inputs)

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 54

Problems

▶ This proof is done at the low level

𝗊𝗌𝗉𝗉𝗀−𝖻𝗈𝖾𝖮′ ∶ ∀ 𝑜 → ⟦ 𝖻𝗈𝖾𝖮′ 𝑜 ⟧′ (𝗌𝖿𝗊𝗆𝗃𝖽𝖻𝗎𝖿 𝗎𝗌𝗏𝖿) ≡ [ 𝗎𝗌𝗏𝖿 ] 𝗊𝗌𝗉𝗉𝗀−𝖻𝗈𝖾𝖮′ 𝗔𝖿𝗌𝗉 = 𝗌𝖿𝗀𝗆 𝗊𝗌𝗉𝗉𝗀−𝖻𝗈𝖾𝖮′ (𝗍𝗏𝖽 𝑜) = 𝖽𝗉𝗈𝗁 (𝗍𝗊𝖿𝖽−𝖻𝗈𝖾 ∘ (_∷_ 𝗎𝗌𝗏𝖿)) (𝗊𝗌𝗉𝗉𝗀−𝖻𝗈𝖾𝖮′ 𝑜)

▶ Still problems with inductive proofs in the high level

• Guess: definition of ℂ and ⟦_⟧ prevent goal reduction

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 55

Sequential proofs

▶ Example of sequential circuit: a register

reg

s clk reset in

• ut

s s s mux arr fork

• i

s ℓ comb i ℓ

• ▶ Respective Π-Ware circuit description

𝗌𝖿𝗁 ∶ ℂ (𝖢 × 𝖢) 𝖢 𝗌𝖿𝗁 = 𝖾𝖿𝗆𝖻𝗓ℂ (𝖻𝗌𝗌 ⟫ 𝗇𝗏𝗒𝟥𝗎𝗉𝟤 ⟫ ×ℂ) 𝗑𝗂𝖿𝗌𝖿 𝖻𝗌𝗌 = (⇅ℂ || 𝗃𝖾ℂ) ⟫ 𝖡𝖬𝖲ℂ ⟫ (𝗃𝖾ℂ || ⇅ℂ)

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 56

Register example

▶ Example (test case) of register behaviour

𝗆𝗉𝖻𝖾𝗍 𝗃𝗈𝗊𝗏𝗎𝗍 ∶ 𝖳𝗎𝗌𝖿𝖻𝗇 𝖢𝗉𝗉𝗆 𝗆𝗉𝖻𝖾𝗍 = 𝗎𝗌𝗏𝖿 ∷ ♯ (𝗎𝗌𝗏𝖿 ∷ ♯ (𝗀𝖻𝗆𝗍𝖿 ∷ ♯ 𝗌𝖿𝗊𝖿𝖻𝗎 𝗀𝖻𝗆𝗍𝖿)) 𝗃𝗈𝗊𝗏𝗎𝗍 = 𝗎𝗌𝗏𝖿 ∷ ♯ (𝗀𝖻𝗆𝗍𝖿 ∷ ♯ (𝗎𝗌𝗏𝖿 ∷ ♯ 𝗌𝖿𝗊𝖿𝖻𝗎 𝗀𝖻𝗆𝗍𝖿)) 𝖻𝖽𝗎𝗏𝖻𝗆 = 𝗎𝖻𝗅𝖿 𝟧𝟥 (⟦ 𝗌𝖿𝗁 ⟧∗ $ 𝗔𝗃𝗊𝖷𝗃𝗎𝗂 _, _ 𝗃𝗈𝗊𝗏𝗎𝗍 𝗆𝗉𝖻𝖾𝗍) 𝗎𝖿𝗍𝗎−𝗌𝖿𝗁 = 𝖻𝖽𝗎𝗏𝖻𝗆 ≡ 𝗎𝗌𝗏𝖿 ◁ 𝗀𝖻𝗆𝗍𝖿 ◁ 𝗌𝖿𝗊𝗆𝗃𝖽𝖻𝗎𝖿 𝗀𝖻𝗆𝗍𝖿

▶ Still problems with infinite expected vs. actual comparisons

• Normal Agda equality (_≡_) does not work
• Need to use bisimilarity

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 57

Summary

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 58

What Π-Ware achieves

▶ Several design activities in the same language

• Description (untyped / typed)
• Simulation
• Synthesis
• Verification (inductive families of circuits)

▶ Well-typed descriptions (ℂ) at compile time

• Low-level descriptions (ℂ′) / netlists are well-sized

▶ Type safety and totality of simulation due to Agda

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 59

Current limitations / trade-offs

▶ Interface of generated netlists is always flat

• One input, one output

entity fullAdd8 is port ( inputs : in std_logic_vector(16 downto 0);

• utputs : out std_logic_vector(8 downto 0)

); end fullAdd8;

▶ Due to the indices of ℂ′ (naturals)

• Can’t distinguish ℂ′ (𝟤 + 𝟫 + 𝟫) (𝟫 + 𝟤) from ℂ′ 𝟤𝟪 𝟬

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 60

Current limitations / trade-offs

▶ Proofs for high-level families of circuits

• Probably due to definitions of ℂ and ⟦_⟧

▶ Proofs with infinite comparisons (sequential circuits)

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 61

Future work

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 62

Future work

▶ Automatic proof by reflection for finite cases ▶ Prove properties of combinators in Agda

• Algebraic properties

▶ Automatic generation of ⇓𝖷⇑ (Synthesizable) instances ▶ More (higher) layers of abstraction

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Thank you! Questions?

Mede mogelijk gemaakt door: . .... .. .. ... . .... .... .... ... . .... .... .... ... . .... .... .... ... . .. .. .. . . .. .. .... .. .

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 64

References I

Bjesse, P., Claessen, K., Sheeran, M., and Singh, S. (1998). Lava: hardware design in Haskell. SIGPLAN Not., 34(1):174–184. Launchbury, J., Lewis, J. R., and Cook, B. (1999). On embedding a microarchitectural design language within haskell. SIGPLAN Not., 34(9):60–69. Oury, N. and Swierstra, W. (2008). The power of pi. SIGPLAN Not., 43(9):39–50.

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 65

References II

Sander, I. and Jantsch, A. (1999). Formal system design based on the synchrony hypothesis, functional models, and skeletons. In VLSI Design, 1999. Proceedings. Twelfth International Conference On, pages 318–323. IEEE. Sheeran, M. (1984). MuFP, a language for VLSI design. In Proceedings of the 1984 ACM Symposium on LISP and Functional Programming, LFP ’84, pages 104–112, New York, NY, USA. ACM. Uustalu, T. and Vene, V. (2005). The essence of dataflow programming. In Proceedings of the Third Asian Conference on Programming Languages and Systems, APLAS’05, pages 2–18, Berlin, Heidelberg. Springer-Verlag.

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Introduction

What is Π-Ware Background

Research Question

Research Question / Methodology

DTP / Agda

Big picture Agda

Π-Ware

Circuit Syntax Semantics Proofs

Conclusions

Summary Future work 66

References III

van der Walt, P. and Swierstra, W. (2013). Engineering proof by reflection in Agda. In Implementation and Application of Functional Languages, pages 157–173. Springer. Wadler, P. (2014). Propositions as types. Unpublished note, http://homepages.inf.ed.ac.uk/ wadler/papers/propositions-as-types/ propositions-as-types.pdf.