Bruce Archambeault, PhD
IEEE Fellow, IBM Distinguished Engineer
Bruce.arch@ieee.org
Inductance and Partial Inductance What's it all mean? Bruce - - PowerPoint PPT Presentation
Inductance and Partial Inductance What's it all mean? Bruce Archambeault, PhD IEEE Fellow, IBM Distinguished Engineer Bruce.arch@ieee.org Inductance Probably the most misunderstood concept in electrical engineering Do not confuse
Bruce Archambeault, PhD
IEEE Fellow, IBM Distinguished Engineer
Bruce.arch@ieee.org
Bruce Archambeault, PhD 2
electrical engineering
– Do not confuse ‘inductance’ with ‘inductors’
– Self inductance – Loop inductance – Mutual inductance – Equivalent inductance – Partial inductance – Partial self inductance – Partial mutual inductance – Apparent inductance
Bruce Archambeault, PhD 3
inductance!
frequency and is MAJOR concern at high frequencies
Bruce Archambeault, PhD 4
Courtesy of Elya Joffe
Bruce Archambeault, PhD 5
⋅ ∂ ∂ − = ⋅ S d t B dl E
V B Area = A
Bruce Archambeault, PhD 6
“Ground Strap” SMT Capacitor PCB Via
Not until return path for current is identified!
Bruce Archambeault, PhD 7
⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ − ≈ 2 8 ln r a a L μ
⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ + − + − + + + + =
2 2
1 1 2 1 1 2 1 1 ln 2 p p p p p a L π μ
Note that inductance is directly influenced by loop AREA and less influenced by conductor size!
radius wire side
length p =
Bruce Archambeault, PhD 8
1 2 21 1 21 2
Loop #1 Loop #2
( )
⋅ = Φ
2
2 1 2
dS ˆ r B
S
n r How much magnetic flux is induced in loop #2 from a current in loop #1?
Bruce Archambeault, PhD 9
Bruce Archambeault, PhD 10
Bruce Archambeault, PhD 11
200 400 600 800 1000 0.5 1 1.5 2
X: 24 Y: 1.835
Spacing between the coils(mils) Mutual Inductance (nH) Change in mutual inductance with spacing
X: 100 Y: 0.7312 X: 500 Y: 0.02507 X: 1000 Y: 0.01955
The magnetic field drops
the mutual inductance
Bruce Archambeault, PhD 12
Loop #1 Loop #2
Less loop area in loop #2 means less magnetic flux in loop #2 and less mutual inductance
Loop #1 Loop #2
Less loop area perpendicular to the magnetic field in loop #2 means less magnetic flux in loop #2 and less mutual inductance
Bruce Archambeault, PhD 13
inductance
complete loop to have inductance
circuit?
Bruce Archambeault, PhD 14
Power Supply
And how could you possibly calculate it?
Courtesy of Dr. Clayton Paul
Bruce Archambeault, PhD 15
Lp4 Lp1 Lp3 Lp2 Mp1-3 Mp2-4
Total Loop Inductance from Partial Inductance
L total=Lp1+ Lp2 + Lp3 + Lp4 – 2Mp1-3 – 2Mp2-4
Courtesy of Dr. Clayton Paul
Bruce Archambeault, PhD 16
into pieces in order to find total inductance
L3 L4 L2 L1
L total=Lp11+ Lp22 + Lp33 + Lp44 - 2Lp13 - 2Lp24
Bruce Archambeault, PhD 17
Bruce Archambeault, PhD 18
Decoupling Capacitor Mounting
possible!
Height above Planes Via Separation
Inductance Depends
Bruce Archambeault, PhD 19
Via Capacitor Pads SMT Capacitor
The “Good” The “Bad” The “Ugly” Really “Ugly” Better Best
Bruce Archambeault, PhD 20
Bruce Archambeault, PhD 21
ability of a structure to hold charge (electrons) for a given voltage
stored is dependant
capacitance (and voltage)
Consider a capacitor as a bucket holding lot’s of electrons!
Bruce Archambeault, PhD 22 Comparison of Decoupling Capacitor Impedance 100 mil Between Vias & 10 mil to Planes
0.01 0.1 1 10 100 1000 1.0E+06 1.0E+07 1.0E+08 1.0E+09 1.0E+10 Frequency (Hz) Impedance (ohms) 1000pF 0.01uF 0.1uF 1.0uF
Bruce Archambeault, PhD 23
Via Barrel 10 mils 60 mils 20 mils 10 mils* 9 mils 9 mils 10 mils* 108 mils minimum 128 mils typical *Note: Minimum distance is 10 mils but more typical distance is 20 mils
Bruce Archambeault, PhD 24
Via Barrel 10 mils 40 mils 20 mils 10 mils* 8 mils 8 mils 10 mils* 86 mils minimum 106 mils typical *Note: Minimum distance is 10 mils but more typical distance is 20 mils
Bruce Archambeault, PhD 25
3.2 nH 3.7 nH 4.2 nH 100 3.0 nH 3.5 nH 3.9 nH 90 2.8 nH 3.2 nH 3.6 nH 80 2.6 nH 3.0 nH 3.4 nH 70 2.3 nH 2.7 nH 3.1 nH 60 2.1 nH 2.5 nH 2.8 nH 50 1.9 nH 2.2 nH 2.5 nH 40 1.6 nH 1.9 nH 2.2 nH 30 1.3 nH 1.6 nH 1.8 nH 20 0.9 nH 1.1 nH 1.2 nH 10 0402 typical/minimum (106 mils between via barrels) 0603 typical/minimu m (128 mils between via barrels) 0805 typical/minimum (148 mils between via barrels) Distance into board to planes (mils)
Connection Inductance for Typical Capacitor Configurations
Bruce Archambeault, PhD 26
Connection Inductance for Typical Capacitor Configurations with 50 mils from Capacitor Pad to Via Pad
4.6 nH 5.0 nH 5.5 nH 100 4.3 nH 4.7 nH 5.2 nH 90 4.0 nH 4.5 nH 4.9 nH 80 3.7 nH 4.2 nH 4.5 nH 70 3.5 nH 3.9 nH 4.2 nH 60 3.1 nH 3.5 nH 3.9 nH 50 2.8 nH 3.2 nH 3.5 nH 40 2.5 nH 2.8 nH 3.0 nH 30 2.0 nH 2.3 nH 2.5 nH 20 1.4 nH 1.6 nH 1.7 nH 10 0402 (166 mils between via barrels) 0603 (188 mils between via barrels) 0805 (208 mils between via barrels) Distance into board to planes (mils)
Bruce Archambeault, PhD 27
Trace GND Plane 22” trace 10 mils wide, 1 mil thick, 10 mils above GND plane
Bruce Archambeault, PhD 28
Trace GND Plane Shortest DC path For longest DC path, current returns under trace
Bruce Archambeault, PhD 29
Bruce Archambeault, PhD 30
Bruce Archambeault, PhD 31 U-shaped Trace Inductance PowerPEEC Results
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 Frequency (Hz) inductance (uH)
Bruce Archambeault, PhD 32
p p p p p p Parallel
M L L M L L L 2
2 1 2 2 1
− + − =
2 1 p p Parallel p p p
Only if parallel wires are FAR APART!
Courtesy of Dr. Clayton Paul
Bruce Archambeault, PhD 33
– Two capacitors vs one capacitor – Relative location of two capacitors – Use via between planes as ideal capacitor
Bruce Archambeault, PhD 34
Observation Point Via #1 Via #2 Moved in arc around Observation point while maintaining 500 mil distance to
500 mils distance
Bruce Archambeault, PhD 35
theta: angle as shown in the figure in degree d2: distance between Port 2 and Port 3 in mil d1: distance between Port 3 and Port 1 in mil d: thickness of dielectric layer in mil r: radius for all ports in mil R: distance between Port 1 and Port 2 in mil Courtesy of Jingook Kim, Jun Fan, Jim Drewniak Missouri University of Science and Technology
Port 2 Port 1
θ
( )
y x,
Port 3
( ) ( ) ( )
⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + + − ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ + + + r r d r R r d d r d r r d r R d
2 1 2 2 3 2 1 2
ln ln 4 ln 4 π μ π μ 2 sin 2
2 1
θ R d R d = =
( ) ( )
⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ + + =
3 4
) 2 / sin( 2 ln 4 r r R r R d θ π μ
1
d
2
d
R
Port 2 Port 1
θ
( )
y x,
Port 3
( ) ( ) ( )
⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + + − ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ + + + r r d r R r d d r d r r d r R d
2 1 2 2 3 2 1 2
ln ln 4 ln 4 π μ π μ 2 sin 2
2 1
θ R d R d = =
( ) ( )
⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ + + =
3 4
) 2 / sin( 2 ln 4 r r R r R d θ π μ
1
d
2
d
R
Lequiv
Bruce Archambeault, PhD 36 Effective Inductance for Various Distances to Decoupling Capacitor With Second Capacitor (Via) Equal Distance Around Circle Plane Seperation = 35 mil -- Via Diameter = 20 mil
500 600 700 800 900 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 2100 50 100 150 200 Angle (degrees) Inductnace (pH)
250 mil 500mil 750 mil 1000 mil
Bruce Archambeault, PhD 37 Effective Inductance for Various Distances to Decoupling Capacitor With Second Capacitor (Via) Equal Distance Around Circle Plane Seperation = 10 mil -- Via Diameter = 20 mil
50 100 150 200 250 300 350 400 450 500 50 100 150 200 Angle (degrees) Inductnace (pH) 500mil 250 mil 750 mil 1000 mil
Bruce Archambeault, PhD 38 Effective Inductance for Various Distances to Decoupling Capacitor With Second Capacitor (Via) Equal Distance Around Circle Plane Seperation = 5 mil -- Via Diameter = 20 mil
50 100 150 200 250 300 350 400 50 100 150 200 Angle (degrees) Inductnace (pH) 500mil 250 mil 750 mil 1000 mil
Bruce Archambeault, PhD 39
Understanding Inductance Effects and Proximity
1 via
10mm
2 via with degree 30° 2 via with degree 90° 2 via with degree 180°
20cm 20cm 10cm 10cm
Bruce Archambeault, PhD 40
A/m2
[m] [m]
A/m2
[m] [m]
A/m2
[m] [m]
A/m2
[m] [m]
Bruce Archambeault, PhD 41
8 8 8 8 8 8 1 6 1 6 16 1 6 16 2 4 24 2 4 24 32 3 2 32 4 4 40 48 48 48 56 56 56 64 64 64 64 72 72 80 80 8 8 0.08 0.0850.09 0.095 0.1 0.1050.11 0.1150.12 0.08 0.085 0.09 0.095 0.1 0.105 0.11 0.115 0.12 8 8 8 8 8 8 1 6 16 1 6 16 1 6 24 24 2 4 24 32 32 32 32 4 40 40 40 40 40 48 48 48 4 8 48 48 56 56 5 6 5 6 5 6 56 6 4 64 64 6 4 7 2 72 72 72 7 2 80 8 0.08 0.0850.09 0.095 0.1 0.1050.11 0.1150.12 0.08 0.085 0.09 0.095 0.1 0.105 0.11 0.115 0.12 8 8 8 8 8 8 16 1 6 1 6 16 16 16 24 24 24 24 32 32 32 32 4 40 40 48 4 8 48 56 56 56 56 64 6 4 6 4 64 7 2 7 2 7 2 7 2 80 80 80 80 0.08 0.0850.09 0.095 0.1 0.1050.11 0.1150.12 0.08 0.085 0.09 0.095 0.1 0.105 0.11 0.115 0.12 8 8 8 8 8 8 16 1 6 1 6 16 1 6 2 4 24 24 24 32 32 3 2 32 40 40 40 40 40 40 4 8 4 8 48 4 8 4 8 4 8 5 6 5 6 5 6 5 6 56 5 6 6 4 64 64 64 7 2 72 7 2 80 80 0.08 0.085 0.09 0.095 0.1 0.105 0.11 0.115 0.12 0.08 0.085 0.09 0.095 0.1 0.105 0.11 0.115 0.12
Bruce Archambeault, PhD 42
Case1 : 10 inches Case2 : 5 inches Case3 : 2 inches
1 inch Port1 Port2
Bruce Archambeault, PhD 43
Loop Inductance is Affected by Plane Width
~ 250pH ~ 330pH ~ 560pH
Case1 : 10 inches Case2 : 5 inches Case2 : 2 inches
Bruce Archambeault, PhD 44
Narrower planes means the multiple current paths are limited therefore effect of mutual inductance between parallel paths increases!
Bruce Archambeault, PhD 45
effective inductance to 70-75% of original single via case
inductance
gives same curve for all dielectric thicknesses
Bruce Archambeault, PhD 46
loops
amount of inductance
to understand which portions of the loop have the largest impact on loop inductance