Implementation of Self-Healing Asynchronous Circuits at the Example - - PowerPoint PPT Presentation

implementation of self healing asynchronous circuits at
SMART_READER_LITE
LIVE PREVIEW

Implementation of Self-Healing Asynchronous Circuits at the Example - - PowerPoint PPT Presentation

Implementation of Self-Healing Asynchronous Circuits at the Example of a Video-Processing Algorithm T. Panhofer W. Friesenbichler A. Steininger Vienna University of Technology Outline Motivation & Objective Asynchronous Logic


slide-1
SLIDE 1

Implementation of Self-Healing Asynchronous Circuits at the Example of a Video-Processing Algorithm

  • T. Panhofer W. Friesenbichler A. Steininger

Vienna University of Technology

slide-2
SLIDE 2

2

Outline

Motivation & Objective Asynchronous Logic Self-Healing Concept Case Study: SH implementation of

video processing algorithm

Experimental Results (& Lessons Learnt) Conclusion & Outlook

slide-3
SLIDE 3

3

The Nanoscale Challenges

significant parameter variations

threshold voltages, delays, leakages,…

increased rate of transient faults

lower voltage, smaller critical charge,…

increasing danger of permanent faults

more functions/chip, higher temperature

slide-4
SLIDE 4

4

Resulting Needs

significant parameter variations

need robust design methods that are inherently able to cope with these variations

increased rate of transient faults

need fault tolerance or robustness

increasing danger of permanent faults

need self-repair or „self-healing“

slide-5
SLIDE 5

5

Why Use Asynchronous Logic?

„delay insensitive“ operation

based on local handshaking (closed loop), not on global clock (open loop)

high robustness in time domain

two-rail coded data

high robustness in value domain

slide-6
SLIDE 6

6

FSL – How does it work?

implicit request explicit acknowledge

dual-rail encoded data two representations for HI/LO tokens in alternating „phases“

slide-7
SLIDE 7

7

How far does this get us?

  • significant parameter variations

delay-insensitive logic has a robust timing that can tolerate (virtually) all variations

  • increased rate of transient faults

two-rail coding, robust timing

increasing danger of permanent faults

still need self-repair or „self-healing“

slide-8
SLIDE 8

8

Requirements for „Self-Healing“

detection of (permanent) error

☺ DI logic tends to stop working in this case

identification of faulty cell

☺ handshake signals tend to point there

fault removal

☺ temporal robustness makes re-routing easier

slide-9
SLIDE 9

9

Self-Healing Concept (1)

slide-10
SLIDE 10

10

Self-Healing Concept (2)

Transformation Self-Healing Cell

slide-11
SLIDE 11

11

What‘s the Benefit over TMR?

both approaches tolerate first fault

TMR without interruption of service (2oo3) selfhealing possibly with interruption (1oo2)

self-healing is more fine-grained

more options to bypass defective element no need to rely on „luck“ (next defect not in

remaining operative nodes)

slide-12
SLIDE 12

12

Why not use dynamic Reconfig.?

for FPGAs only config interface = single point of failure how derive new configuration?

static => too memory intensive

need config for each defect set

dynamic => too performance intensive

need PPR tool on mission

slide-13
SLIDE 13

13

How control Reconfiguration?

Simple (=robust) solution:

[initial idea]

„random repair“ without diagnosis bits of a counter control switches count up upon watchdog timeout

=> new configuration

if defect not removed => circuit still halted

=> next timeout => new try

with first valid configuration circuit operation

continues

slide-14
SLIDE 14

14

Application Study: GAIA VPU

Part of the video processing algorithm used in the ESA space mission GAIA GAIA VPU = GAIA Video Processing Unit

linear correction dead column correction

slide-15
SLIDE 15

15

Why use this Application?

real-world circuit structure and size

pipeline with forks, joins and loops

typical space application

long mission time extreme environment high dependabiltiy required no manual repair possible

=> self-healing is attractive

slide-16
SLIDE 16

16

Environment for HW-Experiments

…embedded into the fault injection environment

STEFAN = Synthesizeable Test Environment For Asynchronous Networks

slide-17
SLIDE 17

17

HW Experiments – Results

Autonomous reconfiguration Single stuck-at fault injected at internal

acknowledge signal

Counter used as

reconfiguration controller

slide-18
SLIDE 18

18

HW Experiments – Resources

# of 4-input LUTs (Xilinx Virtex-4) Standard FPGAs can be used for prototyping of

asynchronous logic, but are not efficient

207% resources but multiple fault tolerance Reconfiguration Unit might have significant impact

slide-19
SLIDE 19

19

Lessons Learnt

In principle the idea works, BUT reconfiguration controller problematic

counter causes overhead => use LFSR too many values to try => split controllers ineffective repair attempts may corrupt state

=> need diagnosis and systematic repair

better solution:

block-wise diagnosis with local „random“ repair

slide-20
SLIDE 20

20

Conclusion

asynchronous logic can solve some of

the problems associated with nanoscale

permanent faults require self-repair,

asynchronous design aids in

detection reconfiguration and recovery

fine-grain repair beneficial over

component-level repair

presented solution shown to work in

principle but reconfiguration controller

slide-21
SLIDE 21

Thank you for your attention!

slide-22
SLIDE 22

22

Environment for Experiments

Self-Healing implementation…

slide-23
SLIDE 23

23

SHC Reliability vs. Overhead

Example: fine/coarse granular SHC adder

coarse grain: constant overhead fine grain: decreasing relative

  • verhead of

switches