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DCIS’04

1 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

Implementation of an RTZ code for feedback DAC on a Sigma-Delta modulator Implementation of an RTZ code for feedback DAC on a Sigma-Delta modulator

Jofre Pallarès1, Xavier Redondo1, Francesc Serra-Graells1, Justo Sabadell2

jofre.pallares@cnm.es, xavier.redondo@cnm.es, paco.serra@cnm.es and justo.sabadell@cnm.es 1 Institut de Microelectrònica de Barcelona-CNM, Spain 2 Barcelona Branch Office, Epson Europe Electronics, GmbH

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 2 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

1 1 Introduction 2 2 Waveform Assymetry Modelling 3 3 RTZ code consequences 4 4 Conclusions

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 3 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

1 1 Introduction 2 2 Waveform Assymetry Modelling 3 3 RTZ code consequences 4 4 Conclusions

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 4 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

Σ∆ modulator architecture

Continuous-time Single-loop 1-bit quantizer Log-domain

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 5 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

CMOS Log-Domain Simulation Issues

Very low-voltage Low-power MOS-only EKV equations High-accuracy Continuous-time Oversampling Pseudo-periodic

. . . need for high-level analytical modeling!

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 6 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

1 1 Introduction 2 2 Waveform Assymetry Modelling 3 3 RTZ code consequences 4 4 Conclusions

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 7 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

Waveform Asymmetry

Waveform asymmetry is enlarged due to log domain

• peration

Integration error exhibits code dependency Error power spectral density is plain inside signal band Error differences must be below 0.5% to achieve 12 bits! . . . need for another feedback code! → RTZ coding

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 8 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

Actual Wave Extracted Error Error Decomposition

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 9 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

1

2

C

A A N T − =

1

1 2 A A G P A + = − =

Easy parameter extraction

Based on bit-area differences Extracted from short transient electrical simulations

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 10 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

1 1 Introduction 2 2 Waveform Assymetry Modelling 3 3 RTZ code consequences 4 4 Conclusions

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 11 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

1 STF G ≈ 1 CTF G − ≈ A G reduction on feedback, can be viewed as a 1/ G amplification on signal

4 4 3 2

s NTF s GDs GCDs GBCDs GABCD = + + + + NTF doesn’t changes inside signal band (Quantization error E(s) is reduced by G)

Changes in transfer functions

( ) ( ) ( )

c

Y s STF X s NTF E s CTF N = ⋅ + ⋅ + ⋅

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 12 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

Changes in overall performance

Imax reduction

max c max max max c

I N I I G I N G ′ + ′ = ⇒ = − DR displacement

If quantization error is the main source of noise, a decrase on RTZ cycle produces a DR left-shift. A dynamically changed RTZ duty cycle allows us to work on best SNR point and expands DR.

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 13 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

1 1 Introduction 2 2 Waveform Assymetry Modelling 3 3 RTZ code consequences 4 4 Conclusions

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 14 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

High-level simulations

G+ Nc model matches RTZ simulation Simulation speed improvement > 10 times RTZ wave G+ Nc model 400 sec 30 sec

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 15 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

Electrical vs. High-level simulations

Electrical simulation allways needed for model validation Differences on noise floor due to ... numerical convergence , non-modeled effects Simulink Spectre 30 sec 75 hours

DCIS’04 Implementation of an RTZ code for feedback DAC on a Σ∆ modulator 16 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona Intro WA modelling RTZ study Conclusions

Conclusions

Simple, fast and easy to calculate high-level model for feedback DAC on continuous-time modulators Σ∆ presented Simulation speed improved around 10~ 10000 times Modulator complete performance estimations can be iterated RTZ duty cycle can be dynamically adjusted to work on

• ptimal operation conditions