Fei Li and Lei He Li and Lei He Fei ECE Dept. ECE Dept. - - PowerPoint PPT Presentation

Fei Fei Li and Lei He Li and Lei He ECE Dept. ECE Dept. University of Wisconsin University of Wisconsin – – Madison Madison http://eda.ece.wisc.edu http://eda.ece.wisc.edu

• Maximum Current Affects Power/Ground wires

Maximum Current Affects Power/Ground wires

– – Electromigration

Electromigration

– – IR voltage drop

IR voltage drop

– – Ground bounce

Ground bounce

– – Ldi

Ldi/ /dt dt inductive noise inductive noise

• Excessive Maximum Current may cause

Excessive Maximum Current may cause

– – Permanent circuit failure

Permanent circuit failure

– – Logic malfunction

Logic malfunction

– – Timing error

Timing error

• Previous Work

Previous Work

– – Find two input vectors that cause maximum switching current

Find two input vectors that cause maximum switching current

• Various Approaches Proposed

Various Approaches Proposed

– – Simulation

Simulation-

• based

based

– – ATPG

ATPG-

• based

based

• The Scaling Trend in Semiconductor Industry

The Scaling Trend in Semiconductor Industry

– – Scaling down of supply voltage (

Scaling down of supply voltage (Vdd Vdd) )

– – Reduction of transistor threshold voltage to compensate for

Reduction of transistor threshold voltage to compensate for performance loss performance loss

• Dynamic Power

Dynamic Power

– – Offset by the scaling down of

Offset by the scaling down of Vdd Vdd

• Leakage Power

Leakage Power

– – Increases exponentially when threshold voltage scales down

Increases exponentially when threshold voltage scales down

– – Anticipated to be comparable to dynamic power in a few

Anticipated to be comparable to dynamic power in a few generation generation

• Intel’s microprocessor in the past few technology

Intel’s microprocessor in the past few technology generations generations

• Leakage power soon becomes comparable to dynamic

Leakage power soon becomes comparable to dynamic power power

• Sleep transistor to power on or power off the circuit

Sleep transistor to power on or power off the circuit

• Power gating reduces leakage power as well as dynamic

Power gating reduces leakage power as well as dynamic power power

• Phenomena:

Phenomena:

– – All the gate output nodes in the functional unit will

All the gate output nodes in the functional unit will be discharged quickly during sleep mode be discharged quickly during sleep mode

– – Significant current spike is observed when the

Significant current spike is observed when the functional unit is powered on again functional unit is powered on again

• Power

Power-

• on current is different from normal switching
• n current is different from normal switching

current current

– – Dependent on one vector as the initial state is always “0”

Dependent on one vector as the initial state is always “0”

– – Related to size of sleep transistor and P/G noise

Related to size of sleep transistor and P/G noise

• Assumption

Assumption

– – The power

The power-

• on charging current is proportional to
• n charging current is proportional to

the total charge to be restored after wake the total charge to be restored after wake-

• up

up

• Objective

Objective

– – Maximize the total stored charge after the

Maximize the total stored charge after the functional unit is powered on functional unit is powered on

• Two Algorithms proposed by using ATPG technique

Two Algorithms proposed by using ATPG technique

– – Fanout

Fanout-

• based Algorithm

based Algorithm Imax/ Imax/Fanout Fanout

– – Gain

Gain-

• based Algorithm

based Algorithm Imax/Gain Imax/Gain

– – Both are heuristic algorithms

Both are heuristic algorithms

Imax/Fanout

• Figure of merit for the maximum current

Figure of merit for the maximum current

– –

is the logic value of gate is the logic value of gate g g, is the load , is the load capacitance of gate capacitance of gate g g. .

• It is a greedy algorithm

It is a greedy algorithm

– – Assign logic value 1 to gates in a greedy fashion

Assign logic value 1 to gates in a greedy fashion

– – Fanout

Fanout determines the order of gates to be assigned determines the order of gates to be assigned

• ⋅

⋅ =

gates the all for dd

• ut

i

V g F g VAL P ) ( ) (

) (g VAL

) (g Fout

Imax/Fanout (cont)

• Test generation technique is used to resolve the

Test generation technique is used to resolve the conflicts and get the input vector conflicts and get the input vector

– – Backtracing

Backtracing to choose the path that may maximize the to choose the path that may maximize the assignment of value 1 assignment of value 1

– – Backtracking to resolve the conflicts

Backtracking to resolve the conflicts

Imax/Gain

• The

The fanout fanout-

• based metric is somewhat local

based metric is somewhat local

• Gain

Gain defined as the new metric for each gate output to defined as the new metric for each gate output to

• bserve more globally
• bserve more globally
• Gain is computed by

Gain is computed by implication implication of the assignment

• f the assignment

– – Both

Both g g and and h h stand for gates stand for gates

– – IMP

IMP is the set of gates whose is the set of gates whose ouputs

• uputs are implied by the

are implied by the assignment assignment

• Gain is the global effect of one assignment within its

Gain is the global effect of one assignment within its implication range implication range

• ∈

+ +

⋅ − + ⋅ − =

IMP h

• ut

h V

• ut

v

h F g F v g gain )) ( ) 1 (( ) ( ) 1 ( ) , (

1 ) ( ) 1 (

2207 3524 214 228 524 650 872 1292 1527 2644 3406 223 517 688 882 1366 1545 2668 1799 210 500 1000 1500 2000 2500 3000 3500 4000 C432 C499 C880 C1355 C1908 C2670 C3540 C5315 C6288 C7552 Circuits Estimation(Pi) Imax/Fanout Imax/Gain

9.63 9.25 C7552 6.13 3.48 C6288 4.48 4.72 C5315 6.23 1.63 C3540 1.87 2.02 C2670 1.48 0.53 C1908 0.93 0.37 C1355 0.3 0.22 C880 0.24 0.15 C499 0.12 0.08 C432 Imax/Gain Imax/Fanout Runtime(sec) Circuit

Switch Current vs Power-on Current

524 688 1545 2668 1366 228 223 3524 2207 882 2911 898 196 183 3556 2556 1347 1161 368 388 500 1000 1500 2000 2500 3000 3500 4000 C432 C499 C880 C1355 C1908 C2670 C3540 C5315 C6288 C7552

Circuits Estimation(Pi)

Max Pow er-up Current Max Sw itching Current (+21.86%) (+16.33%) (+35.05%) (+86.96%) (-1.76%) (+17.66%) (+14.70%) (+4.38%) (-24.18%) (-0.90%)

• Power Gating may lead to more severe reliability

Power Gating may lead to more severe reliability problem problem

• Maximum Current Estimation Considering Power

Maximum Current Estimation Considering Power Gating should be used to guide P/G wires planning and Gating should be used to guide P/G wires planning and

• ptimization
• ptimization