Execution Secure Processors Eurocrypt May 1 st , 2017 Rafael Pass, - - PowerPoint PPT Presentation

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Execution Secure Processors Eurocrypt May 1 st , 2017 Rafael Pass, - - PowerPoint PPT Presentation

Formal Abstractions for Attested Execution Secure Processors Eurocrypt May 1 st , 2017 Rafael Pass, Elaine Shi, Florian Tramr Trusted hardware: Different communities, different world views 2 Trusted hardware: Different communities,


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Formal Abstractions for Attested Execution Secure Processors

Eurocrypt May 1st, 2017 Rafael Pass, Elaine Shi, Florian Tramèr

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Trusted hardware:

Different communities, different world views

2

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Trusted hardware:

Different communities, different world views

Crypto

Architecture Systems & Security

2

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Trusted hardware:

Different communities, different world views

Crypto

Architecture Systems & Security

  • “Minimal” trusted

hardware to circumvent theoretical impossibilities

  • Little concern about

practical performance

2

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Trusted hardware:

Different communities, different world views

Crypto

Architecture Systems & Security

  • “Minimal” trusted

hardware to circumvent theoretical impossibilities

  • Little concern about

practical performance

  • Trusted execution of

“general-purpose” user- defined progs

  • Cost-effectiveness,

reusability, expressivity

2

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3

TPM Bastion Sanctum Ascend XOM Aegis Iso-X Phantom GhostRider

Academia Industry

Architecture community converged on “attested execution”

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Architecture community converged on “attested execution”

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Attested Execution

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Client Server

Compute prog on inp

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Attested Execution

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Client Server Enclave

Compute prog on inp

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Attested Execution

5

Client Server

Verify

Enclave Manufacturer

Sign

Compute prog on inp

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Attested Execution

5

Client Server

Verify

Enclave Manufacturer

Sign

Compute prog on inp

  • utp, σ

Attestation that outp is correctly computed from prog and inp

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Why Ideal Abstractions?

6

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  • Formal security proofs for implementations

from precise abstractions and security models

Why Ideal Abstractions?

6

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  • Formal security proofs for implementations

from precise abstractions and security models

  • Ultimate Goal: Formally verified processor

implementing this formal abstraction

Why Ideal Abstractions?

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Formal Model

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𝓗att[Σ, reg]

Signature scheme Registry of all platforms with trusted hardware

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Formal Model

7

𝓗att[Σ, reg]

init():

, ⟵ Σ.KeyGen(1λ)

getpk() from P: send

to P

Signature scheme Registry of all platforms with trusted hardware

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SLIDE 17

Formal Model

7

𝓗att[Σ, reg]

init():

, ⟵ Σ.KeyGen(1λ)

getpk() from P: send

to P

install(prog, sid) from P ∊ reg: Signature scheme Registry of all platforms with trusted hardware

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Formal Model

7

𝓗att[Σ, reg]

init():

, ⟵ Σ.KeyGen(1λ)

getpk() from P: send

to P

install(prog, sid) from P ∊ reg: Signature scheme Registry of all platforms with trusted hardware (eid, P) ( sid, prog, M ) enclave id (nonce) enclave memory … …

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Formal Model

7

𝓗att[Σ, reg]

init():

, ⟵ Σ.KeyGen(1λ)

getpk() from P: send

to P

install(prog, sid) from P ∊ reg: resume(eid, inp) from P ∊ reg: Signature scheme Registry of all platforms with trusted hardware (eid, P) ( sid, prog, M ) enclave id (nonce) enclave memory … …

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Formal Model

7

𝓗att[Σ, reg]

init():

, ⟵ Σ.KeyGen(1λ)

getpk() from P: send

to P

install(prog, sid) from P ∊ reg: resume(eid, inp) from P ∊ reg: (out, M’) = prog(inp, M) Signature scheme Registry of all platforms with trusted hardware (eid, P) ( sid, prog, M ) enclave id (nonce) enclave memory … …

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Formal Model

7

𝓗att[Σ, reg]

init():

, ⟵ Σ.KeyGen(1λ)

getpk() from P: send

to P

install(prog, sid) from P ∊ reg: resume(eid, inp) from P ∊ reg: (out, M’) = prog(inp, M) Signature scheme Registry of all platforms with trusted hardware (eid, P) ( sid, prog, M ) enclave id (nonce) enclave memory … …

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Formal Model

7

𝓗att[Σ, reg]

init():

, ⟵ Σ.KeyGen(1λ)

getpk() from P: send

to P

install(prog, sid) from P ∊ reg: resume(eid, inp) from P ∊ reg: (out, M’) = prog(inp, M) σ = Σ.Sign( , eid, sid, prog, out) send (out, σ) to P Signature scheme Registry of all platforms with trusted hardware (eid, P) ( sid, prog, M ) enclave id (nonce) enclave memory … …

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Composability with Global State

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Composability with Global State

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Model 𝓗att as global ideal functionality [CDPW’07]

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Composability with Global State

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Model 𝓗att as global ideal functionality [CDPW’07]

𝓗att[Σ, reg]

Attestation key is shared across protocols

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Composability with Global State

Model 𝓗att as global ideal functionality [CDPW’07]

σ

𝓗att[Σ, reg]

9

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Composability with Global State

Model 𝓗att as global ideal functionality [CDPW’07]

σ

𝓗att[Σ, reg]

Example of concrete security issue:

Non-deniability for parties in reg

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The more interesting question

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The good

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Powerful Abstraction!

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The good

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Powerful Abstraction!

𝓗att ➔ ‘’Stateful Obfuscation’’ Impossible even with stateless tokens and cryptographic

  • bfuscation
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The good The surprise

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Powerful Abstraction!

𝓗att ➔ ‘’Stateful Obfuscation’’ Impossible even with stateless tokens and cryptographic

  • bfuscation

UC-Secure MPC?

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The good The surprise

11

Powerful Abstraction!

𝓗att ➔ ‘’Stateful Obfuscation’’ Impossible even with stateless tokens and cryptographic

  • bfuscation

UC-Secure MPC?

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The surprise

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UC-Secure MPC?

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Consider 2PC

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UC-secure 2PC possible if both parties have trusted hardware

Consider 2PC

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UC-secure 2PC possible if both parties have trusted hardware Impossible if only one party has trusted hardware!

Consider 2PC

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Impossible if only one party has trusted hardware!

Consider 2PC

This is counter-intuitive.

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Issue: non-deniability

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under global pk

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Issue: non-deniability

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under global pk

Convinced that some honest party in the registry participated in the protocol

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under global pk

Convinced that some honest party in the registry participated in the protocol

Non-issue if all nodes have trusted hardware

  • r if pk isn’t global
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What if we really really want to use a single trusted processor?

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What if we really really want to use a single trusted processor?

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Extra setup assumption: Augmented CRS

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What if we really really want to use a single trusted processor?

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Extra setup assumption: Augmented CRS

UC-Secure MPC with O(1) crypto operations

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What if we really really want to use a single trusted processor?

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Extra setup assumption: Augmented CRS Backdoor enclave program: allow simulator to extract inputs and program the outputs for corrupt parties

UC-Secure MPC with O(1) crypto operations

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Server

What if we really really want to use a single trusted processor?

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prog[f,𝓗acrs,𝒬1 … 𝒬n]

𝒬i

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Server

What if we really really want to use a single trusted processor?

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prog[f,𝓗acrs,𝒬1 … 𝒬n]

  • 1. Generate pki,ski

𝒬i

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Server

What if we really really want to use a single trusted processor?

19

prog[f,𝓗acrs,𝒬1 … 𝒬n]

  • 1. Generate pki,ski

𝒬i pki, σ Full protocol replaces σ by a WI-Proof

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Server

What if we really really want to use a single trusted processor?

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prog[f,𝓗acrs,𝒬1 … 𝒬n]

  • 1. Generate pki,ski

Key-exchange 𝒬i pki, σ Full protocol replaces σ by a WI-Proof

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Server

What if we really really want to use a single trusted processor?

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prog[f,𝓗acrs,𝒬1 … 𝒬n]

  • 1. Generate pki,ski
  • 1. Collect all inpi

Key-exchange 𝒬i pki, σ Encrypted inpi Full protocol replaces σ by a WI-Proof

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Server

What if we really really want to use a single trusted processor?

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prog[f,𝓗acrs,𝒬1 … 𝒬n]

  • 1. Generate pki,ski
  • 1. Collect all inpi
  • 2. Compute outp*

Key-exchange 𝒬i pki, σ Encrypted inpi Encrypted outpi Full protocol replaces σ by a WI-Proof

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Server

What if we really really want to use a single trusted processor?

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prog[f,𝓗acrs,𝒬1 … 𝒬n]

  • 3. Trapdoors

Sim

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Server

What if we really really want to use a single trusted processor?

20

prog[f,𝓗acrs,𝒬1 … 𝒬n]

  • 3. Trapdoors

check(𝒣acrs, 𝒬i, idi)

Sim extract(idi)

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Server

What if we really really want to use a single trusted processor?

20

prog[f,𝓗acrs,𝒬1 … 𝒬n]

  • 3. Trapdoors

check(𝒣acrs, 𝒬i, idi)

Sim extract(idi) ski Sim can recover inpi

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Server

What if we really really want to use a single trusted processor?

20

prog[f,𝓗acrs,𝒬1 … 𝒬n]

  • 3. Trapdoors

check(𝒣acrs, 𝒬i, idi) set outpi = v

Sim equivocate(idi, v)

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Fair 2PC?

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Fair 2PC?

  • Fairness impossible for general

functionalities in plain model [Cleve86]

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Fair 2PC?

  • Fairness impossible for general

functionalities in plain model [Cleve86]

Can trusted hardware help with fairness?

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UC-Secure Fair 2PC

Enhanced model: Clock-aware secure processor

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UC-Secure Fair 2PC

Enhanced model: Clock-aware secure processor

  • Fair 2PC possible if both parties have clock-

aware secure processors

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UC-Secure Fair 2PC

Enhanced model: Clock-aware secure processor

  • Fair 2PC possible if both parties have clock-

aware secure processors

  • Fair coin-tossing possible if one party has clock-

aware secure processors (+ ACRS)

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UC-Secure Fair 2PC

Enhanced model: Clock-aware secure processor

  • Fair 2PC possible if both parties have clock-

aware secure processors

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Enclaves establish secure channel

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Enclaves establish secure channel Enclaves exchange inputs and compute outputs

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Enclaves establish secure channel Enclaves exchange inputs and compute outputs “Will release to Alice in 2λ time” “Will release to Bob in 2λ time”

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Enclaves establish secure channel Enclaves exchange inputs and compute outputs “Will release to Alice in 2λ time” “Will release to Bob in 2λ time” “Will release to Alice in 2λ-1 time” “Will release to Bob in 2λ-1 time”

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Enclaves establish secure channel “Will release to Alice in 2λ-1 time” “Will release to Bob in 2λ-1 time” …

If Alice learns result at time t < 2λ, Bob will learn it at the latest by time 2t + no ‘’wasted’’ computation!

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What next?

Formal abstractions

  • f trusted hw
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What next?

Attested execution is a powerful assumption

⟹ Stateful Obfuscation, Efficient MPC, Fair 2PC

Formal abstractions

  • f trusted hw
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What next?

Attested execution is a powerful assumption

⟹ Stateful Obfuscation, Efficient MPC, Fair 2PC

Subtle issues unless all parties have trusted hardware

⟹ Non-deniability, Extra setup assumptions

Formal abstractions

  • f trusted hw
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What next?

Attested execution is a powerful assumption

⟹ Stateful Obfuscation, Efficient MPC, Fair 2PC

Subtle issues unless all parties have trusted hardware

⟹ Non-deniability, Extra setup assumptions

Formal abstractions

  • f trusted hw

Formally verified secure processor design

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What next?

Attested execution is a powerful assumption

⟹ Stateful Obfuscation, Efficient MPC, Fair 2PC

Subtle issues unless all parties have trusted hardware

⟹ Non-deniability, Extra setup assumptions

Formal abstractions

  • f trusted hw

Formally verified secure processor design Secure implementations from formally secure abstractions

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Thank You

Formal abstractions

  • f trusted hw

Formally verified secure processor design Secure implementations from formally secure abstractions