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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
Energy Harvesting: Strategies for ultra low power consumption and - - PowerPoint PPT Presentation
Energy Harvesting: Strategies for ultra low power consumption and - - PowerPoint PPT Presentation
Energy Harvesting: Strategies for ultra low power consumption and reliability. Antonio Rubio and Francesc Moll Universitat Politcnica de Catalunya (UPC) Electronic Engineering Department Barcelona, antonio.rubio@upc.edu CHIST- ERA Conference
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
Landauer’s limit
- 1. Technology evolution in terms of energy
106 times
ISSCC 2011 Trends Report
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011 POWER (W) Delay, (s)
10-15 10-15 10-12 10-9 10-6 10-3 100 103 10-9 10-12 10-6 10-3 100
neuron 2000 2002 2006 2010 2012
Fundamental Limits Technology limits
2004
- 1. TECHNOLOGY EVOLUTION AND LIMITS
- Sensitivity to internal
and external perturbances
- Memory robustness
J.. Meindl, “Low power microelectronics: retrospective and prospective” Proc. IEEE, 1995
- LG
OXIDE SUBSTRATE W
finSOURCE GATE DRAIN t
- x
H fin
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
In the field of Energy-autonomous wearable systems both Energy scavenging devices and Drastic circuit principles for ultra-low power are necessary, and require balanced research efforts
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
Energy harvesting, experiences:
- Piezoelectric generation
- Inductive generation
- 2. Energy harvesting
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
F1
Piezoelectric conversion Example of piezo measurements in a shoe
S1 S1
- L. Mateu, F, Moll, "Optimum piezoelectric bending beam structures for energy harvesting using shoe inserts", Journal of
Intelligent Material Systems and Structures, vol. 16, October 2005, pp. 835-845.
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
Inductive harvesting generators
- L. Mateu, C. Villavieja, F. Moll, "Physics-based time-domain model of a magnetic induction microgenerator", IEEE Trans. on
Magnetics, vol 43, no. 3, March 2007, pp. 992-1001.
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
- 3. Adiabatic logic: an alternative for reducing power consumption
Advantage: important reduction of power consumption Drawbacks: increase of complexity, pulsed power supplies, performances slow down
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
R C R C
CONCEPT OF ADIABATIC SWITCHING
CONVENTIONAL SWITCHING Energy dissipated in R: CVDD
2/2
ADIABATIC SWITCHING T Energy dissipated in R: (RC/T)CVDD
2/2
Making T>RC the dissipation energy in R can be lowered. If T ∞ dissipation 0.
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
CONCEPT OF ADIABATIC SWITCHING
Experimental example: The implementation of a ternary multiplier using Adiabatic CMOS logic. 0.7 m CMOS technology (1997)
- D. Mateo and A. Rubio, IEEE Journal of solid-state circuits, vol. 33, no. 7, July 1998.
circuit # devices power delay PDP Conventional CMOS 8x8 bits multiplier (3.3 volts) 2308 18 mW 38 ns 700 pJ Adiabatic ternary 5x5 trits multiplier (3.3 volts) 3850 4 W 17 s 70 pJ
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
CONCEPT OF ADIABATIC SWITCHING
Preliminary results about future technologies
technology circuit # devices power delay PDP 18 nm CMOS (*) Conventional CMOS 16x16 bits multiplier (0.9 volts) 1 20000 1 50 10 nm FinFET (*) Adiabatic 16x16 bits multiplier (0.6 volts) 2.8 1 1000 1
(*): Models from TRAMS project, EC FP7 248789
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
Reliability requirements and new reliable architectures are a key issue for future low voltage ultra-low power technologies
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
RELIABILITY PROBLEMS IN LOW VOLTAGE SYSTEMS
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
RELIABILITY ARCHITECTURAL SOLUTIONS FOR NEAR 0dB SNR
- Probabilistic logic, Markov Random Fields, Stochastic computation
- Von Neumann works, NMR strategy
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
HIGH RELIABILITY EXPERIMENTS (I)
TL: A new probabilistic logic based on port redundancy and information coherence
VDD=150 mV
Garcia-Leyva, L. et al, “A new probabilistic design methodology of nanoscale digital circuits”, CONIELECOMP’2011 Results from TRAMS project, EC FP7 248789
= 60 mV
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
HIGH RELIABILITY EXPERIMENTS (II)
An adaptive 4LRA redundant architecture
- N. Aymerich, S. Cotofana, A. Rubio, “Adaptive Fault-
Tolerant Architecture for Unreliable Device Technologies”, IEEE Nano 2011 Results from TRAMS Project EC FP7 248789
70% of saving in redundancy
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CHIST-ERA Conference 2011, “Green ICT, towards zero power ICT” Cork September 5th 2011
Conclusions
- Combined research efforts on both harvesting energy generation
and ultra low power design systems should pave the research road next years.
- New development of harvesting generators should be investigated
- Ultra low power design techniques as adiabatic logic, reversible
logic, probabilistic and stochastic computing could be key factors in future technology
- Special attention has to be dedicated to reliability: new reliable and