DEVICES and more... Andr Bourdoux 2 nd Vision for Future - - PowerPoint PPT Presentation

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DEVICES and more... Andr Bourdoux 2 nd Vision for Future - - PowerPoint PPT Presentation

DEVICES and more... Andr Bourdoux 2 nd Vision for Future Communications Systems 27 - 28 November 2019, University Institute of Lisbon (ISCTE-IUL) Technologies for Communications above 100GHz B5G/6G high capacity applications Towards


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SLIDE 1

DEVICES and more...

André Bourdoux 2nd Vision for Future Communications Systems 27 - 28 November 2019, University Institute of Lisbon (ISCTE-IUL)

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SLIDE 2

Technologies for Communications above 100GHz

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SLIDE 3

B5G/6G high capacity applications

Close proximity applications

Kiosk, automotive data, D2D

Multi-user AR/VR and holographic display Fixed wireless Access Wireless Backhaul/Fronthaul

Fixed point-to-point links for cellular networks

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Towards Terabit-Per-second wireless connectivity

1m 10m 100m >100m

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SLIDE 4

New radio spectrum to meet the 6G capacity Demand

▪ Wide bandwidths available at higher frequencies

▪ W-band: >17GHz ▪ D-band: > 30GHz ▪ 802.15.3d: > 50GHz

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Towards THz frequencies for Tbps wireless connectivity

6L/6U

100 10 20 30 40 50 60 70 80 90

11 13 15 18 23 26 38 71GHz - 86GHz 7/8 40 - 43 52 55 57 - 71 (TDD) 28 32

200 110 120 130 140 150 160 170 180 190 300 210 220 230 240 250 260 270 280 290 252GHz - 325GHz 92 GHz – 114.5 GHz 130 GHz – 174.8 GHz 310 320

5G mmWave V-band 802.11ad/ay E-band W-band D-band 802.15.3d

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SLIDE 5

Challenges from the antenna down to baseband

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Dj Dj Dj

upconversion

PLL

Dj Dj Dj

down conversion

PLL DSP ADC

Complex high- speed DSP CMOS power too small High spectral purity Sample rate of tens of GHz Losses of on- chip passive components Package, interconnect

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SLIDE 6

For THz range and high power, CMOS is saturating. The champions are the III-V/III-N devices`

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GaN is the power champion

GHz

III-V/III-N SiGe CMOS

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SLIDE 7

Current landscape in foundry technologies

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CMOS beats any other technology in integration level

InP/InGaAs GaAs GaN

speed

  • max. power

silicon III-V III-V technologies use very few metals (gold), extrinsic parasitics not optimized #transistors (log scale)

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SLIDE 8

The 3D interconnect technology landscape

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Package stacking Multi-die Packaging Interposer “2.5D” Embedded Die Die Stacking µbump Wafer-to-Wafer bonding Wafer-to-Wafer Sequential Processing

3D-SIP 3D-SIC 3D-SOC 3D-IC

Transistor Stacking 100 10 104 1000 105 107 108 1 106

Interconnect density (#/mm²)

100 µm 400µm 10 µm 1µm 100nm 1mm

Interconnect Pitch scaling

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SLIDE 9

ADC and DSP

▪ Baseband bandwidths grow to tens of GHz

▪ ADCs in the tens of Gsps range are needed ▪ Initially low spectral efficiency is required ▪ But eventually move to ~64QAM or so → ~7 to 9 bits

▪ DSP speed must follow

▪ Very high speed ▪ Heavy parallelization ▪ Multi-path is less frequent but can happen ▪ Equalizer schemes must be revisited to cope with tens of Gbauds equalization

▪ Digital vs analog ▪ Pre- vs post equalization to bring complexity where it can be afforded (AP, BS)

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Chip-antenna co-design above 100GHz

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EM and thermal challenges

Silicon IC III-V IC

(PA/LNA and antenna)

Silicon IC Silicon IC III-V IC

(PA/LNA) Antenna on interposer/package

  • r separate die

Antenna on Silicon die

140 GHz FMCW radar, 10GHz BW, with antenna on chip, in standard 28 nm CMOS (3 dB gain, 11dBm EIRP, 1 mm2 area)

Challenge: On-chip antenna design in CMOS Challenge: On-chip antenna design & low-parasitics IC/IC interconnect Challenge: On-interposer antenna design & low-parasitics IC/IC interconnect

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SLIDE 11

Radar-Communications convergence

▪ Observation:

▪ Radar and communications hardware, DSP and antennas are very similar ▪ Radar and communications use more and more multiple antennas/MIMO concepts ▪ Mm-wave comm (e.g. WiGig, 11ay at 60GHz) and mm-wave radar (automotive 77/79GHz) are well mastered technologies ▪ Some wireless communications functionality have much in common with radar

▪ Radar range profile vs channel estimation ▪ MIMO radar vs MIMO channel estimation (channel between all possible TX-RX pairs)

▪ Some developments and standardization already bridge the gap

▪ Wi-Fi based people detection, fall detection ▪ Some products, software stack appear (Origin Wireless, Cognitive Systems, Aura, ...) ▪ Wi-Fi sensing (IEEE 802.11 SENS TIG/SG)

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Radar-Communications convergence

▪ But much more is possible ▪ Massive MIMO/large phased array systems can enable high angle resolution radar for target tracking and environment mapping ▪ Distributed massive MIMO can be turned into bistatic or multi-view radars ▪ Mm-wave/THz systems, with multi-GHz bandwidth, can have cm-scale range resolution ▪ Both functionalities can support each other for

▪ Improved performance ▪ Yet-to-discover new joint modes of operation

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Green field for THz

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nLOS problem at mm-wave/THz

▪ Using phased array based relays/re-routers to create alternate LOS path while maintaining low latency

▪ Angle of incidence ≠ Angle of reflection

▪ Advantages

▪ Overcomes blockage/shadowing ▪ No Synchronization, handoff, and latency issues ▪ Low cost and lower power alternative

▪ Challenges

▪ Self-interference problem ➔ full duplex design techniques ▪ Multi-user

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Robust coverage with Phased Array Mirror

Source: Dina Katabi’s MIT

AP

Connected to PC and wall plug HMD Mirror Mirror Mirror Mirror

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SLIDE 14

Extreme Edge Processor

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SLIDE 15

Yesterday

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Cloud AI with extreme edge data

Extreme Edge Edge Cloud

DATA

Decisions

Learning & Inference

ISSUES:

  • Data growing faster

than connectivity

  • Privacy
  • Robustness
  • Latency
  • Power
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SLIDE 16

Today

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Decentralized AI

Extreme Edge Edge Cloud

DATA

Decisions

Centralized learning Distributed learning Edge inference

DATA

Model updates Decisions

ISSUES:

  • Data growing faster

than connectivity

  • Privacy
  • Robustness
  • Latency
  • Power
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Tomorrow

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Moving AI to the extreme edge

Extreme Edge Edge Cloud Centralized learning Distributed learning Edge inference

DATA

Extreme edge AI

(fast, low power, safe, autonomous) Analog vs digital trade-off

DATA

Model updates Slowest decisions Model updates Slow decisions

ISSUES:

  • Data growing faster

than connectivity

  • Privacy even better
  • Robustness
  • Latency
  • Power
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PUBLIC

Neuromorphic Processor

Dimensions along which compute technologies can be neuromorphic

  • Sequential vs. massively parallel
  • Clocked vs. asynchronous
  • Event-based processing
  • Spiking NN
  • Analog vs. digital
  • Von-Neumann vs. non-Von Neumann

(compute-in-memory)

  • High-bit to Low-bit precision
  • Learning from much labeled data vs.

learning from little unlabeled data This is NOT a traditional CPU/GPU/TPU/FPGA/ARM/...

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SLIDE 19

Conclusions

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Conclusions

▪ Communications above 100 GHz at tens of Gbit/s call for:

▪ Better devices for the RF part: III/V, III/N or GaN on CMOS ▪ Faster ADCs, tens of Gsps, 7+ bits ▪ Rethinking equalization schemes ▪ Intelligent non-specular mirror might help in some cases ▪ Chip-antenna co-design (antennas on chip become feasible) ▪ Exploiting the third dimension for bonding/stacking

▪ Joint radar and communications

▪ Leveraging massive arrays and mm-wave/THz bandwidth for high througput and high resolution ▪ New joint modes of operation

▪ Extreme edge computing is a new paradigm calling for

▪ A new breed of processor ▪ New learning modes (mostly unsupervised) ▪ Analog vs digital for extreme low power ▪ Computing-connectivity tarde-off

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Key research areas

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SLIDE 21

CONFIDENTIAL

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SLIDE 22

Back-up slides

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SLIDE 23

CMOS cannot do it alone anymore

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III-V (InP or GaN)

  • r Si

bipolar

Dj Dj Dj

finFET to be investigated splitter upconversion

PLL

Dj Dj Dj

finFET down conversion

PLL III-V (InP or GaN)

  • r Si

bipolar IC technologies DSP ADC

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SLIDE 24

Marrying III-V with silicon?

▪ Several attempts to improve yield and economics of III-V

▪ GaN on 300 mm Si wafers instead of GaN on SiC

▪ High-mobility III-V combined with CMOS

▪ Monolithic, see ▪ Challenge: overcome lattice mismatch, mismatch in thermal coefficients

▪ Alternative: 3D combination of CMOS with III-V

▪ Wafer-level hybrid bonding ▪ Die-to-wafer, wafer-to-wafer, die-to-die ▪ Sequential 3D

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Combine best of both worlds

III-V

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Which IC technology for > 100 GHz ?

III-V devices outperform Si(Ge) & GaN devices in speed, output power and efficiency > 100GHz

https://gems.ece.gatech.edu/PA_survey.html

InGaAs mHEMT InGaAs HBT

Intel, IEDM 2019 GaN Device-level, VD=2.5V, L=50nm

HRL, L=20nm 130nm InP-HBT