Dependent Types -Ware: Hardware Description with Next steps Dive - PowerPoint PPT Presentation

. . Intro . .. . . .. . .. Context . . .. . . .. . . Quick intro Inspired by . 1 Utrecht University Department of Information and Computing Sciences <w.s.swierstra@uu.nl> dr. W. S. Swierstra <j.p.pizaniflor@students.uu.nl> João Paulo Pizani Flor, B.Sc Dependent Types Π-Ware: Hardware Description with Next steps Dive into Current work steps Current / next Netlists Semantics / Reasoning Two levels of abstraction Circuit syntax Π-Ware .. . . .. . .. . . .. . . . .. . .. . . .. . . .. . . .. .. . . .. . . .. . . . . . .. . . .. . . .. Saturday 12 th July, 2014

. .. Inspired by Context Quick intro Intro . .. . . . Π-Ware . .. . . .. . . .. Dive into Circuit syntax . Context Current work Current / next steps Netlists Semantics / Reasoning Two levels of abstraction Circuit syntax Dive into Π-Ware Inspired by Quick intro Two levels of abstraction Intro Table of Contents 2 Next steps Current work steps Current / next Netlists Semantics / Reasoning . .. . .. . . .. . . .. . . . . . .. . . .. . . .. .. . . . . .. . . .. . . .. . .. .. . . .. . . .. . . Next steps

. .. .. . . .. . . . . . .. . . .. . . . .. . Semantics / Reasoning Section 1 3 Next steps Current work steps Current / next Netlists Two levels of abstraction . Circuit syntax Π-Ware Dive into Inspired by Context Quick intro Intro .. . . . .. . . .. . . .. . . .. . . .. . . .. . .. .. . . . .. . . .. . .. . . . .. . . .. . Intro

. . . . .. . . .. . .. . . . .. . . .. . .. Intro .. Current / next Agda for modeling hardware, synthesizing it and reasoning Π-Ware is a Domain-Specific Language (DSL) embedded in One-sentence definition 4 Next steps Current work steps Netlists Quick intro Semantics / Reasoning Two levels of abstraction Circuit syntax Π-Ware Dive into Inspired by Context . . . . .. . . .. . . .. . . .. . . .. . . .. . .. . . .. . . .. . . .. . . .. . . .. . . .. . about its properties.

. .. . .. . . .. . . . .. . .. . . .. . . . . . Netlists Hardware design is a complex and “booming” activity: Hardware Design 5 Next steps Current work steps Current / next Semantics / Reasoning Intro Two levels of abstraction Circuit syntax Π-Ware Dive into Inspired by Context Quick intro .. . . . .. .. . .. . . .. . . .. . . .. . . .. . . .. . . . .. . . .. . . .. . . .. . . .. . ▶ Algorithms increasingly benefit from hardware acceleration • Moore’s Law still holds • Microarchitecture optimization has diminishing returns ▶ Hardware development has stricter requirements • Mistakes found in “production” are much more serious • Thus the need for extensive validation/verification • Can encompass up to 50% of total development costs ▶ Need to combine productivity/ease-of-use with rigor • Detect mistakes early

. . . . .. . . .. . .. . . . .. . . .. . .. Intro .. Current / next hardware design (since the 1980s). Functional programming has already been used to help Hardware design 6 Next steps Current work steps Netlists Quick intro Semantics / Reasoning Two levels of abstraction Circuit syntax Π-Ware Dive into Inspired by Context . . . . .. . . .. . . .. . . .. . . .. . . .. . . .. . .. . . .. . . . .. . .. . . .. . . .. . ▶ First, independent DSLs (e.g. muFP) ▶ Then, as embedded DSLs • Prominently, in Haskell ▶ Question: How to use DTP to benefit hardware design? • Experimenting by embedding in a DTP language • Namely, Π-Ware is embedded in Agda (ITT, Martin-Löf)

. .. . .. . . .. . . . .. . .. . . .. . . . . . Netlists Not exclusively … Some features of Agda important for us 7 Next steps Current work steps Current / next Semantics / Reasoning Intro Two levels of abstraction Circuit syntax Π-Ware Dive into Inspired by Context Quick intro .. . . . .. .. . .. . . .. . . .. . . .. . . .. . . .. . . . .. . . .. . . .. . . .. . . .. . ▶ Dependent inductive families • Circuits are indexed by the sizes/types of their ports ▶ Dependent pattern matching ▶ “Dependent type classes” • Dependent records + instance arguments ▶ Coinductive types / proofs • When modeling / proving sequential behaviour ▶ Parameterized modules

. .. .. . . .. . . . . . .. . . .. . . . .. . Semantics / Reasoning Credit where credit is due 8 Next steps Current work steps Current / next Netlists Two levels of abstraction . Circuit syntax Π-Ware Dive into Inspired by Context Quick intro Intro .. . . . .. .. . .. . . .. . . .. . . .. . . .. . . .. . . . .. . . .. . . .. . . .. . . .. . ▶ Lava – Haskell (Chalmers) • Pragmatic, easy-to-use, popular ▶ ForSyDe – Haskell (KTH) • Hierarchical synthesis • Static size checking ▶ Coquet – Coq (INRIA) • Main influence • Reasoning about circuit behaviour with Coq’s tactics • Models circuits with structural combinators

. .. .. . . .. . . . . . .. . . .. . . . .. . Semantics / Reasoning Section 2 9 Next steps Current work steps Current / next Netlists Two levels of abstraction . Circuit syntax Π-Ware Dive into Inspired by Context Quick intro Intro .. . . . .. . . .. . . .. . . .. . . .. . . .. . .. .. . . . .. . . .. . .. . . . .. . . .. . Dive into Π-Ware

. .. . .. . . .. . . . .. . .. . . .. . . . . . Netlists 𝖮𝗃𝗆 Modeling circuits 10 Next steps Current work steps Current / next Semantics / Reasoning Intro Two levels of abstraction Circuit syntax Π-Ware Dive into Inspired by Context Quick intro .. . . . .. . . .. . . .. . . .. . . .. . . .. . .. .. . . . . . . .. . .. .. . . .. . . .. . ▶ Deep-embedded – explicit circuit inductive family: ℂ ′ ▶ Descriptions are at gate level and architectural • Fundamental constructors: 𝖮𝗃𝗆 , 𝖧𝖻𝗎𝖿 (parameterized) • Constructors for structural combination 𝖾𝖻𝗎𝖻 ℂ ′ ∶ ℕ → ℕ → 𝖳𝖿𝗎 𝖾𝖻𝗎𝖻 ℂ ′ 𝗑𝗂𝖿𝗌𝖿 ∶ ℂ ′ 𝗔𝖿𝗌𝗉 𝗔𝖿𝗌𝗉 𝖧𝖻𝗎𝖿 ∶ (𝑕# ∶ 𝖧𝖻𝗎𝖿𝗍#) → ℂ ′ (𝗃𝗈𝗍 𝑕#) (𝗉𝗏𝗎𝗍 𝑕#) 𝖰𝗆𝗏𝗁 ∶ {𝑗 𝑝 ∶ ℕ} → (𝑔 ∶ 𝖦𝗃𝗈 𝑝 → 𝖦𝗃𝗈 𝑗) → ℂ ′ 𝑗 𝑝 _ ⟫ ′ _ ∶ {𝑗 𝑛 𝑝 ∶ ℕ} → ℂ ′ 𝑗 𝑛 → ℂ ′ 𝑛 𝑝 → ℂ ′ 𝑗 𝑝 _ | ′ _ ∶ {𝑗 1 𝑝 1 𝑗 2 𝑝 2 ∶ ℕ} → ℂ ′ 𝑗 1 𝑝 1 → ℂ ′ 𝑗 2 𝑝 2 → ℂ ′ (𝑗 1 + 𝑗 2 ) (𝑝 1 + 𝑝 2 ) _ | + ′ _ ∶ {𝑗 1 𝑗 2 𝑝 ∶ ℕ} → ℂ ′ 𝑗 1 𝑝 → ℂ ′ 𝑗 2 𝑝 → ℂ ′ (𝗍𝗏𝖽 (𝑗 1 ⊔ 𝑗 2 )) 𝑝

. . . . .. . . .. . .. . . . .. . . .. . .. Intro .. steps = ⊤ = ⊤ = ⊤ Sequential circuits 11 Next steps Current work Current / next Quick intro Netlists Semantics / Reasoning Two levels of abstraction Circuit syntax Π-Ware Dive into Inspired by Context . . . . .. . . .. . . .. . . .. . . .. . . .. . . .. . .. . . . . . .. .. . .. . . .. . .. . . ▶ Built using 𝖤𝖿𝗆𝖻𝗓𝖬𝗉𝗉𝗊 , introduces state (latch) 𝖤𝖿𝗆𝖻𝗓𝖬𝗉𝗉𝗊 ∶ {𝑗 𝑝 𝑚 ∶ ℕ} (𝑑 ∶ ℂ ′ (𝑗 + 𝑚) (𝑝 + 𝑚)) {𝑞 ∶ 𝖽𝗉𝗇𝖼 ′ 𝑑} → ℂ ′ 𝑗 𝑝 ▶ Avoid evaluating combinational loops by carrying a proof 𝖽𝗉𝗇𝖼 ′ ∶ {𝑗 𝑝 ∶ ℕ} → ℂ ′ 𝑗 𝑝 → 𝖳𝖿𝗎 𝖽𝗉𝗇𝖼 ′ 𝖮𝗃𝗆 𝖽𝗉𝗇𝖼 ′ (𝖧𝖻𝗎𝖿 _ ) 𝖽𝗉𝗇𝖼 ′ (𝖰𝗆𝗏𝗁 _ ) 𝖽𝗉𝗇𝖼 ′ (𝖤𝖿𝗆𝖻𝗓𝖬𝗉𝗉𝗊 _ ) = ⊥ 𝖽𝗉𝗇𝖼 ′ (𝑑 1 ⟫ ′ 𝑑 2 ) = 𝖽𝗉𝗇𝖼 ′ 𝑑 1 × 𝖽𝗉𝗇𝖼 ′ 𝑑 2

. .. Inspired by Context Quick intro Intro . .. . . . Π-Ware . .. . . .. . . .. Dive into Circuit syntax . 𝖡𝗎𝗉𝗇 ∶ ∀ 𝑗 → 𝑏𝑢𝑝𝑛 → 𝑜 (𝑜 → 𝑏𝑢𝑝𝑛 𝑗) ≡ 𝑗 𝗃𝗈𝗐 − 𝗆𝖿𝗀𝗎 ∶ 𝐵𝑢𝑝𝑛 → 𝖦𝗃𝗈 (𝗍𝗏𝖽 |𝐵𝑢𝑝𝑛| − 1) 𝖻𝗎𝗉𝗇 → 𝗈 ∶ 𝖦𝗃𝗈 (𝗍𝗏𝖽 |𝐵𝑢𝑝𝑛| − 1) → 𝐵𝑢𝑝𝑛 𝗈 → 𝖻𝗎𝗉𝗇 |𝖡𝗎𝗉𝗇| − 𝟤 ∶ ℕ ∶ 𝖳𝖿𝗎 𝗀𝗃𝖿𝗆𝖾 Two levels of abstraction Abstraction ( 𝖡𝗎𝗉𝗇𝗃𝖽 ) 12 Next steps Current work steps Current / next Netlists Semantics / Reasoning . . .. .. . . .. . . .. . . . . . .. . . .. . . .. . .. . .. . .. . . .. . . .. . . 𝗃𝗈𝗐 − 𝗌𝗃𝗁𝗂𝗎 ∶ ∀ 𝑏 → 𝑜 → 𝑏𝑢𝑝𝑛 (𝑏𝑢𝑝𝑛 → 𝑜 𝑏) ≡ 𝑏 .. . . .. . . .. . . ▶ Circuits operate over words , which are made of 𝖡𝗎𝗉𝗇 • PiWare “ships” with 𝖢𝗉𝗉𝗆 atoms • Another example: IEEE1164 multi-valued ( std_logic ) 𝗌𝖿𝖽𝗉𝗌𝖾 𝖡𝗎𝗉𝗇𝗃𝖽 ∶ 𝖳𝖿𝗎 𝟤 𝗑𝗂𝖿𝗌𝖿