DA-conversion, usually PWM A DA converter takes too much space on - - PowerPoint PPT Presentation

▶
da conversion usually pwm
SMART_READER_LITE
LIVE PREVIEW

DA-conversion, usually PWM A DA converter takes too much space on - - PowerPoint PPT Presentation

Jan 16, 2023 369 likes •540 views

DA-conversion, usually PWM A DA converter takes too much space on the processor chip. The most common DA solution is instead a pulse width modulator. Many components "notice" no difference between a stable analog value or the

slide-1
SLIDE 1

DA-conversion, usually PWM

William Sandqvist william@kth.se

A DA converter takes too much space on the processor chip. The most common DA solution is instead a pulse width modulator. Many components "notice" no difference between a stable analog value or the mean value

  • f fast pulses.
slide-2
SLIDE 2

DA-conversion, usually PWM

William Sandqvist william@kth.se

Components with inertia = mean value Low pass filter = DC voltage

slide-3
SLIDE 3

TIMER0

William Sandqvist william@kth.se

slide-4
SLIDE 4

PWM-program

William Sandqvist william@kth.se

#define DUTY 128 void main( void) { TRISC.5 = 0; /* PORTC.5 is output */ OPTION = 0b10000.111; /* 256 prescale */ while (1) /* forever */ { char i; if (TMR0 < DUTY ) PORTC.5 = 1; else PORTC.5 = 0; } }

  • Problem. If the program is to do

anyting more then it has to be done in between the TIMER0 tick’!

slide-5
SLIDE 5

CCP-unit

William Sandqvist william@kth.se

There is an obvious need for a stand alone unit for generating

  • PWM. CCP unit can be programmed to this!

CCP

  • Capture
  • Compare
  • PWM
slide-6
SLIDE 6

PWM

William Sandqvist william@kth.se

DutyCycle Frequency CCPR1L PR2 8+2 bitar

slide-7
SLIDE 7

TIMER2

William Sandqvist william@kth.se

TIMER2 is a 8-bit counter (up to modulo 256). It has a prescaler from the processor clock, and a register PR2 that can ”shorten” the count cycle – it will count ”modulo PR2”. This provides many

  • pportunities to set TIMER2 output frequency.
slide-8
SLIDE 8

PWM f 1kHz D 50%

William Sandqvist william@kth.se

Suppose we need to generate a PWM-signal with f 1 kHz and the dutycycle 50% (someone that likes nice numbers).

1

  • 1

Hz 1000 1 249 10 250 ] 249 ... [ 249 PR2 10 250 } 16 4 1 { prescale 10 1 10 1 4 10 4 4

3 3 6 6 6

= + ⋅ = ⋅ = ⋅ ⋅ = ⋅ =

  • sc

f

slide-9
SLIDE 9

PWM f 1kHz D 50%

William Sandqvist william@kth.se

1 1

PWM-mode CCP1-pin TRISC.5=0; Two extra bits DutyCycle resolution (least significant bits) Ten bit resolution when PR2=255. Lower values reduce the resolution:

( )

] bits [ ) 2 log( ) 1 2 PR ( 4 log resolution + ⋅ =

slide-10
SLIDE 10

PWM f 1kHz D 50%

William Sandqvist william@kth.se

4 ) 1 PR2 ( 1 DC1B 2 1 DC1B 4 L 1 CCPR DutyCycle ⋅ + ⋅ + ⋅ + ⋅ = 125 4 250 4 0,5 L 1 CCPR 4 ) 1 49 2 ( 1 2 4 L 1 CCPR % 50 = ⋅ ⋅ =

  • ⋅

+ ⋅ + ⋅ + ⋅ =

slide-11
SLIDE 11
  • Ex. What DutyCycle?

William Sandqvist william@kth.se

% 9 , 65 4 ) 1 208 ( 1 1 2 1 4 137 4 ) 1 PR2 ( 1 DC1B 2 1 DC1B 4 L 1 CCPR DutyCycle = ⋅ + ⋅ + ⋅ + ⋅ = = ⋅ + ⋅ + ⋅ + ⋅ = PR2 = 208; CCPR1L = 137; DC1B1 = 1; DC1B0 = 1;

?

slide-12
SLIDE 12
  • Ex. What DutyCycle?

William Sandqvist william@kth.se

PR2 = 208; CCPR1L = 209; DC1B1 = 1; DC1B0 = 1;

?

% 4 , 100 4 ) 1 208 ( 1 1 2 1 4 209 4 ) 1 PR2 ( 1 DC1B 2 1 DC1B 4 L 1 CCPR DutyCycle = ⋅ + ⋅ + ⋅ + ⋅ = = ⋅ + ⋅ + ⋅ + ⋅ =

Does not work! CCPR1L can never be bigger than PR2!

slide-13
SLIDE 13

PWM f 1kHz D 50%

William Sandqvist william@kth.se

TRISC.5=0; /* CCP1 output */ T2CON = 0B00000101; /* prescale 1:4 */ CCP1CON = 0B00.00.1100; /* PWM-mode */ PR2 = 249; /* f_pwm 1000 Hz */ CCPR1L = 125; /* Duty 50% */

CCP-unit is stand alone – all processortime can be used to

  • ther tasks.
slide-14
SLIDE 14

PWM to StepUp

William Sandqvist william@kth.se

At the lab, you will need 100V to light a neon lamp! 5V 100V L

slide-15
SLIDE 15

PWM to motors

William Sandqvist william@kth.se

Another common use for PWM is motor control - we will return to this.

slide-16
SLIDE 16

William Sandqvist william@kth.se