CPSC 410/ 611: Week 7 Vir t ual Memor y Reading: Silber shat z, - - PDF document

CPSC 410 / 611 : Operating Systems 1

CPSC 410/ 611: “Week 7”

• Vir t ual Memor y
• Reading: Silber shat z, Chapt er 9
• Vir t ual Memor y, MI PS-St yle

– pr epar at ion f or MP3

Virt ual Memory

• Over view / Mot ivat ion
• Simple Approach: Overlays
• Localit y of Ref erence
• Demand P

aging

• Policies

– P lacement – Replacement – Allocat ion

• Case St udies: Unix Syst emV
• Reading: Silberschat z, Chapt er 9

CPSC 410 / 611 : Operating Systems 2

Virt ual Memory

• Allow execut ion of processes t hat may not be complet ely in

memory. – 1990: Run dBaseI V on MS/ DOS wit hout expanded memory. – 1995: Run X and Net scape on a Sun wit h 12MB memory. – 2004: Run RiseOf Nat ions on Windows box wit h 128MB memory.

• Benef it s:

– Program size not const rained by amount of physical memory available. – More programs can be run simult aneously – Less need f or swapping

• verlay

driver

Virt ual Memory at it s Simplest : Overlays

• Keep in memory only t hose

inst ruct ions and dat a t hat are needed at any given t ime.

• Special relocat ion and linking needed

t o const r uct over lays.

• Don’t need special support f rom OS.
• Require proper design of overlay

st r uct ur e.

common dat a common rout ines

• verlay

1

• verlay

2

• verlay

3

CPSC 410 / 611 : Operating Systems 3

Demand Paging

• “Lazy Swapper”: only swap in pages t hat are needed.
• Whenever CPU t ries t o access a page t hat is not swapped in, a page

f ault occur s.

A B C D E F G 1 2 3 4 5 6 H 7 logical memory 4 v i

1

10 v

2

i

3

i

4

8 v

5

i

6

i

7

page t able 1 6 7 2 3 A 4 5 F 8 9 C 10 11 12 physical memor y A B C D E F backing st ore

Localit y of Ref erence

• Page f ault s are expensive!
• Thrashing: Process spends most of t he t ime paging in and out

inst ead of execut ing code.

• Most programs display a pat t ern of behavior called t he principle
• f locality of ref erence.
• Localit y of ref erence:

A program t hat ref erences a locat ion n at some point in t ime is likely t o ref erence t he same locat ion n and locat ions in t he immediat e vicinit y of n in t he near f ut ure. A program t hat ref erences a locat ion n at some point in t ime is likely t o ref erence t he same locat ion n and locat ions in t he immediat e vicinit y of n in t he near f ut ure.

CPSC 410 / 611 : Operating Systems 4

Memory Access Trace Mechanics of a Page Fault

CPU CPU i i page t able OS OS f r ee f rame f r ee f rame ref erence r est ar t inst ruct ion t r ap page is on backing st ore load page physical memory updat e page t able 1 2 3 4 5 6

CPSC 410 / 611 : Operating Systems 5

Archit ect ural Considerat ions

• Must be able t o rest art any inst ruct ion af t er a page f ault .
• e.g.

ADD A,B TO C

• What about operat ions t hat modif y several locat ions in memory?

– e.g. block copy operat ions?

• What about operat ions wit h side ef f ect s?

– e.g. PDP-11, 80x86 aut o-decrement , aut o-increment

• perat ions?

– Add mechanism f or OS t o “undo” inst ruct ions.

Perf ormance of Demand Paging

• Ef f ect ive Memory Access t ime ema:

ema = (1- p) * ma + p * “page f ault time”

• where

– p = probabilit y of a page f ault – ma = memory access t ime

• Operat ions during Page Fault :

CPU CPU i i page t able OS OS

f r ee f r ame f r ee f r ame

ref erence r est ar t inst ruct ion t r ap page is on backing st ore load page updat e page t able

• 1. service page f ault

int er r upt

• 2. swap in page
• 3. rest art process

CPSC 410 / 611 : Operating Systems 6

OS Policies f or Virt ual Memory

• Fetch Policy

– How/ when t o get pages int o physical memory. – demand paging vs. prepaging.

• Placement Policy

– Where in physical memory t o put pages. – Only relevant in NUMA machines.

• Replacement Policy

– Physical memory is f ull. Which f rame t o page out ?

• Resident Set Management Policy

– How many f rames t o allocat e t o process? – Replace someone elses f r ame?

• Cleaning Policy

– When t o wr it e a modif ied page t o disk.

• Load Control

Conf iguring t he Win2k Memory Manager

• Regist ry Values t hat Af f ect t he Memory Manager:

ClearPageFileAtShutdown DisablePagingExecutive IoPageLockLimit LargePageMinimum LargeSystemCache NonPagedPoolQuota NonPagedPoolSize PagedPoolQuota PagedPoolSize SystemPages

CPSC 410 / 611 : Operating Systems 7

Page Replacement

• Virt ual memory allows higher degrees of mult iprogramming by
• ver -allocat ing memory.
• Example:

1024kB 256kB 256kB 256kB 256kB 256kB K L M N 1 2 3 2 v 4 v

1

i

2

v

3

K 2 A 3 N C 1 L 4 D 5 M B A B C D 1 2 3 3 v i

1

1 v

2

5 v

3

Mechanics of Page Replacement

• I nvoked whenever no f ree f rame can be f ound.
• Problem: Need t wo page t ransf ers!

Solut ion: Dirty bit.

f v/ i nil/ f i/ v vict im page t able physical memory backing st ore 2 4 1 3

swap

• ut

vict im page swap in new page invalidat e ent ry f or vict im page updat e ent ry f or new page

CPSC 410 / 611 : Operating Systems 8

Page Replacement Algorit hms

• Obj ect ive: Minimize page f ault rat e.
• Why bot her?
• Example

for(int i=0; i<10; i++) { a = x * a; }

• Evaluat ion: Sequence of memory ref erences: ref erence string.

a x i

FI FO Page Replacement

f v/ i nil/ f i/ v vict im page t able physical memory backing st ore 3 5 2 4 swap

• ut

vict im page swap in new page invalidat e ent ry f or vict im page updat e ent ry f or new page FI FO queue select vict im 1 6 ent er f rame in FI FO queue

CPSC 410 / 611 : Operating Systems 9

FI FO Page Replacement (cont .)

• Example:

time reference string frames a b c d 1 c 2 a 3 d 4 b a b c d 5 e e b c d 6 b e b c d 7 a e a c d 8 b e a b d 9 c e a b c 10 d d a b c a b c d a b c d a b c d

! ! ! ! !

• Advant age: simplicit y
• Disadvant age: Assumes t hat pages residing t he longest in

memory are t he least likely t o be ref erenced in t he f ut ure (does not exploit principle of localit y).

• Algorit hm wit h lowest page f ault rat e of all algorit hms:
• Example:

Replace t hat page which will not be used f or t he longest period of t ime.

Opt imal Replacement Algorit hm

time reference string frames a b c d 1 c 2 a 3 d 4 b a b c d 5 e a b c e 6 b a b c e 7 a a b c e 8 b a b c e 9 c a b c e 10 d d b c e a b c d a b c d a b c d

! !

CPSC 410 / 611 : Operating Systems 10

Approximat ion t o Opt imal: LRU

• Least Recently Used: replace t he page t hat has not been accessed f or

longest per iod of t ime.

• Example:

time reference string frames a b c d 1 c 2 a 3 d 4 b a b c d 5 e a b e d 6 b a b e d 7 a a b e d 8 b a b e d 9 c a b e c 10 d a b d c a b c d a b c d a b c d

! ! !

LRU: I mplement at ion

• Need t o keep chronological hist ory of page ref erences; need t o be

reordered upon each ref erence.

• Stack:
• Capacitors: Associat e a capacit or wit h each memory f rame. Capacit or is

charged wit h every ref erence t o t he f rame. The subsequent exponent ial decay of t he charge can be direct ly convert ed int o a t ime int erval.

• Aging registers: Associat e aging regist er of n bit s (Rn-1, ..., R0) wit h each f r ame

in memory. Set Rn-1 t o 1 f or each ref erence. Periodically shif t regist ers t o t he r ight .

stack ? ? ? ? b d a c e b d a b e d a a b e d b a e d c b a e d c b a c ? ? ? a c ? ? d a c ?

CPSC 410 / 611 : Operating Systems 11

Appr oximat ion t o LRU:Clock Algor it hm

• Associat e a use_bit wit h every f rame in memory.

– Upon each ref erence, set use_bit t o 1. – Keep a point er t o f irst “vict im candidat e” page. – To select vict im: I f current f rame’s use_bit is 0, select f rame and increment point er. Ot herwise delet e use_bit and increment point er.

time reference string frames a/1 b/1 c/1 d/1 1 c 2 a 3 d 4 b 5 e 6 b 7 a 8 b 9 c 10 d

! ! !

a/1 b/1 c/1 d/1 a/1 b/1 c/1 d/1 a/1 b/1 c/1 d/1 a/1 b/1 c/1 d/1 e/1 b/0 c/0 d/0 e/1 b/1 c/0 d/0 e/1 b/0 a/1 d/0 e/1 b/1 a/1 d/0 e/1 b/1 a/1 c/1 d/1 b/0 a/0 c/0

!

I mpr ovement on Clock Algor it hm (Second Chance Algor it hm)

• Consider read/ writ e act ivit y of page: dirt y_bit (or modif y_bit )
• Algorit hm same as clock algorit hm, except t hat we scan f or

f rame wit h bot h use_bit and dirt y_bit equal t o 0.

• Each t ime t he point er advances, t he use_bit and dirt y_bit are

updat ed as f ollows:

• Called Second Chance because a f rame t hat has been writ t en

t o is not removed unt il t wo f ull scans of t he list lat er.

• Not e: St allings describes a slight ly dif f erent algorit hm!

before 1 1 1 0 0 1 0 0 after 0 1 0 0 0 0* (select) u d u d u d u d

CPSC 410 / 611 : Operating Systems 12

I mproved Clock (cont )

• Example:

time reference string frames a/10 b/10 c/10 d/10 1 c 2 aw 3 d 4 bw 5 e 6 b 7 aw 8 b 9 c 10 d a/10 b/10 c/10 d/10 a/11 b/10 c/10 d/10 a/11 b/10 c/10 d/10 a/11 b/11* c/10 d/10 a/00* b/00* e/10 d/00 a/00* b/10* e/10 d/00 a/11 b/10* e/10 d/00 a/11 b/10* e/10 d/00 a/11 b/10* e/10 c/10

! ! !

The Macint osh VM Scheme (see St allings)

• Uses use_bit and modif y_bit.
• Step 1: Scan t he f rame buf f er. Select f irst f rame wit h use_bit

and modif y_bit cleared.

• Step 2: I f St ep 1 f ails, scan f rame buf f er f or f rame wit h

use_bit cleared and modif y_bit set . During scan, clear use_bit

• n each bypassed f rame.
• Now all use_bit’s are cleared. Repeat St ep 1 and, if necessary,

St ep 2.

CPSC 410 / 611 : Operating Systems 13

The Macint osh Scheme (cont )

• Example:

time reference string frames a/10 b/10 c/10 d/10 1 c 2 aw 3 d 4 bw 5 e 6 b 7 aw 8 b 9 c 10 d a/10 b/10 c/10 d/10 a/11 b/10 c/10 d/10 a/11 b/10 c/10 d/10 a/11 b/11 c/10 d/10 a/01 b/01 e/10 d/00 a/01 b/11 e/10 d/00 a/11 b/11 e/10 d/00 a/11 b/11 e/10 d/00 a/11 b/11 e/10 c/10

! ! !

Resident Set Management

• Local vs. Global replacement policy:

– The page t o be replaced is select ed f rom t he resident set of pages of t he f ault ing process. (local) – The page t o be replaced may belong t o any of t he processes in memory.

• Each program requires a cert ain minimum set of pages

t o be resident in memory t o run ef f icient ly.

• The size of t his set changes dynamically as a program

execut es.

• This leads t o algorit hms t hat at t empt t o maint ain an
• pt imal resident set f or each act ive program. (Page

replacement wit h variable number of f rames.)

CPSC 410 / 611 : Operating Systems 14

The Working Set Model

• Working Set W(t ,∆) : set of pages ref erenced by process during

t ime int erval (t -∆, t )

• The st orage management st rat egy f ollows t wo rules:

– At each ref erence, t he current working set is det ermined and

• nly t hose pages belonging t o t he working set are ret ained in

memory. – A program may run only if it s ent ire current working set is in memory.

• Underlying Assumpt ion: cardinalit y of working set remains

const ant over small t ime int ervals.

Working Set Model (cont .)

• Example: (∆ = 4)

time reference string working set 1 c 2 c 3 d 4 b 5 c 6 e 7 c 8 e 9 a 10 d

• Problems:
• Dif f icult y in keeping t rack of working set .
• Est imat ion of appropriat e window size ∆.

a d e e d e a d e a c d a c d a c d b c d b c d b c d e b c e c e a c e a c d e e

! ! ! ! !

CPSC 410 / 611 : Operating Systems 15

I mpr ove Paging Per f or mance: Page Buf f er ing

• Vict im f rames are not overwrit t en direct ly, but are

removed f rom page t able of process, and put int o: – f ree f rame list (clean f rames) – modif ied f rame list (modif ied f rames)

• Vict ims are picked f rom t he f ree f rame list in FI FO
• rder.
• I f ref erenced page is in f ree or modif ied list , simply

reclaim it .

• Periodically (or when running out of f ree f rames) writ e

modif ied f rame list t o disk.

Page Buf f ering and Page St ealer

• Kernel process (e.g. pageout in Solaris) t hat swaps out memory f rames

t hat ar e no longer par t of a wor king set of a pr ocess.

• Periodically increment s age f ield in valid pages.

page out

• f memory

1 2 3 4

page in memory

n

• Page st ealer wakes up when available f ree memory is below low-wat er
• mark. Swaps out f rames unt il available f ree memory exceeds high-

wat er mark.

• Page st ealer collect s f rames t o swap and swaps t hem out in a single
• run. Unt il t hen, f rames st ill available f or ref erence.

page r ef er enced age page ... not r ef er enced ready t o swap out swap out swap in

CPSC 410 / 611 : Operating Systems 16

I mplement at ion of Demand Paging in UNI X SVR4

frame address age cp/wrt mod ref val prot

page table entry

swap dev block num type (swap,file, fill 0, demand fill)

disk block descriptor

page state ref count logical device

frame table entry

block number pfdata pointer

Demand Paging on Less-Sophist icat ed Har dwar e

• Demand paging most ef f icient if hardware set s t he ref erence and dirt y

bit s and causes a prot ect ion f ault when a process writ es a pages whose copy_on_writ e bit is set .

• Can duplicat e valid bit by a sof t ware-valid bit and have t he kernel t urn
• f f t he valid bit . The ot her bit s can t hen be simulat ed in sof t ware.
• Example: Ref erence Bit :

– I f process ref erences a page, it incurs a page f ault because valid bit is of f . Page f ault handler t hen checks sof t ware-valid bit . – I f set , kernel knows t hat page is really valid and can set sof t ware- ref erence bit .

Off Hardware Valid On Software Valid Off Software Reference On Hardware Valid On Software Valid On Software Reference before referencing page after referencing page

CPSC 410 / 611 : Operating Systems 17

fork() Syst em Call in Paging Syst ems

• Naive: fork() makes a physical copy of parent address
• space. However, fork() most ly f ollowed by an exec() call,

which overwrit es t he address space.

• Syst em V: Use copy_on_write bit :

– During fork() syst em call, all copy_on_write bit s of pages of process are t urned on. I f eit her process writ es t o t he page, incurs prot ect ion f ault , and, in handling t he f ault , kernel makes a new copy of t he page f or t he f ault ing process.

• BSD: Of f ers vfork() syst em call, which does not copy

address space. Tricky! (May corrupt process memory.)

CPSC 410/ 611: “Week 7”

• Vir t ual Memor y
• Reading: Silber shat z, Chapt er 9
• Vir t ual Memor y, MI PS-St yle

– pr epar at ion f or MP3

CPSC 410 / 611 : Operating Systems 18

Virt ual Memory - MI PS St yle

ASID VPN Address within page Address within frame PFN VPN/Mask ASID PFN Flags PFN Flags Process no. Program (virtual) address TLB Page table (in memory)

refill when necessary

Physical address

Memory Translat ion -- VAX st yle

• Split virt ual address
• Concat enat e more-signif icant bit s wit h Process ASI D

t o f orm page address.

• Look in t he TLB t o see if we f ind t ranslat ion ent ry f or

page.

• I f YES, t ake high-order physical address bit s.

– (Ext ra bit s st ored wit h PFN cont rol access t o f rame.)

• I f NO, syst em must locat e page ent ry in main-memory-

resident page t able, load it int o TLB, and st art again.

CPSC 410 / 611 : Operating Systems 19

Memory Translat ion -- MI PS St yle

• I n principle: Do t he same as VAX, but wit h as lit t le

hardware as possible.

• Apart f rom regist er wit h ASI D, t he MMU is j ust a

TLB.

• The rest is all implement ed in sof t ware!
• When TLB cannot t ranslat e an address, a special

except ion (TLB ref ill) is raised.

• Quest ion: This is easy in principle, but t ricky t o do

ef f icient ly.

MI PS TLB Ent ry Fields

• VP

N: higher order bit s of virt ual address

• ASI D: ident if ies t he address space
• G: if set , disables t he mat ching wit h t he ASI D
• PFN: P

hysical f rame number

• N: 0 - cacheable, 1 - noncacheable
• D: writ e-cont rol bit (set t o 1 if writ eable)
• V: valid bit

VPN ASID G PFN Flags N D V

input

• utput

CPSC 410 / 611 : Operating Systems 20

MI PS Translat ion Process

• CPU generat es a program (virt ual address) on a inst ruct ion f et ch,

a load, or a st ore.

• The 12 low-end bit s are separat ed of f .
• TLB mat ches key:

– Mat ching ent ry is select ed, and PFN is glued t o low-order bit s

• f t he program address.
• Valid?: The V and D bit s are checked. I f problem, raise except ion,

and set BadVAddr regist er wit h of f ending program address.

• Cached?: I F C bit is set , t he CPU looks in t he cache f or a copy of

t he physical locat ion’s dat a. I f C bit is cleared, it neit her looks in nor ref ills t he cache.

TLB Ref ill Except ion

• Figure out if t his was a correct t ranslat ion. I f not ,

t rap t o handling of address errors.

• I f t ranslat ion correct , const ruct TLB ent ry.
• I f TLB already f ull, select an ent ry t o discard.
• Writ e t he new ent ry int o t he TLB.