Configurations and Optimizations of TDMA Schedules for Periodic - - PowerPoint PPT Presentation

configurations and optimizations of tdma schedules for
SMART_READER_LITE
LIVE PREVIEW

Configurations and Optimizations of TDMA Schedules for Periodic - - PowerPoint PPT Presentation

Configurations and Optimizations of TDMA Schedules for Periodic Packet Communication on Networks on Chip Tim Harde 1 , Matthias Freier 2 , uggen 1 , and Jian-Jia Chen 1 Georg von der Br 1 TU Dortmund University, Germany 2 Robert Bosch GmbH,


slide-1
SLIDE 1

Configurations and Optimizations of TDMA Schedules for Periodic Packet Communication on Networks on Chip

Tim Harde1, Matthias Freier2, Georg von der Br¨ uggen1, and Jian-Jia Chen1

1TU Dortmund University, Germany 2Robert Bosch GmbH, Germany

11.10.2018

von der Br¨ uggen (TU Dortmund) 1 / 19

slide-2
SLIDE 2

Table of Content

  • Model and Design
  • Communication Tasks
  • Network on Chip
  • TDMA
  • TDMA Approach for a NoC
  • Greedy Heuristic
  • Rectangular Scheduling (Solver Based)
  • Evaluation
  • Conclusion

von der Br¨ uggen (TU Dortmund) 2 / 19

slide-3
SLIDE 3

Communication Tasks

Periodic communication task τi = (Ti, Di, Pi, Ri, ri, di)

  • period Ti
  • relative deadline Di
  • packet size Pi
  • route Ri through the network
  • source node ri
  • destination node di
  • infinite number of packets Pi,j

Pi,1 Pi,2 Pi,3 Ti transmission time Di t von der Br¨ uggen (TU Dortmund) 3 / 19

slide-4
SLIDE 4

Communication Tasks

Periodic communication task τi = (Ti, Di, Pi, Ri, ri, di)

  • period Ti
  • relative deadline Di, implicit deadline: Di = Ti
  • packet size Pi
  • route Ri through the network
  • source node ri
  • destination node di
  • infinite number of packets Pi,j

Pi,1 Pi,2 Pi,3 Ti transmission time Di t

communication task set τ = {τ1, τ2, ..., τn}

  • harmonic: ∀τi, τj ∈ τ : if Ti < Tj then Tj = a · Ti, a ∈ N

von der Br¨ uggen (TU Dortmund) 3 / 19

slide-5
SLIDE 5

Network on Chip

Architecture

  • r × s 2D-mesh
  • directed graph:
  • nodes:
  • cores Cx,y
  • switches Sx,y
  • edges:
  • links Lnode1

node2

S0,0 S1,0 S2,0 S0,1 S1,1 S2,1 S0,2 S1,2 S2,2 C0,0 C1,0 C2,0 C0,1 C1,1 C2,1 C0,2 C1,2 C2,2

von der Br¨ uggen (TU Dortmund) 4 / 19

slide-6
SLIDE 6

Network on Chip

Architecture

  • r × s 2D-mesh
  • directed graph:
  • nodes:
  • cores Cx,y
  • switches Sx,y
  • edges:
  • links Lnode1

node2

Packets and Flits

  • flow control units (flits):
  • atomic units of communication
  • maximum payload pmax: 32 bits
  • packet Pi,j:
  • segmented into flits if Pi > pmax

S0,0 S1,0 S2,0 S0,1 S1,1 S2,1 S0,2 S1,2 S2,2 C0,0 C1,0 C2,0 C0,1 C1,1 C2,1 C0,2 C1,2 C2,2

von der Br¨ uggen (TU Dortmund) 4 / 19

slide-7
SLIDE 7

Network-on-Chip

Cores Cx,y

  • execute computational tasks
  • exchange messages (packets)
  • components:
  • processing unit
  • memory
  • network interface (up-/downlink)

S0,0 S1,0 S2,0 S0,1 S1,1 S2,1 S0,2 S1,2 S2,2 C0,0 C1,0 C2,0 C0,1 C1,1 C2,1 C0,2 C1,2 C2,2

von der Br¨ uggen (TU Dortmund) 5 / 19

slide-8
SLIDE 8

Network-on-Chip

Cores Cx,y

  • execute computational tasks
  • exchange messages (packets)
  • components:
  • processing unit
  • memory
  • network interface (up-/downlink)

Switches Sx,y

  • forward flits through the NoC
  • components:
  • routing logic
  • arbiter
  • switching fabric

S0,0 S1,0 S2,0 S0,1 S1,1 S2,1 S0,2 S1,2 S2,2 C0,0 C1,0 C2,0 C0,1 C1,1 C2,1 C0,2 C1,2 C2,2

von der Br¨ uggen (TU Dortmund) 5 / 19

slide-9
SLIDE 9

Network-on-Chip

Links Lnode1

node2

  • unidirectional connection
  • flit forwarding
  • constant link latency l

S0,0 S1,0 S2,0 S0,1 S1,1 S2,1 S0,2 S1,2 S2,2 C0,0 C1,0 C2,0 C0,1 C1,1 C2,1 C0,2 C1,2 C2,2

von der Br¨ uggen (TU Dortmund) 6 / 19

slide-10
SLIDE 10

Network-on-Chip

Links Lnode1

node2

  • unidirectional connection
  • flit forwarding
  • constant link latency l

Synchronicity

  • fully synchronous system
  • global clock for NIs and switches

S0,0 S1,0 S2,0 S0,1 S1,1 S2,1 S0,2 S1,2 S2,2 C0,0 C1,0 C2,0 C0,1 C1,1 C2,1 C0,2 C1,2 C2,2

von der Br¨ uggen (TU Dortmund) 6 / 19

slide-11
SLIDE 11

Network-on-Chip

Links Lnode1

node2

  • unidirectional connection
  • flit forwarding
  • constant link latency l

Synchronicity

  • fully synchronous system
  • global clock for NIs and switches

Routing

  • XY-Routing
  • deterministic (in-order delivery)
  • deadlock-free

S0,0 S1,0 S2,0 S0,1 S1,1 S2,1 S0,2 S1,2 S2,2 C0,0 C1,0 C2,0 C0,1 C1,1 C2,1 C0,2 C1,2 C2,2

von der Br¨ uggen (TU Dortmund) 6 / 19

slide-12
SLIDE 12

Network-on-Chip

Links Lnode1

node2

  • unidirectional connection
  • flit forwarding
  • constant link latency l

Synchronicity

  • fully synchronous system
  • global clock for NIs and switches

Routing

  • XY-Routing
  • deterministic (in-order delivery)
  • deadlock-free

S0,0 S1,0 S2,0 S0,1 S1,1 S2,1 S0,2 S1,2 S2,2 C0,0 C1,0 C2,0 C0,1 C0,1 C1,1 C2,1 C0,2 C1,2 C2,2 C2,2

Example: communication task τi with ri = C0,1 and di = C2,2

von der Br¨ uggen (TU Dortmund) 6 / 19

slide-13
SLIDE 13

Network-on-Chip

Links Lnode1

node2

  • unidirectional connection
  • flit forwarding
  • constant link latency l

Synchronicity

  • fully synchronous system
  • global clock for NIs and switches

Routing

  • XY-Routing
  • deterministic (in-order delivery)
  • deadlock-free

S0,0 S1,0 S2,0 S0,1 S1,1 S2,1 S0,2 S1,2 S2,2 C0,0 C1,0 C2,0 C0,1 C0,1 C1,1 C2,1 C0,2 C1,2 C2,2 C2,2 Li

5

Li

1

Li

3

Li

2

Li

4

Example: communication task τi with ri = C0,1 and di = C2,2

⇒ route Ri: LC0,1

S0,1 LS0,1 S1,1 LS1,1 S2,1 LS2,1 S2,2 LS2,2 C2,2

von der Br¨ uggen (TU Dortmund) 6 / 19

slide-14
SLIDE 14

Time Division Multiple Access (TDMA)

slot 1 slot 2 slot 3 ... slot n

TDMA frame TDMA slot

t

Idea: partitioning the access time to a specific resource

von der Br¨ uggen (TU Dortmund) 7 / 19

slide-15
SLIDE 15

Time Division Multiple Access (TDMA)

slot 1 slot 2 slot 3 ... slot n

TDMA frame TDMA slot

t

Idea: partitioning the access time to a specific resource Advantages

  • bandwidth guarantees
  • isolation
  • predictable timing behavior
  • good analyzability

Disadvantages

  • global synchronization
  • global overhead
  • tough design problem

von der Br¨ uggen (TU Dortmund) 7 / 19

slide-16
SLIDE 16

Time Division Multiple Access (TDMA)

slot 1 slot 2 slot 3 ... slot n

TDMA frame TDMA slot

t

Idea: partitioning the access time to a specific resource Advantages

  • bandwidth guarantees
  • isolation
  • predictable timing behavior
  • good analyzability

Disadvantages

  • global synchronization
  • global overhead
  • tough design problem

Problem: parameter selection: frame size, slot size and alignment

von der Br¨ uggen (TU Dortmund) 7 / 19

slide-17
SLIDE 17

Global TDMA Approach

τi τj si sj c t L

  • synchronous execution of the TDMA schedule on all nodes
  • start and end of a TDMA slot can be defined arbitrarily

⇒ unused bandwidth possible

von der Br¨ uggen (TU Dortmund) 8 / 19

slide-18
SLIDE 18

Global TDMA Approach

τi τj si sj c t L

  • synchronous execution of the TDMA schedule on all nodes
  • start and end of a TDMA slot can be defined arbitrarily

⇒ unused bandwidth possible

TDMA Parameters

  • TDMA cycle length c

⇒ identical for all TDMA arbiters

  • TDMA slot length si

⇒ sufficient bandwidth to forward the flits of τi

von der Br¨ uggen (TU Dortmund) 8 / 19

slide-19
SLIDE 19

TDMA Slot Aligning

τi si c t Li

1

τi l si c t Li

2

τi 2 · l si c t Li

3

von der Br¨ uggen (TU Dortmund) 9 / 19

slide-20
SLIDE 20

TDMA Slot Aligning

τi si c t Li

1

τi l si c t Li

2

τi 2 · l si c t Li

3

  • align TDMA slots on consecutively traversed links

⇒ immediate forwarding of flits ⇒ no buffering required ⇒ no flow control mechanism required (bandwidth guarantee) ⇒ no contention from other packets (isolation property)

von der Br¨ uggen (TU Dortmund) 9 / 19

slide-21
SLIDE 21

TDMA Slot Aligning

τi si c t Li

1

τi l si c t Li

2

τi 2 · l si c t Li

3

  • align TDMA slots on consecutively traversed links

⇒ immediate forwarding of flits ⇒ no buffering required ⇒ no flow control mechanism required (bandwidth guarantee) ⇒ no contention from other packets (isolation property)

TDMA slot assignment respecting the alignment property

von der Br¨ uggen (TU Dortmund) 9 / 19

slide-22
SLIDE 22

TDMA Parameter Selection - Cycle Length

TDMA Cycle Length

  • identical for all TDMA arbiters in the NoC

von der Br¨ uggen (TU Dortmund) 10 / 19

slide-23
SLIDE 23

TDMA Parameter Selection - Cycle Length

TDMA Cycle Length

  • identical for all TDMA arbiters in the NoC

TDMA cycle length c ∈ {T1, T2, ..., Tn}

von der Br¨ uggen (TU Dortmund) 10 / 19

slide-24
SLIDE 24

TDMA Parameter Selection - Cycle Length

TDMA Cycle Length

  • identical for all TDMA arbiters in the NoC

TDMA cycle length c ∈ {T1, T2, ..., Tn} Harmonic Property of τ:

⇒ packets are released at the same offset of the TDMA cycle ⇒ identical response times for consecutive packet releases

von der Br¨ uggen (TU Dortmund) 10 / 19

slide-25
SLIDE 25

TDMA Parameter Selection - Cycle Length

TDMA Cycle Length

  • identical for all TDMA arbiters in the NoC

TDMA cycle length c ∈ {T1, T2, ..., Tn} Harmonic Property of τ:

⇒ packets are released at the same offset of the TDMA cycle ⇒ identical response times for consecutive packet releases

Fragmentation:

  • Ti < c: integer number of packets releases per TDMA cycle
  • Ti = c: one packet release per TDMA cycle
  • Ti > c: one packet release every Ti

c TDMA cycles

von der Br¨ uggen (TU Dortmund) 10 / 19

slide-26
SLIDE 26

TDMA Parameter Selection - Cycle Length

TDMA Cycle Length

  • identical for all TDMA arbiters in the NoC

TDMA cycle length c ∈ {T1, T2, ..., Tn} Harmonic Property of τ:

⇒ packets are released at the same offset of the TDMA cycle ⇒ identical response times for consecutive packet releases

Fragmentation:

  • Ti < c: integer number of packets releases per TDMA cycle
  • Ti = c: one packet release per TDMA cycle
  • Ti > c: one packet release every Ti

c TDMA cycles

Directly provides the slot size si for each task

von der Br¨ uggen (TU Dortmund) 10 / 19

slide-27
SLIDE 27

TDMA Schedule Design - Overview

Given:

  • communication task set τ = {τ1, τ2, ..., τn}

⇒ harmonic periods ⇒ implicit deadlines

  • r × s NoC platform

von der Br¨ uggen (TU Dortmund) 11 / 19

slide-28
SLIDE 28

TDMA Schedule Design - Overview

Given:

  • communication task set τ = {τ1, τ2, ..., τn}

⇒ harmonic periods ⇒ implicit deadlines

  • r × s NoC platform

The problem is to determine

1 the TDMA cycle length 2 the TDMA slot size si 3 the offset of each TDMA slot in the TDMA cycles

all tasks can be feasibly scheduled and the TDMA slots are aligned

von der Br¨ uggen (TU Dortmund) 11 / 19

slide-29
SLIDE 29

TDMA Schedule Design - Overview

Given:

  • communication task set τ = {τ1, τ2, ..., τn}

⇒ harmonic periods ⇒ implicit deadlines

  • r × s NoC platform

The problem is to determine

1 the TDMA cycle length: c ∈ {T1, T2, ..., Tn} 2 the TDMA slot size si 3 the offset of each TDMA slot in the TDMA cycles

all tasks can be feasibly scheduled and the TDMA slots are aligned

von der Br¨ uggen (TU Dortmund) 11 / 19

slide-30
SLIDE 30

TDMA Schedule Design - Overview

Given:

  • communication task set τ = {τ1, τ2, ..., τn}

⇒ harmonic periods ⇒ implicit deadlines

  • r × s NoC platform

The problem is to determine

1 the TDMA cycle length: c ∈ {T1, T2, ..., Tn} 2 the TDMA slot size si: fragmentation, # releases 3 the offset of each TDMA slot in the TDMA cycles

all tasks can be feasibly scheduled and the TDMA slots are aligned

von der Br¨ uggen (TU Dortmund) 11 / 19

slide-31
SLIDE 31

TDMA Schedule Design - Overview

Given:

  • communication task set τ = {τ1, τ2, ..., τn}

⇒ harmonic periods ⇒ implicit deadlines

  • r × s NoC platform

The problem is to determine

1 the TDMA cycle length: c ∈ {T1, T2, ..., Tn} 2 the TDMA slot size si: fragmentation, # releases 3 the offset of each TDMA slot in the TDMA cycles

all tasks can be feasibly scheduled and the TDMA slots are aligned Approaches:

  • First-Fit Greedy Heuristic
  • Rectangular Scheduling (solver-based approach)

von der Br¨ uggen (TU Dortmund) 11 / 19

slide-32
SLIDE 32

TDMA Design - Greedy Heuristics

  • Communication Task Scheduling
  • tasks are scheduled successively
  • tasks are scheduled in a specific order

von der Br¨ uggen (TU Dortmund) 12 / 19

slide-33
SLIDE 33

TDMA Design - Greedy Heuristics

  • Communication Task Scheduling
  • tasks are scheduled successively
  • tasks are scheduled in a specific order
  • TDMA Slot Assignment:
  • start as early as possible
  • alignment property is maintained
  • isolation property is maintained (non-overlapping slots)

von der Br¨ uggen (TU Dortmund) 12 / 19

slide-34
SLIDE 34

TDMA Design - Greedy Heuristics

  • Communication Task Scheduling
  • tasks are scheduled successively
  • tasks are scheduled in a specific order
  • TDMA Slot Assignment:
  • start as early as possible
  • alignment property is maintained
  • isolation property is maintained (non-overlapping slots)
  • Ordering Strategies:
  • Largest Utilization First (LUF)
  • Smallest Utilization First (SUF)
  • Largest Period First (LPF)
  • Smallest Period First (SPF)
  • Random
  • Largest Hop Count First + {LUF, SUF,LPF,SPF}
  • Hop-Count Weighted LUF (HC-W-LUF)

von der Br¨ uggen (TU Dortmund) 12 / 19

slide-35
SLIDE 35

TDMA Design - Greedy Heuristics (Example)

Communication Tasks

  • task τ1:
  • T1 = 10, LTT1 = 3
  • r1 = C1,0, d1 = C2,0
  • task τ2:
  • T2 = 10, LTT2 = 2
  • r2 = C0,0, d1 = C2,0

S0,0 S1,0 S2,0 C0,0 C1,0 C2,0 von der Br¨ uggen (TU Dortmund) 13 / 19

slide-36
SLIDE 36

TDMA Design - Greedy Heuristics (Example)

Communication Tasks

  • task τ1:
  • T1 = 10, LTT1 = 3
  • r1 = C1,0, d1 = C2,0
  • task τ2:
  • T2 = 10, LTT2 = 2
  • r2 = C0,0, d1 = C2,0

NoC Parameters

  • link latency: l = 1

S0,0 S1,0 S2,0 C0,0 C1,0 C2,0 von der Br¨ uggen (TU Dortmund) 13 / 19

slide-37
SLIDE 37

TDMA Design - Greedy Heuristics (Example)

Communication Tasks

  • task τ1:
  • T1 = 10, LTT1 = 3
  • r1 = C1,0, d1 = C2,0
  • task τ2:
  • T2 = 10, LTT2 = 2
  • r2 = C0,0, d1 = C2,0

NoC Parameters

  • link latency: l = 1

TDMA Parameters

  • TDMA cycle length: c = 10
  • s1 = LTT1 = 3
  • s2 = LTT2 = 2

S0,0 S1,0 S2,0 C0,0 C1,0 C2,0 von der Br¨ uggen (TU Dortmund) 13 / 19

slide-38
SLIDE 38

TDMA Design - Greedy Heuristics (Example)

Communication Tasks

  • task τ1:
  • T1 = 10, LTT1 = 3
  • r1 = C1,0, d1 = C2,0
  • task τ2:
  • T2 = 10, LTT2 = 2
  • r2 = C0,0, d1 = C2,0

NoC Parameters

  • link latency: l = 1

TDMA Parameters

  • TDMA cycle length: c = 10
  • s1 = LTT1 = 3
  • s2 = LTT2 = 2

S0,0 S1,0 S2,0 C0,0 C1,0 C2,0

c = 10 t LC0,0

S0,0

c = 10 t LS0,0

S1,0

τ1 LTT1 c = 10 t LC1,0

S1,0

τ1 LTT1 l c = 10 t LS1,0

S2,0

τ1 LTT1 l 5 c = 10 t LS2,0

S2,0

von der Br¨ uggen (TU Dortmund) 13 / 19

slide-39
SLIDE 39

TDMA Design - Greedy Heuristics (Example)

Communication Tasks

  • task τ1:
  • T1 = 10, LTT1 = 3
  • r1 = C1,0, d1 = C2,0
  • task τ2:
  • T2 = 10, LTT2 = 2
  • r2 = C0,0, d1 = C2,0

NoC Parameters

  • link latency: l = 1

TDMA Parameters

  • TDMA cycle length: c = 10
  • s1 = LTT1 = 3
  • s2 = LTT2 = 2

S0,0 S1,0 S2,0 C0,0 C1,0 C2,0

τ2 LTT2 c = 10 t LC0,0

S0,0

τ2 LTT2 l c = 10 t LS0,0

S1,0

τ1 LTT1 c = 10 t LC1,0

S1,0

τ1 τ2 LTT1 LTT2 l l c = 10 t LS1,0

S2,0

τ1 τ2 LTT1 LTT2 l l 5 c = 10 t LS2,0

S2,0

von der Br¨ uggen (TU Dortmund) 13 / 19

slide-40
SLIDE 40

TDMA Design - Rectangular Scheduling

τi NetworkTraversalTime(NTT) t Li

1

τi t Li

2

τi c

t

rectangular reservation Li

3

Scheduling Strategy

  • Resource Reservations
  • reservations of width Network Traversal Time (NTT)
  • isolation property: non-overlapping rectangles
  • arrangement of the rectangular reservations:

⇒ Integer Linear Programming (ILP) formulation ⇒ Constraint Programming (CP) formulation

von der Br¨ uggen (TU Dortmund) 14 / 19

slide-41
SLIDE 41

TDMA Design - Rectangular Scheduling

τi NetworkTraversalTime(NTT) t Li

1

τi t Li

2

τi c

t

rectangular reservation Li

3

Scheduling Strategy

  • Resource Reservations
  • reservations of width Network Traversal Time (NTT)
  • isolation property: non-overlapping rectangles
  • arrangement of the rectangular reservations:

⇒ Integer Linear Programming (ILP) formulation ⇒ Constraint Programming (CP) formulation

  • TDMA Slot Assignment:
  • slots are allocated within rectangular reservations
  • maintain alignment property

von der Br¨ uggen (TU Dortmund) 14 / 19

slide-42
SLIDE 42

TDMA Design - Rectangular Scheduling (Example)

Communication Tasks

  • task τ1:
  • T1 = 10, LTT1 = 3,

NTT1 = 5

  • s1 = C1,0, d1 = C2,0
  • task τ2:
  • T2 = 10, LTT2 = 2,

NTT2 = 5

  • s2 = C0,0, d1 = C2,0

S0,0 S1,0 S2,0 C0,0 C1,0 C2,0 von der Br¨ uggen (TU Dortmund) 15 / 19

slide-43
SLIDE 43

TDMA Design - Rectangular Scheduling (Example)

Communication Tasks

  • task τ1:
  • T1 = 10, LTT1 = 3,

NTT1 = 5

  • s1 = C1,0, d1 = C2,0
  • task τ2:
  • T2 = 10, LTT2 = 2,

NTT2 = 5

  • s2 = C0,0, d1 = C2,0

NoC Parameters

  • link latency: l = 1

S0,0 S1,0 S2,0 C0,0 C1,0 C2,0 von der Br¨ uggen (TU Dortmund) 15 / 19

slide-44
SLIDE 44

TDMA Design - Rectangular Scheduling (Example)

Communication Tasks

  • task τ1:
  • T1 = 10, LTT1 = 3,

NTT1 = 5

  • s1 = C1,0, d1 = C2,0
  • task τ2:
  • T2 = 10, LTT2 = 2,

NTT2 = 5

  • s2 = C0,0, d1 = C2,0

NoC Parameters

  • link latency: l = 1

TDMA Parameters

  • TDMA cycle length: c = 10
  • s1 = LTT1 = 3
  • s2 = LTT2 = 2

S0,0 S1,0 S2,0 C0,0 C1,0 C2,0 von der Br¨ uggen (TU Dortmund) 15 / 19

slide-45
SLIDE 45

TDMA Design - Rectangular Scheduling (Example)

Communication Tasks

  • task τ1:
  • T1 = 10, LTT1 = 3,

NTT1 = 5

  • s1 = C1,0, d1 = C2,0
  • task τ2:
  • T2 = 10, LTT2 = 2,

NTT2 = 5

  • s2 = C0,0, d1 = C2,0

NoC Parameters

  • link latency: l = 1

TDMA Parameters

  • TDMA cycle length: c = 10
  • s1 = LTT1 = 3
  • s2 = LTT2 = 2

S0,0 S1,0 S2,0 C0,0 C1,0 C2,0

t LC0,0

S0,0

t LS0,0

S1,0

τ1 NTT1 t LC1,0

S1,0

τ1 NTT1 t LS1,0

S2,0

τ1 NTT1 5 c = 10 t LS2,0

S2,0

von der Br¨ uggen (TU Dortmund) 15 / 19

slide-46
SLIDE 46

TDMA Design - Rectangular Scheduling (Example)

Communication Tasks

  • task τ1:
  • T1 = 10, LTT1 = 3,

NTT1 = 5

  • s1 = C1,0, d1 = C2,0
  • task τ2:
  • T2 = 10, LTT2 = 2,

NTT2 = 5

  • s2 = C0,0, d1 = C2,0

NoC Parameters

  • link latency: l = 1

TDMA Parameters

  • TDMA cycle length: c = 10
  • s1 = LTT1 = 3
  • s2 = LTT2 = 2

S0,0 S1,0 S2,0 C0,0 C1,0 C2,0

τ2 NTT2 t LC0,0

S0,0

τ2 NTT2 t LS0,0

S1,0

τ1 NTT1 t LC1,0

S1,0

τ1 τ2 NTT1 NTT2 t LS1,0

S2,0

τ1 τ2 NTT1 NTT2 5 c = 10 t LS2,0

S2,0

von der Br¨ uggen (TU Dortmund) 15 / 19

slide-47
SLIDE 47

Evaluation - 3 × 3 parameters

flitPayload (bit) 32 linkLatency (µs) 5 numberOfTasks 20, 25, 30, 35, 40, 45, 50, 100, 200, 300, 400, 500, 750, 1000 utilization (%) 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 65, 70, 75 simple strategies Random, LPF, SPF, LUF, SUF combined strategies LHCF+{LPF,SPF,LUF,SUF} HC-W-LUF solver based CP, ILP periods (µs) 10000, 20000, 40000, 80000, 160000 # experiments 100 ILPTimeLimit (s) 60.0 CPTimeLimit (s) 60.0

von der Br¨ uggen (TU Dortmund) 16 / 19

slide-48
SLIDE 48

Evaluation - Success Rate Analysis (3 × 3 topology)

R a n d

  • m

L P F S P F L U F S U F L H C F + L P F L H C F + S P F L H C F + L U F L H C F + S U F H C

  • W
  • L

U F C P I L P

0.5 1 1.5 2 ·104

21,000 21,000 21,000 21,000 21,000 21,000 21,000 21,000 21,000 21,000 21,000 21,000 11,580 11,619 13,496 13,797 10,972 11,942 12,628 12,845 11,889 13,746 13,744 5,922 4,938 4,938 5,654 5,829 4,831 5,128 5,324 5,383 5,118 5,799 5,936 5,922

#TDMA schedules Successful (≤100 tasks) Successful (>100 tasks) Unsolved

von der Br¨ uggen (TU Dortmund) 17 / 19

slide-49
SLIDE 49

Evaluation - TDMA Cycle Length Analysis

  • minimize TDMA slot length

⇒ minimize memory to store TDMA schedule ⇒ more accurate synchronization (TDMA cycle end)

von der Br¨ uggen (TU Dortmund) 18 / 19

slide-50
SLIDE 50

Conclusion

Results:

  • a framework to derive / verify a TDMA schedule for a NoC
  • greedy heuristic which provides good results
  • a solver-based problem formulation (rectangular scheduling)
  • works with clock drift

von der Br¨ uggen (TU Dortmund) 19 / 19

slide-51
SLIDE 51

Conclusion

Results:

  • a framework to derive / verify a TDMA schedule for a NoC
  • greedy heuristic which provides good results
  • a solver-based problem formulation (rectangular scheduling)
  • works with clock drift

Evaluation:

  • TDMA efficiently applied to NoC with reasonable utilization
  • harmonic periods
  • implicit deadlines
  • synchronous systems
  • short TDMA cycle length (frame size)

von der Br¨ uggen (TU Dortmund) 19 / 19

slide-52
SLIDE 52

Conclusion

Results:

  • a framework to derive / verify a TDMA schedule for a NoC
  • greedy heuristic which provides good results
  • a solver-based problem formulation (rectangular scheduling)
  • works with clock drift

Evaluation:

  • TDMA efficiently applied to NoC with reasonable utilization
  • harmonic periods
  • implicit deadlines
  • synchronous systems
  • short TDMA cycle length (frame size)

Thank You!

von der Br¨ uggen (TU Dortmund) 19 / 19