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Collaboration: Collaboration: The Semiconductor Industrys The - - PowerPoint PPT Presentation

Collaboration: Collaboration: The Semiconductor Industrys The Semiconductor Industrys Path to Survival and Growth Path to Survival and Growth Dr. Michael R. Polcari President and CEO SEMATECH 15 March 2005 3/17/2005


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Collaboration: The Semiconductor Industry’s Path to Survival and Growth Collaboration: The Semiconductor Industry’s Path to Survival and Growth

  • Dr. Michael R. Polcari

President and CEO SEMATECH

15 March 2005

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Outline Outline

  • Environment

– Economic Challenges – Technology Challenges

  • Solutions

– Innovation and Manufacturability through

Collaboration

  • SEMATECH examples
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“The future ain't what it used to be…”

  • Yogi Berra

“The future ain't what it used to be…”

  • Yogi Berra
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The Electronics Ecosystem The Electronics Ecosystem $36,356T $1,240B $213B $52B $28B

Global GDP Electronics Semiconductors

  • Semi. Equipment

Materials

2004 data (GDP from 2003) Sources: World Bank, World Semiconductor Trade Statistics, VLSI Research, SIA, SEMI 2004 data (GDP from 2003) Sources: World Bank, World Semiconductor Trade Statistics, VLSI Research, SIA, SEMI

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Growth may slow, but will continue… Growth may slow, but will continue…

Worldwide Semiconductor Market

50 100 150 200 250 300 1 9 7 2 1 9 7 3 1 9 7 4 1 9 7 5 1 9 7 6 1 9 7 7 1 9 7 8 1 9 7 9 1 9 8 1 9 8 1 1 9 8 2 1 9 8 3 1 9 8 4 1 9 8 5 1 9 8 6 1 9 8 7 1 9 8 8 1 9 8 9 1 9 9 1 9 9 1 1 9 9 2 1 9 9 3 1 9 9 4 1 9 9 5 1 9 9 6 1 9 9 7 1 9 9 8 1 9 9 9 2 2 1 2 2 2 3 2 4

$B

? ?

Sources: Gartner Dataquest and SIA, February 2004

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Business Challenges

The new economy for microelectronics

Business Challenges

The new economy for microelectronics

  • Affordability

– Increasing costs

  • Capital
  • Manufacturing
  • R&D
  • Manufacturability

– Fab and equipment

productivity

  • Affordability

– Increasing costs

  • Capital
  • Manufacturing
  • R&D
  • Manufacturability

– Fab and equipment

productivity

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Semiconductor Manufacturing Challenge Semiconductor Manufacturing Challenge

Wafer Fab Cost Trend

$0.1 $0.2 $0.4 $1.0 $1.6 $2.4 $3.3 $0.05

1 2 3 4

1975 1980 1985 1990 1995 2000 2005E 2010E

Cost ($B)

Source: IC Insights, Inc. Mclean Report, 2004

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Semiconductor R&D Challenge Semiconductor R&D Challenge

Chip Making R&D Versus Revenues

1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1960 1964 1968 1972 1976 1980 1984 1988 1992 1996 2000 2004 2008 2012 2016 2020 (Worldwide in $M)

Source: VLSI Research Inc., 2004

— Semiconductor Revenue — Total RD&E (Chip + Eq) — Semiconductor Revenue — Total RD&E (Chip + Eq)

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International Technology Roadmap for Semiconductors International Technology Roadmap for Semiconductors

350 250 180 130 100 70 50 35 22 1995 1997 1999 2001 2003 2005 2007 2009 2011 2013 2015 2017

1994 1994 1997 1997 1998/1999 1998/1999 2000 2000 2001 2001 2003/2004 2003/2004

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Technology Challenges

Innovation required

Still no known solutions in many areas:

  • Lithography
  • Front End
  • Interconnect
  • Metrology

Technology Challenges

Innovation required

Still no known solutions in many areas:

  • Lithography
  • Front End
  • Interconnect
  • Metrology

Source: ITRS 2004

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Future Transistors

Non-classical CMOS will take us through next 15 years

Future Transistors

Non-classical CMOS will take us through next 15 years Sub 10 nm Beyond CMOS Already Demonstrated nMOS MOSFET pMOS FINFET

Source: Bruce Doris (IBM)

SOI SOI Transistor on thin SOI Transistor on thin SOI

Many Approaches Many Approaches

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Future Patterning Future Patterning

Traditional Traditional

Projection

  • ptics

Wafer stage Liquid supply Liquid recovery Immersion liquid (Scanning motion) Wafer

Immersion Immersion EUV EUV

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Future Connectivity

Next Generation Interconnect

2003-2008 2009

Determine; Roadmap Timelines Critical Needs Projects Projects

Future Connectivity Future Connectivity

Cu Low k & Reliability

SWCNT Nanotubes Optical Interconnects Optically active Molecules

keff ~ 2.7-3.0 keff ~ 2.3-2.6 keff ~ 3.1-3.6

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Future Metrology Future Metrology

CD-SEM of the Future?

Migration of TEM LENS Technology to SEM

Today

FE source Lens Scanning coils Sample Stage wafer Secondary Electron Detector

Top Down Image Top Down Image

Tilt Beam for sidewall metrology

Tomorrow

FE source

Lens Scanning Coils Sample Stage Wafer Secondary Electron Detector

Aberration Correction Lens

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Future Manufacturing Future Manufacturing

Equipment Data

SECS Control Line

Equipment Data Acquisition (EDA) for Rich Standardized Data

Manufacturing Execution Systems Factory Scheduler And Material Control

Wafer Level Tracking and Recipe/Parameter Changes 100% Direct Transport AMHS for Fast Cycle Time

Faster Cycle time Fabs for Hot Lots & High Mix Pervasive Remote Diagnostics

Large Scale Process Control Systems

SPC R2R FDC Yield PCS EPT

Equipment Engineering Capabilities (EEC) Recipes

e-Diag. Equipment Control Systems

Partner, Customer Or Supplier On-line Specs & Tool Maintenance Manuals Rapid Process Matching Predictive Maintenance Efficient Spares Management Today 10 chambers 10 variables per chamber 3 Hz rate each 300 values per sec EDA Goal 10 chambers 50 variables per chamber 10 Hz rate each 10,000 values per sec

Active ISMI Project Future projects

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The New Economy for Microelectronics The New Economy for Microelectronics

  • Slower growth of industry foreseen, compared to

last 30 years

  • Escalating R&D, capital, and manufacturing

costs

– A new factory at 90nm technology on 300mm wafers

has a capital cost of $2-3B

– Rising technology R&D product cycle costs

  • Staggering technology challenges

– 193 immersion/EUV, high/low-k, masks, 3D

interconnect, 300mm/450mm

  • Changing business models in the industry

– Foundries, fabless and fab-lite – New alliances and partnerships

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Collaboration at All Levels Collaboration at All Levels

  • Device manufacturers

– Crolles cluster: Freescale, Philips, STMicro, TSMC – IBM cluster: AMD, IBM, Infineon, Samsung

  • Equipment and materials suppliers and device

manufacturers

– SEMATECH, Selete, individual companies

  • Universities

– SRC/MARCO Focus Centers – SEMATECH AMRC programs

  • Governments

– Texas Advanced Materials Center – Albany Nanotech – IMEC

  • Suppliers
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Innovation and Manufacturability

Two ways to sustain Moore’s Law

Innovation and Manufacturability

Two ways to sustain Moore’s Law

transistors area (cm 2) cost ( $ ) Function

(Transistors/bits)

s ' e r

  • M

Law

cost ( $ ) wafer area (cm2 ) wafer

Increase Good Wafer Output Reduce Opperating Cost ($) Wafer Size Conversion

cost ( $ ) Tool set Wafers Tool set OEE COO

cost ( $ ) area (cm 2)

Design Lithography Metrology Front-End Process Interconnect

Technology Challenges Productivity Challenges

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SEMATECH

Worldwide collaboration

SEMATECH

Worldwide collaboration

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SEMATECH: Focus on Innovation and Manufacturability SEMATECH: Focus on Innovation and Manufacturability

  • SEMATECH is the catalyst for accelerating the

commercialization of technology innovations into manufacturing solutions

  • Accelerated commercialization of university research

(AMRC)

  • Advanced technology innovations (SEMATECH)
  • Manufacturing productivity (ISMI)
  • World-class R&D processing & prototyping (ATDF)
  • Benefits of collaboration

– Save money – Reduce risk – Accelerate development – Increase productivity

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SEMATECH

Accelerating the next technology revolution

SEMATECH

Accelerating the next technology revolution

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FOSTERING INNOVATION FOSTERING INNOVATION

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Advanced Gate Stack for 45nm Node

Fundamental Materials Understanding

Advanced Gate Stack for 45nm Node

Fundamental Materials Understanding

97 98 99 00 01 02 03 04 05 06 07

Hf based oxide EOT~ 0.6nm Metal/ high-k stack Began high-k program with Ta2O5,TiO2, etc I mplementation strategy

SEMATECH FEP/Advanced Gate Stack Program AMRC SRC/FEP-RC SRC/FEP-TC Suppliers

0.8nm 85% 90% µ~ 65% 0.8nm Electrical test methods Metal electrode materials Working with more than 40 universities, suppliers, and consortia Aggressive targets for HP 45nm node FEP-RC identified HfO2

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SEMATECH

Texas Universities

Select Semiconductor Programs

Advanced Materials Research Center (AMRC)

Select programs in: Semiconductors, Nanotechnology State of Texas

Attributes

  • Accelerate commercialization from

universities to corporate products

  • Provide technology pipeline
  • Fundamental understanding
  • High-quality students, technical skills

Structure/Scope

  • Participating facilities include:

– SEMATECH/ATDF – Microelectronics Research Center – Texas Materials Institute – Center for Nano & Molecular Science and Technology

  • Focus on future transistors,

interconnects, patterning, metrology; emerging nanotechnology applications

Advanced Materials Research Center

Accelerating commercialization of university research

Advanced Materials Research Center

Accelerating commercialization of university research

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2004 AMRC University Programs 2004 AMRC University Programs

Details UT Lead Title Lee PVD High -K Dielectrics: Reliability Issues Kwong Materials and Structures frng and Characterization

  • f Key Issues Related to High-K Gate Dielectrics

and Metal Gate Elecrodes Register Modeling of Gate Stack Materials Channel Materials Banerjee Channel materials Ultra-Shallow Junctions Hwang Ultra Shallow Junctions Singh / Banerjee Novel Transistors: Multi-gate SOI MOSFETS, FinFETs, and Vertical MOSFETS Register Transport Models for Strained Si and FinFETs Dodabalapur Advanced Organic/Silicon Devices for chemical and Biosensing Ekerdt Quantum Dot Floating Gate Flash Memories Advanced Cu & Low- K Interconnects Barrier Materials / Low-k Ekerdt / White Ultra Thin Diffusion Barrier and Pore Sealing Techniques for 45 nm and Beyond Nano-Conductors / Low-k Ho Nanoconductors for Future Interconnects 3-D Technology Neikirk Measurement, Electrical Characterization, and Design of Advanced Interconnects

  • R. Chen

Optical Interconnects Deppe Optical Interconnects Campbell Optical Interconnects Holmes Optical Interconnects Optical Extension Immersions Lithography Studies Willson / Bonnecaze / Shi Immersion Lithography - Fluids and Resists Functional Resist Willson / Ekerdt / Shi Functional Resissts Common Resist for 193nm, eBeam, & Imprint Template Willson / Ekerdt / Shi Common Electron Beam Resists Field Assisted Lithography Willson / Sreenivasan Field Assisted Lithography Downer Spectroscopic Methods for Profiling High-K Dielectric Films and Nanometer-Scale SOI Structures Shih Dopant Profiling with STM Yacaman Transition Electron Microscopy Studies Beyond CMOS Campion Strain Measurement by Raman Spectroscopy Patterning Patterning & Standards Korgel Nanowires and Nanodots for Metrology Standards Defects De Lozzane STM Studies for Metrology Topic Materials and Structure for Future Transistors (FEP) Advanced CMOS Materials & Processes Gate Stack Materials Beyond CMOS Novel Transistors New Transistors on Strained Silicon + SOI NanoTechnology Marerials and Structure for Future Connectivity (Interconnect) Future Connectivity Optical Interconnect Optical Detectors for Interconnect Advanced CMOS Patterning of Materials and Structures (Litho) Nanotechnology Patterning Metrology and Characterization

  • f Materials and

Structures (Metrology) Future Transistors

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AMRC Metrology Programs

Innovative approaches

AMRC Metrology Programs

Innovative approaches

  • Spectroscopic Methods for Profiling High-

K Dielectric Films and Nanometer-Scale SOI Structures

  • Dopant Profiling with STM
  • Transmission Electron Microscopy Studies
  • Strain Measurement by Raman

Spectroscopy

  • Nanowires and Nanodots for Metrology

Standards

  • STM Studies for Metrology

– Conductivity of nanowires

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XIDEX Carbon Nanotube Tip for SPM

Accelerating commercialization

XIDEX Carbon Nanotube Tip for SPM

Accelerating commercialization

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Advanced Technology Development Facility (ATDF): R&D processing and prototyping Advanced Technology Development Facility (ATDF): R&D processing and prototyping

ATDF

Fabrication Capability

Equipment & Materials Suppliers Equipment & Materials Suppliers

Wafer Services Wafer Services Supplier Rooms Supplier Rooms Custom Projects Custom Projects

SEMATECH

Divisions

SEMATECH

Divisions Universities Universities Device Makers Device Makers Start-up Companies

Proprietary IP projects possible Proprietary IP projects possible

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Non-classical CMOS MuGFET Non-classical CMOS MuGFET

80 nm Gate Line

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ASSURING MANUFACTURABILITY ASSURING MANUFACTURABILITY

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Immersion Coatings Test Chamber Immersion Coatings Test Chamber

Laser Laser Sample Sample Manipulator Manipulator Spectrometer Spectrometer Light Source Light Source Syringe Pump Syringe Pump for Controlled for Controlled Contamination Contamination Sample Sample Chamber Chamber In In-

  • Situ

Situ Ellipsometer Ellipsometer

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Immersion Technology Center (iTC)

Focus on high-NA applications, future extensibility

Immersion Technology Center (iTC)

Focus on high-NA applications, future extensibility

  • Austin-based iTC will support the development
  • f commercial immersion materials for high-NA

applications to meet production requirements

– Centerpiece is 1.3NA 193nm microstepper

(Exitech/Tropel)

– Design study, and option for manufacture and 2006

delivery of ~1.5NA lens

  • Fluid development required

– Interference lithography tool to provide

complementary platform for high-index fluid development

  • Additional objective to understand extensibility of

immersion lithography

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SEMATECH EUV Program at Albany

Accelerate EUV infrastructure development

SEMATECH EUV Program at Albany

Accelerate EUV infrastructure development

  • 5-year strategic alliance
  • EUV Mask Blank Development Center will speed

the development of commercial EUV masks

  • EUV Resist Test Center will support the

development of commercial EUV photoresists to meet production requirements

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EUV Mask Blank Development

Collaborative model

EUV Mask Blank Development

Collaborative model

SEMATECH North EUV Mask Blank Development Center

Commercial Mask Infrastructure

Consortia VNL Research Partners

SEMATECH Members

Data IP, Data Researchers

ML Deposition Cleaning M e t r

  • l
  • g

y

Researchers

Material Development

Universities

D e f e c t A n a l y s i s

Technology transfer Technology transfer

Commercial Supplier Partners

Contracts Products Products

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Manufacturing Initiative (ISMI)

Improving manufacturing effectiveness and productivity

Manufacturing Initiative (ISMI)

Improving manufacturing effectiveness and productivity

  • Fab benchmarking – today’s installed base

Cost reductions

Resist reduction $1.4M-1.6M/year savings

  • Tool improvements (EPITs)

~8% improvement in scanner availability

  • Factories of the future

– e-Manufacturing – Next wafer size

  • Yield enhancement
  • Metrology
  • ESH

transistors area (cm 2) cost ( $ ) Function

(Transistors/bits)

s ' e r

  • M

Law

cost ( $ ) wafer area (cm2 ) wafer

Increase Good Wafer Output Reduce Opperating Cost ($) Wafer Size Conversion

cost ( $ ) Tool set Wafers Tool set OEE COO

cost ( $ ) area (cm 2)

Design Lithography Metrology Front-End Process Interconnect

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Sharing Manufacturing Excellence

through councils and benchmarking

Sharing Manufacturing Excellence

through councils and benchmarking

  • Manufacturing Methods

Councils

– 20% productivity

improvement in Members’ wafer fabs over last two years

  • Water optimization and

reduction

– Savings of over 42M gallons

per year

  • Energy reduction

– Savings of over $3M per year Percentile Performance Index

Yield, Cycle Time, Avg People, Aligner Prod, 9 Tool Avg

200mm Fabs with 6+ Quarters of Data (1Q99 - 4Q02)

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ISMI Strategic Directions

Improving productivity and yields

ISMI Strategic Directions

Improving productivity and yields

  • Short cycle time
  • “Monitor-free” manufacturing
  • Plug & play equipment
  • Continuous scaling
  • Next wafer size transition
  • Green fab
  • Fully automated fab (hardware, software)
  • People productivity
  • Zero defects, 100% yield
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Semiconductor is the Platform for Emerging Technologies Semiconductor is the Platform for Emerging Technologies

MEMS Airbag Sensor Micro-machined needles for “painless” injections

100 µm

Novel Data Storage System Quantum Dot Transistor The dots are at the atomic level

4.1 nm 0.6 nm

Transistor Structure

250nm

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Collaboration is the Key at SEMATECH Collaboration is the Key at SEMATECH

  • Global Collaboration

– SEMATECH & Selete

  • 300mm, masks, resists

– SEMATECH & SEMI

  • Industry Executive Forum

– SEMATECH & IMEC

  • High-k, 157nm 193i lithography, EUV

– SEMATECH & Semiconductor Research Corporation

  • FEP Transition Center, FORCe, ERC

– SEMATECH & Albany Nanotech – SEMATECH & the Texas Technology Initiative

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Catalyst for Commercialization Catalyst for Commercialization

Innovation Manufacturability

University Research University Research Technology Development Technology Development Productivity Productivity R&D Processing & Prototyping R&D Processing & Prototyping

Acceleration