Brian L. Young, Oregon State University, 5/18/2009 Software Tools - - PowerPoint PPT Presentation

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Brian L. Young, Oregon State University, 5/18/2009 Software Tools - - PowerPoint PPT Presentation

Brian L. Young, Oregon State University, 5/18/2009 Software Tools Preliminary Calculations Mathematical Design Script, MATLAB Simulink Modeling Circuit Implementation Simulink Results Suggestions 2 MATLAB/Simulink


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Brian L. Young, Oregon State University, 5/18/2009

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 Software Tools  Preliminary Calculations  Mathematical Design Script, MATLAB  Simulink Modeling  Circuit Implementation  Simulink Results  Suggestions

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 MATLAB/Simulink  Delta Sigma Toolbox (MATLAB)

 http://www.mathworks.com/matlabcentral/

fileexchange/19

 SD Toolbox 2 (Simulink)

 http://www.mathworks.com/matlabcentral/

fileexchange/7589

 Cadence/Spectre  SWITCAP (“sw2” on SunOS machine)

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 Panic for 5 seconds…  Now, Stop Panicking  Examine Requirements

 ENOB, FBW, FS, etc.

 Determine Target Technology

 Same as ECE 626?

 Explore DStoolbox Demos

 dsdemo[1-3,5].m

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 Calculate SQNR  Modulator Order, OSR,

Quantizer Levels

 Power efficient

designs  thermal noise limited, quantization noise limited

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 Compare Modulator

Order vs. OSR vs. Quantizer Resolution

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2-b

  • bit

1-b

  • bit

3-b

  • bit

[Schr hreier a and nd Teme mes, 2 , 2005]

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 Consider ΔΣ Topologies

 Single Loop vs. MASH; CIFB, CIFF, CRFB, CRFF, etc.

 Write MATLAB script to optimize coefficients

 Order, OSR, Bits, ǁ‗Hǁ‗∞, etc.  DStoolbox  dsdemo[1-3].m

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 Modulator

Coefficients

 NTF and STF

 Magnitude  Poles and Zeros

 Time-domain

Simulation Results

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 Refer to dsdemo3.m  scaleABCD( , , , [x

[x1, … , …, , xL], , , )

 xlim = [x1, …, xL]  Iteratively adjust values of xlim to change

[a, b, c, g] coefficients

 Examine [a, b, c, g] coefficients for integer ratio

quantization  Eases switched-capacitor integrator ratios, and matching

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 Maximize State

Amplitude to minimize distortion

 Leave some margin

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 MATLAB fdatool

 Multirate filter (CIC

Decimator)

 Design Post Filter  Quantize Coeff.

 Fixed-point Math

 Export to Script

  • r Simulink

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 Use as starting point  Noise Sources

 kT/C Noise  White Noise

 Real Integrator

 Finite Gain  Gain Bandwidth  Slew Rate

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 Finite Gain & BW, SR  DAC & Cap Mismatch  Analog Noise  Digital Round-off Errors  Create MATLAB script to

control Simulink model

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 Initialize variables in

MATLAB script

 Choose “Accelerator” to

speedup simulation

 Must have C/C++

 Configuration

Parameters  Solver

  • ptions  variable step,

discrete (no continuous states)

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 Folding of

quantization error

 Shifts NTF zero

locations

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 Based on max

integrator step size

 Abrupt impact on

integrator settling

 Interdependence

with GBW

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 Can cause increased

in-band quantization noise

 GBW of the order

  • f FS

 Interdependence

with Slew Rate

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 Examine dsdemo5.m  Mismatch causes

distortion

 DWA high-pass

filters mismatch

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 MATLAB fdatool  Quantize Coeff.  Internal Precision  Output Fraction Bits  Code into MATLAB

 Easier Testing

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 Includes non-ideal

effects

 DWA active (8-bit

matching)

 Average of 32 runs,

216 points

 Initialize Integrator

States Randomly

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 PSD of Decimated

and Filtered Output

 FBW = 20 MHz

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 Start Early!  Understand DStoolbox dsdemo’s  Write DStoolbox Script

 Fully test before starting Simulink and Cadence!!!

 Build Transistor-based Switches in Cadence

 Helps mitigate convergence issues

 Understand SD Toolbox 2 (Simulink) and adapt

to your system

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