Analysis of TDMA Crossbar Real-Time Switch Design for AFDX Networks - - PowerPoint PPT Presentation

▶
analysis of tdma crossbar real time switch design for
SMART_READER_LITE
LIVE PREVIEW

Analysis of TDMA Crossbar Real-Time Switch Design for AFDX Networks - - PowerPoint PPT Presentation

Jan 20, 2023 143 likes •479 views

Analysis of TDMA Crossbar Real-Time Switch Design for AFDX Networks Lei Rao *, Qixin Wang , Xue Liu , Yufei Wang Department of Computing, The Hong Kong Polytechnic University, China School of Computer Science, McGill

slide-1
SLIDE 1

Analysis of TDMA Crossbar Real-Time Switch Design for AFDX Networks

Lei Rao ‡ †*, Qixin Wang‡, Xue Liu†, Yufei Wang‡

‡Department of Computing, The Hong Kong Polytechnic University, China †School of Computer Science, McGill University, Canada

* Presenter, now working at General Motors Research Lab, United States. Contact information: lei.rao@gm.com March 29, 2012

slide-2
SLIDE 2

Content

Problem Statement and Analysis Resource Planning Problem and Approximation Algorithm Related Work Background Conclusion

slide-3
SLIDE 3

AFDX is a data network for safety-critical applications that utilizes dedicated bandwidth while providing deterministic Quality of Service (QoS). – from wikipedia

AFDX Network

 10/100Mbit switched Ethernet  Based upon IEEE 802.3 and ARINC 664  Bridges the gap on reliability of guaranteed bandwidth in ARINC 664  Adopted by Airbus A380, Boeing 787 Dreamliner etc

Background: Avionics Full DupleX (AFDX) Switched Ethernet

slide-4
SLIDE 4

AFDX: Properties

  • Properties in AFDX:
  • Redundancy for reliable transmission
  • Virtual links with traffic shaping for end-

systems’ communication

  • Elements in an AFDX network:
  • AFDX End-system
  • AFDX Switch
  • AFDX Links
slide-5
SLIDE 5

AFDX: Virtual Links and Switches

  • Each VL conducts one unicast flow from a source-end to a destination-end (e.g. E1

to E5) ;

  • Along the VL’s route, before entering each AFDX node, the VL flow must behave

as if policed by a token bucket;

  • With the per hop token bucket policing and proper switch architecture design, we

can guarantee end-to-end real-time for each VL.

slide-6
SLIDE 6

Problem Statement: AFDX Switch Architecture Design

  • AFDX standard leaves the switch architecture

design open

– Challenge

  • Vendors want to reuse the legacy switch architecture

instead of a complete re-design

– Design goals

  • Build AFDX networks using a popular real-time switch,

which we call TDMA crossbar real-time switch

  • Compliance with many mainstream non-real-time

switch architectures

slide-7
SLIDE 7

AFDX Switch Architecture Design

  • Basic idea & approaches

– Prove that TDMA crossbar real-time switched network is AFDX compliant

  • Traffic pattern & e2e real-time delay bound

– Discuss the AFDX network’s resource planning problem

  • NP-hard

– Re-model and approximate the NP-hard problem

slide-8
SLIDE 8

Background: TDMA Crossbar Real-Time Switch architecture

  • Features

– Packets are buffered at the inputs

  • All packets are fragmented into same-size units called cells
  • Each input carries out per-flow queueing

– Outputs fetch/ forward cells synchronously and periodically

  • The period is called a cell-time
  • Each output runs a static TDMA schedule of M cell-time
  • Advantages

– Simple design/schedulability analysis – High switch utilization – Complie/simplifie with mainstream Internet switch architecture

slide-9
SLIDE 9

Cell time: 1 2 3 4 5 I1: I2: I3: I4:

Demand

a cell to send to O1 a cell to send to O2 a cell to send to O3 a cell to send to O4

TDMA scheduling frame of M cell-time, e.g., M = 5

Case Study: TDMA Crossbar Real-Time Switch Scheduling

Fit all real-time flows’ periods into frame, e.g., (11, 3)  (5, 2), i.e., (10, 4)

(11,3): sending a message of 3 cells every 11 cell-time VM-task (5,2): the real-time task is served 2 cell-time units during each clock period

  • f 5 cell times

We consider messages in terms of a cell-time e.g 1 cell = 1 bit; 1 cell-time =1 ns

slide-10
SLIDE 10

Demand

Cell time: 1 2 3 4 5 I1: I2: I3: I4:

Schedule

Scheduling Algorithm

Theorem 1 (Schedulability): If demand matrix’ every color ≤ M cell, then have config. time scheduler with O(N4) time cost [TII10].

Cell time: 1 2 3 4 5 I1: I2: I3: I4: a cell to send to O1 a cell to send to O2 a cell to send to O3 a cell to send to O4

Case Study: TDMA Crossbar Real-Time Switch Scheduling

slide-11
SLIDE 11

Analysis: AFDX Compliance

AFDX compliance

  • Along the VL’s route, before entering each AFDX switch, the VL flow must behave

as if policed by a token bucket;

  • With the per hop token bucket policing and proper switch architecture design, we

can guarantee end-to-end real-time for each VL Lf : flow f’s in-network maximum packet length Hf : total number of hops for a flow M: frame size Pf : flow f’s in-network period Cf : per-frame allocated slots

slide-12
SLIDE 12

Analysis: AFDX Compliance

  • Theorem 2 (AFDX Compliance)

– Per flow analysis with network calculus – Giving end to end delay

src end: source a: arrival curve for each flow at a switch s: service curve for each flow at a switch v: TDMA crossbar real-time switch des end: destination өf : flow f’s required cell time uf : flow f’s utilization src end V0 V1 VHf-1 VHf

..

af

(0)

sf

(0)

af

(1)

sf

(1)

af

(Hf-1)

sf

(Hf-1)

af

(Hf)

(des end)

slide-13
SLIDE 13

Resource Planning Problem

P(G(V,E),F): TDMA crossbar real-time switch AFDX network resource planning problem

  • AFDX network G(V,E), where V is the set of all switches and E is the set of

links between the switches

  • F is the set of flow in the AFDX network

Objective network utility maximization Constraints switch schedulability Constraints end-to-end delay guarantee

slide-14
SLIDE 14

Resource Planning Problem: NP-Hard

Objective network utility maximization Constraints switch schedulability Constraints end-to-end delay guarantee

slide-15
SLIDE 15
  • Knapsack problem has been known as NP-Hard
  • An instance of knapsack problem ҡ(Ξ, size,

value, Өs ,Өv ) can be reduced to an instance of TDMA crossbar real-time switched AFDX network resource planning problem:

– Construct an AFDX network of three nodes: one source-end, connected by one TDMA crossbar switch to one destination end. – becomes equivalent to asking ‘is the constructed resource planning problem results in a maximum ≥ Өv ’

Analysis: Why NP-Hard

slide-16
SLIDE 16

Approximation Algorithm

To address the challenge that resource planning problem P(G(V,E),F) is NP-Hard, we propose a re-modeling approach, upon which, we propose an approximation algorithm for P(G(V,E),F)

Definition: A configuration function cfg is a function of F → {0,1,…,ᴧ-1}, where ᴧ denotes all the alternatives of solutions Let U~ and U* be the total utility corresponding to cfg~ and the actual

  • ptimal cfg* respectively. We have

ᴧ: the maximum number of alternatives in the network Π: the set of all ports

slide-17
SLIDE 17

Related Work

  • Analysis of real-time behavior of AFDX

networks upon switches [TII 09, ECRTS 06, INFOCOM 11]

  • Industrial fieldbus designs [IECON 09]
  • TDMA Crossbar Switch Design [TII 10]
  • Knapsack problem approximation algorithm
slide-18
SLIDE 18

Conclusion

  • TDMA crossbar real-time switch design for

AFDX networks

– We proved that TDMA crossbar real-time switched network is AFDX compliant – We proved the corresponding AFDX network’s resource planning problem is NP-Hard – We proposed a re-modeling approach

  • We proposed an approximation algorithm
slide-19
SLIDE 19

Thanks & Questions

slide-20
SLIDE 20

Background: Token Bucket

  • A token bucket flow is defined by (ρ,σ)
  • ρ

denotes the bucket refilling rate at which tokens(credits) are accumulated

  • ρf = Lmax

f (1+Jf

/ BAGf )

  • σ is the bucket size
  • σf = Lmax

f

/ BAGf

  • Lmax

f

: the maximum packet bit length

  • BAGf

: the bandwidth allocation gap

  • Jf

: the maximum admissible jitter

slide-21
SLIDE 21

Background: BAG

  • How to affect QoS? -- Bandwidth
  • BAG (bandwidth allocation gap)
  • Primary bandwidth control scheme
  • Minimum

time interval between two successive frames

BAG BAG

slide-22
SLIDE 22

I1 I2 I3

Input Ports

Background: TDMA Crossbar Real-Time Switch architecture

slide-23
SLIDE 23

I1 I2 I3 O1 O2 O3

Output Ports

Background: TDMA Crossbar Real-Time Switch architecture

slide-24
SLIDE 24

I1 I2 I3 O1 O2 O3

Per-Flow-Queueing

Background: TDMA Crossbar Real-Time Switch architecture

slide-25
SLIDE 25

I1 I2 I3 O1 O2 O3

cells

Background: TDMA Crossbar Real-Time Switch architecture

slide-26
SLIDE 26

I1 O1 O2 O3 I2 I3

cell cell cell cell cell cell

Background: TDMA Crossbar Real-Time Switch architecture

slide-27
SLIDE 27

I1 I2 I3 O1 O2 O3

Synchronous periodic cell forwarding Cell-Time

Background: TDMA Crossbar Real-Time Switch architecture

slide-28
SLIDE 28

I1 I2 I3 O1 O2 O3

Matching

Background: TDMA Crossbar Real-Time Switch architecture

slide-29
SLIDE 29

I1 I2 I3 O1 O2 O3

Why Matching? An input/output can only send/receive one cell per cell-time

Background: TDMA Crossbar Real-Time Switch architecture

slide-30
SLIDE 30

I1 I2 I3 O1 O2 O3

Internal Matching: if an input has multiple per-flow-q for the same output, only one is picked every cell-time.

Background: TDMA Crossbar Real-Time Switch architecture

slide-31
SLIDE 31

I1 I2 I3 O1 O2 O3

Background: TDMA Crossbar Real-Time Switch architecture

slide-32
SLIDE 32

I1 I2 I3 O1 O2 O3

Background: TDMA Crossbar Real-Time Switch architecture

slide-33
SLIDE 33

I1 I2 I3 O1 O2 O3

Background: TDMA Crossbar Real-Time Switch architecture