Advanced JTAG for Future Impementations Dima Levit Physik - PowerPoint PPT Presentation

Advanced JTAG for Future Impementations Dima Levit Physik Department E18 - Technische Universität München The 19th International Workshop on DEPFET Detectors and Applications May 11nd, 2015. Kloster Seeon supported by: Maier-Leibnitz-Labor der TU und LMU München, Cluster of Excellence: Origin and Structure of the Universe, BMBF Belle

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Outline Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Dima Levit | Advanced JTAG for Future Impementations 2/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Outline Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Dima Levit | Advanced JTAG for Future Impementations 3/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions IEEE 1149. 1 , Daisy Chain 1 TDI TCK and TMS connected in parallel TDI and TDO connected in daisy TCK 2 chain TMS ASIC 3 accessible only if 2 and 1 are not broken 3 TDO In PXD: up to 14 ASICs in the chain Figure : Daisy chain topology Dima Levit | Advanced JTAG for Future Impementations 4/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Complications with Daisy Chain Figure : EMCM3 W17-3 with Switcher 5 broken Switcher 5 broken switcher 6 cannot be accessed no readback from any switcher possible Dima Levit | Advanced JTAG for Future Impementations 5/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Outline Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Dima Levit | Advanced JTAG for Future Impementations 6/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions IEEE 1149. 7 Architecture Backwards compatible with IEEE 1149.1 standard Figure : IEEE 1149.7 architecture Implements 6 additional classes for advanced features TAP .7 cores commercially available Valid IEEE 1149.1 control sequence TCK(C) (Zero-Bit-Scan) as escape sequence Adapter TMS(C) 1149.7 .7) TDI (TAP TCK TMS 1149.1 TDO Core TDI TDO Figure : IEEE 1149.7 integration with older designs Dima Levit | Advanced JTAG for Future Impementations 7/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions IEEE 1149. 7 Architecture 1 TEST LOGIC RESET 0 0 1 1 1 RUN-TEST/IDLE SELECT-DR-SCAN SELECT-IR-SCAN 0 0 1 1 CAPTURE-DR CAPTURE-IR 0 0 Valid IEEE 1149.1 sequence SHIFT-DR SHIFT-IR 0 0 1 1 1 1 Does not change status of the JTAG EXIT1-DR EXIT1-IR 0 0 registers PAUSE-DR PAUSE-IR 0 0 1 1 0 0 EXIT2-DR EXIT2-IR Gives access to registers of the IEEE 1 1 UPDATE-DR UPDATE-IR 1149.7 controller 1 0 1 0 Figure : Zero-Bit-Scan as escape sequence Dima Levit | Advanced JTAG for Future Impementations 8/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions IEEE 1149. 7 Star Topology TDI TCK TMS TDO TAP3: parallel TCK , TMS , TDI , TDO uni-directional signals TAP4: parallel TCKC : uni-directional, Figure : Star-4 topology, TAP3 TMSC : bi-directional Direct addressability with mandatory TAP .7 Controller Address (TCA) Node ID[7:0] Device ID[27:12] Device ID[11:0] Part Number Manufacturer 34 27 26 11 10 0 4 bit Controller ID allocated by master TCKC TMSC based on the TCA Figure : Star-2 topology, TAP4 Dima Levit | Advanced JTAG for Future Impementations 9/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions TAP4 Serialization Time division multiplexing TCKC TMSC nTDI TMS TDO nTDI Figure : TAP4 OScan1 format TCKC TMSC nTDI nTDI nTDI nTDI Figure : TAP4 Oscan7 format Dima Levit | Advanced JTAG for Future Impementations 10/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions IEEE 1149. 7 Design Requirements SW SW Work packages: Implementation in ASICs SW DHPT/Switcher mandatory DCD optionally SW FPGA support / Software support SW Changes in module layout Star topology DCD DCD DCD DCD Node ID encoding SW DHPT DHPT DHPT DHPT 1149.7 1149.7 1149.7 1149.7 Adapter Adapter Adapter Adapter TCKC TMSC To/From DHE Dima Levit | Advanced JTAG for Future Impementations 11/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Outline Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Dima Levit | Advanced JTAG for Future Impementations 12/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Conclusions Long daisy chain fails if a chip in the chain fails Solved by the IEEE 1149.7 with the star topology resistance against ASIC failure reduced pin count JTAG is not a slow control friendly standard: standard does not define length of the registers functionality often encoded in the bit fields of long JTAG registers this makes hard to implements synchronous logic and fast scan functionality different protocol with star topology (I2C) may solve this problem Dima Levit | Advanced JTAG for Future Impementations 13/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Literature Doing more with less - An IEEE 1149.7 embedded tutorial : Standard for reduced-pin and enhanced-functionality test access port and boundary-scan architecture http://dx.doi.org/10.1109/TEST.2009.5355572 Talk: http://btw.tttc-events.org/material/BTW10/ Presentations/Session%203.2.pptx Neal Stollon, On-Chip Instrumentation: Design and Debug for Systems on Chip (Springer US, 2011), http://www.myilibrary.com?ID=308357 1149.7-2009 - IEEE Standard for Reduced-Pin and Enhanced-Functionality Test Access Port and Boundary-Scan Architecture, http://dx.doi.org/10.1109/IEEESTD.2010.5412866 Dima Levit | Advanced JTAG for Future Impementations 14/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Thank you for your attention! Questions? Dima Levit | Advanced JTAG for Future Impementations 15/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Back Up Back up slides Dima Levit | Advanced JTAG for Future Impementations 16/17

Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions Back Up Outer Backward Outer Forward DCD1 DCD2 DCD3 DCD4 DHP1 DHP2 DHP3 DHP4 Dima Levit | Advanced JTAG for Future Impementations 17/17