Advanced JTAG for Future Impementations Dima Levit Physik - - PowerPoint PPT Presentation
Advanced JTAG for Future Impementations Dima Levit Physik Department E18 - Technische Universitt Mnchen The 19th International Workshop on DEPFET Detectors and Applications May 11nd, 2015. Kloster Seeon supported by: Maier-Leibnitz-Labor
Dima Levit
Physik Department E18 - Technische Universität München
The 19th International Workshop on DEPFET Detectors and Applications May 11nd, 2015. Kloster Seeon
supported by: Maier-Leibnitz-Labor der TU und LMU München, Cluster of Excellence: Origin and Structure of the Universe, BMBF
Belle
Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
TCK TMS TDO TDI
1 2 3
Figure : Daisy chain topology
TCK and TMS connected in parallel TDI and TDO connected in daisy chain ASIC 3 accessible only if 2 and 1 are not broken In PXD: up to 14 ASICs in the chain
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
Figure : EMCM3 W17-3 with Switcher 5 broken
Switcher 5 broken
switcher 6 cannot be accessed no readback from any switcher possible
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
Figure : IEEE 1149.7 architecture
1149.7 Adapter (TAP .7) 1149.1 Core
TCK(C) TMS(C) TDI TDO TCK TMS TDI TDO
Figure : IEEE 1149.7 integration with older designs
Backwards compatible with IEEE 1149.1 standard Implements 6 additional classes for advanced features TAP .7 cores commercially available Valid IEEE 1149.1 control sequence (Zero-Bit-Scan) as escape sequence
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
TEST LOGIC RESET RUN-TEST/IDLE SELECT-DR-SCAN SELECT-IR-SCAN CAPTURE-DR CAPTURE-IR SHIFT-DR SHIFT-IR EXIT1-DR EXIT1-IR PAUSE-DR PAUSE-IR EXIT2-DR EXIT2-IR UPDATE-DR UPDATE-IR 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Figure : Zero-Bit-Scan as escape sequence
Valid IEEE 1149.1 sequence Does not change status of the JTAG registers Gives access to registers of the IEEE 1149.7 controller
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
TCK TMS TDO TDI
Figure : Star-4 topology, TAP3
TCKC TMSC
Figure : Star-2 topology, TAP4
TAP3: parallel TCK, TMS, TDI, TDO uni-directional signals TAP4: parallel TCKC: uni-directional, TMSC: bi-directional Direct addressability with mandatory TAP .7 Controller Address (TCA)
Node ID[7:0] Device ID[27:12] Part Number Device ID[11:0] Manufacturer
34 27 26 11 10
4 bit Controller ID allocated by master based on the TCA
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
Time division multiplexing nTDI TMS TDO nTDI TCKC TMSC
Figure : TAP4 OScan1 format
nTDI nTDI TCKC TMSC nTDI nTDI
Figure : TAP4 Oscan7 format
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
Implementation in ASICs
DHPT/Switcher mandatory DCD optionally
FPGA support / Software support Changes in module layout
Star topology Node ID encoding
TCKC TMSC SW SW SW SW SW SW To/From DHE DCD DCD DCD DCD DHPT DHPT DHPT DHPT
1149.7 Adapter 1149.7 Adapter 1149.7 Adapter 1149.7 Adapter
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
Long daisy chain fails if a chip in the chain fails Solved by the IEEE 1149.7 with the star topology
resistance against ASIC failure reduced pin count
JTAG is not a slow control friendly standard:
standard does not define length of the registers functionality often encoded in the bit fields of long JTAG registers this makes hard to implements synchronous logic and fast scan functionality different protocol with star topology (I2C) may solve this problem
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
Doing more with less - An IEEE 1149.7 embedded tutorial : Standard for reduced-pin and enhanced-functionality test access port and boundary-scan architecture http://dx.doi.org/10.1109/TEST.2009.5355572
Talk: http://btw.tttc-events.org/material/BTW10/ Presentations/Session%203.2.pptx
Neal Stollon, On-Chip Instrumentation: Design and Debug for Systems
http://www.myilibrary.com?ID=308357 1149.7-2009 - IEEE Standard for Reduced-Pin and Enhanced-Functionality Test Access Port and Boundary-Scan Architecture, http://dx.doi.org/10.1109/IEEESTD.2010.5412866
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
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Daisy Chain JTAG, IEEE 1149.1 Star Topology JTAG, IEEE 1149.7 Conclusions
Outer Forward Outer Backward
DCD1 DCD2 DCD3 DCD4 DHP1 DHP2 DHP3 DHP4
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