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Reverse engineering AT32UC3As JTAG Pierre Surply Reverse engineering AT32UC3As JTAG Introduction Overview LSE Summer Week 2014 TAP Controller Scan Chain Pierre Surply Boundary Scan UC3 JTAG EPITA 2016 Reverse engineering Jul


  1. Reverse engineering AT32UC3A’s JTAG Pierre Surply Reverse engineering AT32UC3A’s JTAG Introduction Overview LSE Summer Week 2014 TAP Controller Scan Chain Pierre Surply Boundary Scan UC3 JTAG EPITA 2016 Reverse engineering Jul 19, 2014 Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 1 / 72

  2. On-Chip Debug Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: AVR Dragon avr32gdbproxy -e "avrdragon" -a ":4242" Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 2 / 72

  3. JTAG Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Join Test Action Group Overview TAP Published in April 1990 Controller IEEE 1149.1 Scan Chain Standard Test Access Port and Boundary-Scan Boundary Scan Architecture UC3 JTAG Reverse engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 3 / 72

  4. JTAG pins Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction TCK : Test Clock Overview TAP TMS : Test Mode Select Controller TDI : Test Data Input Scan Chain TDO : Test Data Output Boundary Scan TRST : Test Reset UC3 JTAG Reverse engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 4 / 72

  5. Registers Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Instruction Registers Overview TAP Data Registers: Controller Scan Chain IDCODE Boundary BYPASS Scan BSR UC3 JTAG Reverse engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 5 / 72

  6. JTAG Block Diagram Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: JTAG Block Diagram Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 6 / 72

  7. Shift Register Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan Figure: Shift Register (1/5) UC3 JTAG Reverse engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 7 / 72

  8. Shift Register Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan Figure: Shift Register (2/5) UC3 JTAG Reverse engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 8 / 72

  9. Shift Register Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan Figure: Shift Register (3/5) UC3 JTAG Reverse engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 9 / 72

  10. Shift Register Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan Figure: Shift Register (4/5) UC3 JTAG Reverse engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 10 / 72

  11. Shift Register Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan Figure: Shift Register (5/5) UC3 JTAG Reverse engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 11 / 72

  12. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion DR : Data Register IR : Instruction Register Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 12 / 72

  13. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (1/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 13 / 72

  14. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (2/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 14 / 72

  15. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (3/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 15 / 72

  16. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (4/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 16 / 72

  17. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (5/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 17 / 72

  18. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (6/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 18 / 72

  19. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (7/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 19 / 72

  20. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (8/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 20 / 72

  21. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (9/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 21 / 72

  22. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (10/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 22 / 72

  23. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (11/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 23 / 72

  24. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (12/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 24 / 72

  25. TAP Controller State Machine Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse engineering Conclusion Figure: TAP Controller Example (13/13) Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 25 / 72

  26. Daisy Chain Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse Figure: Daisy Chain engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 26 / 72

  27. BYPASS Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse Figure: BYPASS Register engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 27 / 72

  28. BYPASS Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse Figure: BYPASS and Daisy Chain (1/3) engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 28 / 72

  29. BYPASS Reverse engineering AT32UC3A’s JTAG Pierre Surply Introduction Overview TAP Controller Scan Chain Boundary Scan UC3 JTAG Reverse Figure: BYPASS and Daisy Chain (2/3) engineering Conclusion Pierre Surply (EPITA 2016) Reverse engineering AT32UC3A’s JTAG Jul 19, 2014 29 / 72

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