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Acceleration of HPC applications on hybrid CPU-GPU systems: When can Multi-Process Service (MPS) help? GTC 2018 March 28, 2018 Olga Pearce (Lawrence Livermore National Laboratory) http://people.llnl.gov/olga Max Katz (NVIDIA), Leopold Grinberg


  1. Acceleration of HPC applications on hybrid CPU-GPU systems: When can Multi-Process Service (MPS) help? GTC 2018 March 28, 2018 Olga Pearce (Lawrence Livermore National Laboratory) http://people.llnl.gov/olga Max Katz (NVIDIA), Leopold Grinberg (IBM) This work was performed under the auspices of the U.S. Department of Energy by Lawrence Livermore National Laboratory under contract DE- LLNL-PRES-746880 Slide 1 AC52-07NA27344. Lawrence Livermore National Security, LLC

  2. Multi-Process Service (MPS) Allows kernels launched from different (MPI) processes to be processed concurrently on the same GPU ◮ Utilize inactive SMs when the work is small Share GPU ‘in space’ SMs Time on GPU schedule LLNL-PRES-746880 Slide 2

  3. Multi-Process Service (MPS) Allows kernels launched from different (MPI) processes to be processed concurrently on the same GPU ◮ Utilize inactive SMs when ◮ Processes take turns if the work is small every SM is occupied Share GPU ‘in space’ Share GPU ‘in time’ SMs SMs Time on GPU schedule Time on GPU schedule LLNL-PRES-746880 Slide 2

  4. Sierra system architecture finalized and currently under deployment at LLNL Compute System 4,320 nodes 1.29 PB Memory 240 Compute Racks 125 PFLOPS ≈ 12 MW LLNL-PRES-746880 Slide 3

  5. Sierra system architecture finalized and currently under deployment at LLNL Compute System Compute Node 4,320 nodes 2 IBM POWER9 CPUs 1.29 PB Memory 4 NVIDIA Volta GPUs 240 Compute Racks 256 GiB DDR4 125 PFLOPS NVMe-compatible PCIe 1.6 TB SSD ≈ 12 MW 16 GiB Globally addressable HBM2 associated with each GPU Coherent Shared Memory LLNL-PRES-746880 Slide 3

  6. Sierra system architecture finalized and currently under deployment at LLNL Compute System Compute Node 4,320 nodes 2 IBM POWER9 CPUs 1.29 PB Memory 4 NVIDIA Volta GPUs 240 Compute Racks 256 GiB DDR4 125 PFLOPS NVMe-compatible PCIe 1.6 TB SSD ≈ 12 MW 16 GiB Globally addressable HBM2 associated with each GPU Coherent Shared Memory 5% FLOPS 95% FLOPS LLNL-PRES-746880 Slide 3

  7. Ways to utilize a node of Sierra (showing one socket) GPU GPU CPU LLNL-PRES-746880 Slide 4

  8. Ways to utilize a node of Sierra (showing one socket) ◮ MPI process/core GPU GPU CPU � � � � � � � � � � � � � � � � � � � � � � LLNL-PRES-746880 Slide 4

  9. Ways to utilize a node of Sierra (showing one socket) ◮ MPI process/core GPU GPU ◮ MPI process/GPU CPU � � � � � � � � � � � � � � � � � � � � � � � � GPU GPU CPU LLNL-PRES-746880 Slide 4

  10. Ways to utilize a node of Sierra (showing one socket) ◮ MPI process/core GPU GPU ◮ MPI process/GPU CPU � � � � � � � � � � � � � � � � � � � � � � � � GPU GPU ◮ MPI process/core, CPU MPS for GPU � � GPU GPU CPU LLNL-PRES-746880 Slide 4

  11. Ways to utilize a node of Sierra (showing one socket) ◮ MPI process/core GPU GPU ◮ MPI process/GPU CPU � � � � � � � � � � � � � � � � � � � � � � � � GPU GPU ◮ MPI process/core, CPU MPS for GPU � � GPU GPU CPU LLNL-PRES-746880 Slide 4

  12. Parallel performance of multiphysics simulations Decide how to run each phase of the multiphysics simulation ◮ On GPU vs. on CPU ◮ How many MPI processes (one per CPU core or one per GPU?) ◮ If some phases use one MPI process per CPU core, can we use MPS for the accelerated phases? LLNL-PRES-746880 Slide 5

  13. Parallel performance of multiphysics simulations Decide how to run each phase of the multiphysics simulation ◮ On GPU vs. on CPU ◮ How many MPI processes (one per CPU core or one per GPU?) ◮ If some phases use one MPI process per CPU core, can we use MPS for the accelerated phases? Outline: ◮ Tools used for measurement ◮ Multiphysics application ◮ How the application is accelerated ◮ Results: MPI process/GPU vs. 4 MPI processes/GPU + MPS ◮ Impact on kernel performance ◮ Impact on communication LLNL-PRES-746880 Slide 5

  14. Tool: Caliper [SC’16] https://github.com/LLNL/Caliper ◮ Performance analysis toolbox, leverages existing tools ◮ Developed at LLNL ◮ Caliper team is responsive to our needs 1. Annotate: begin/end API similar to timers libraries ◮ Annotation of libraries (e.g., SAMRAI, hypre) combined seamlessly 2. Collect: Runtime parameters to instruct Caliper to measure: ◮ Measure MPI function calls ◮ Linux perf_event sampling (Libpfm) ◮ Measure CUDA driver/runtime calls (using CUPTI) 3. Analyze ◮ Using JSON output format LLNL-PRES-746880 Slide 6

  15. Application: ARES is a massively parallel, multi-dimensional, multi-physics code at LLNL Physics Capabilities: ◮ ALE-AMR Hydrodynamics ◮ High-order Eulerian Hydrodynamics ◮ Elastic-Plastic flow ◮ 3T plasma physics ◮ High-Explosive modeling ◮ Diffusion, S N Radiation ◮ Particulate flow ◮ Laser ray-tracing ◮ Magnetohydrodynamics (MHD) ◮ Dynamic mixing ◮ Non-LTE opacities Applications: ◮ Inertial Confinement Fusion (ICF) ◮ Pulsed power ◮ National Ignition Facility debris ◮ High-Explosive experiments LLNL-PRES-746880 Slide 7

  16. ARES ◮ 800k lines of C/C++ with MPI ◮ 22 years old, used daily on our current supercomputers ◮ Single code base effectively utilizes all HPC platforms LLNL-PRES-746880 Slide 8

  17. ARES uses RAJA https://github.com/LLNL/RAJA ◮ 800k lines of C/C++ with MPI ◮ 22 years old, used daily on our current supercomputers ◮ Single code base effectively utilizes all HPC platforms ◮ Use RAJA as an abstraction layer for on-node parallelization ◮ RAJA is a collection of C++ software abstractions ◮ Separation of concerns C-style for-loop: RAJA-style loop: 1: double* x; double* y; 1: double* x; double* y; 2: double a; 2: double a; 3: for ( int i = begin; 3: RAJA::forall < exec_policy > i < end; ++i ) { (begin, end, [=] (int i) { 4: 4: y[i] += a * x[i]; y[i] += a * x[i]; 5: 5: 6: } 6: }); ◮ Use different RAJA backends (CUDA, OpenMP) LLNL-PRES-746880 Slide 8

  18. Results 3D Sedov blastwave problem ◮ Hydrodynamics calculation ◮ ≈ 80 kernels LLNL-PRES-746880 Slide 9

  19. Results 3D Sedov blastwave problem ◮ Hydrodynamics calculation ◮ ≈ 80 kernels ◮ Pre-SIERRA machine (rzmanta) - Minsky nodes: ◮ 2x Power8+ CPUs (20 cores) ◮ 4x NVIDIA P100 (Pascal) GPUs with 16GB memory each ◮ NVLINK 1.0 ◮ * Some results generated with pre-release versions of compilers; improvements in performance expected in future releases ◮ All results shown use 4 Minsky nodes (16 GPUs) LLNL-PRES-746880 Slide 9

  20. Domain decomposition with and without MPS MPI process/ GPU 4 MPI processes/ GPU + MPS Differences: ◮ Computation: Work per MPI process ◮ Communication: Neighbors and surface to volume ratio LLNL-PRES-746880 Slide 10

  21. Overall runtime with and without MPS MPI process/GPU 4 MPI processes/GPU + MPS 30 Time (sec) 20 10 0 0 200 250 300 350 400 Problem size (zones 3 ) LLNL-PRES-746880 Slide 11

  22. Overall runtime with and without MPS MPI process/GPU 4 MPI processes/GPU + MPS 30 Differences: Time (sec) ◮ Computation 20 ◮ Communication 10 ◮ Memory 0 0 200 250 300 350 400 Problem size (zones 3 ) LLNL-PRES-746880 Slide 11

  23. Computation time: Small kernels MPI process/GPU 2 4 MPI processes/GPU + MPS Time (sec) 1 0 0 200 250 300 350 400 Problem size (zones 3 ) LLNL-PRES-746880 Slide 12

  24. Computation time: Small kernels MPI process/GPU 2 ◮ Few zones, small amount 4 MPI processes/GPU + MPS Time (sec) of work per zone ◮ Dominated by kernel 1 launch overhead ◮ MPS may be slightly slower 0 0 200 250 300 350 400 Problem size (zones 3 ) LLNL-PRES-746880 Slide 12

  25. Computation time: Large kernels MPI process/GPU 4 MPI processes/GPU + MPS 20 Time (sec) 10 0 0 200 250 300 350 400 Problem size (zones 3 ) LLNL-PRES-746880 Slide 13

  26. Computation time: Large kernels MPS is faster especially when MPI process/GPU problem size is large 4 MPI processes/GPU + MPS 20 ◮ Utilizing GPU better? Time (sec) ◮ GPU utilization? ◮ GPU occupancy? 10 ◮ Utilizing CPU better? ◮ More parallelization? 0 0 ◮ Better utilization of CPU 200 250 300 350 400 memory bandwidth? Problem size (zones 3 ) LLNL-PRES-746880 Slide 13

  27. Waiting on the GPU: cudaDeviceSynchronize 8 MPI process/GPU 4 MPI processes/GPU + MPS 6 Time (sec) 4 2 0 0 200 250 300 350 400 Problem size (zones 3 ) LLNL-PRES-746880 Slide 14

  28. Waiting on the GPU: cudaDeviceSynchronize 8 MPI process/GPU 4 MPI processes/GPU + MPS 6 Time (sec) ◮ Appear to be waiting on 4 the GPU longer without MPS 2 0 0 200 250 300 350 400 Problem size (zones 3 ) LLNL-PRES-746880 Slide 14

  29. Domain decomposition with and without MPS MPI process/ GPU 4 MPI processes/ GPU + MPS LLNL-PRES-746880 Slide 15

  30. Domain decomposition with and without MPS MPI process/ GPU 4 MPI processes/ GPU + MPS LLNL-PRES-746880 Slide 15

  31. Domain decomposition with and without MPS MPI process/ GPU 4 MPI processes/ GPU + MPS Differences in communication: ◮ Number of neighbors in halo exchange ◮ Surface to volume ratio ◮ Processor mapping ◮ Other LLNL-PRES-746880 Slide 15

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