A UTOMATIC GENERATION OF DATAFLOW - BASED LOW - POWER E - - PowerPoint PPT Presentation

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A UTOMATIC GENERATION OF DATAFLOW - BASED LOW - POWER E - - PowerPoint PPT Presentation

Oct 06, 2023 144 likes •300 views

Tiziana Fanni University of Cagliari A UTOMATIC GENERATION OF DATAFLOW - BASED LOW - POWER E RECONFIGURABLE SYSTEMS O L A B CPS D ESIGN F ROM CONCEPT TO IMPLEMENTATION Cyber Physical Systems CGR approach for high run-time adaptivity Complex

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SLIDE 1

CPS DESIGN FROM CONCEPT TO IMPLEMENTATION

E O L A B Tiziana Fanni University of Cagliari

AUTOMATIC GENERATION OF

DATAFLOW-BASED LOW-POWER RECONFIGURABLE SYSTEMS

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SLIDE 2

Complex systems with different interacting components, that need to adapt their behavioural modality according to functional and non- functional requirements. http://www.cerbero-h2020.eu/

Cyber Physical Systems

CGR approach for high run-time adaptivity

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SLIDE 3

Complex systems with different interacting components, that need to adapt their behavioural modality according to functional and non- functional requirements. Adopting Corse Grain Reconfigurable Approach to achieve high run-time adaptivity. http://www.cerbero-h2020.eu/

Cyber Physical Systems

CGR approach for high run-time adaptivity

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SLIDE 4

MULTI DATAFLOW COMPOSER TOOL

Coarse-Graine Reconfiguration Power Manager Multi Dataflow Composer Tool Structural Profiler

MDC design suite http://sites.unica.it/rpct/

Co-Processor Generator

3/19

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SLIDE 5

MULTI DATAFLOW COMPOSER TOOL

Coarse-Graine Reconfiguration

Dataflow Specifications

α.xdf β.xdf γ.xdf

Power Manager Multi Dataflow Composer Tool Structural Profiler

MDC design suite http://sites.unica.it/rpct/

Co-Processor Generator

3/19

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SLIDE 6

MULTI DATAFLOW COMPOSER TOOL

Coarse-Graine Reconfiguration

Dataflow Specifications

α.xdf β.xdf γ.xdf A

in1

D

in2

F

in3

E G B

SB1 SB2

  • ut1

C

SB0

LUT

Coarse Grained Reconfigurable Platform α β γ

N:1

ID net

Power Manager Multi Dataflow Composer Tool Structural Profiler

MDC design suite http://sites.unica.it/rpct/

Co-Processor Generator

3/19

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SLIDE 7

MULTI DATAFLOW COMPOSER TOOL

Additional features Power Manager Multi Dataflow Composer Tool Structural Profiler Co-Processor Generator

MDC design suite http://sites.unica.it/rpct/

4/19

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SLIDE 8

MULTI DATAFLOW COMPOSER TOOL

Additional features Power Manager Multi Dataflow Composer Tool Structural Profiler Co-Processor Generator

Structural Profiler:

low-level feedback (from synthesis) and DSE for topology optimization.

  • (ASIC + FPGA)

Co-Processor Generator:

generation of ready-to-use Xilinx Ips

  • (FPGA)

Power Manager:

automatic application of clock-gating and/or power-gating.

  • CG (ASIC + FPGA)
  • PG(ASIC)

MDC design suite http://sites.unica.it/rpct/

4/19

slide-9
SLIDE 9

MULTI DATAFLOW COMPOSER TOOL

Additional features Power Manager Multi Dataflow Composer Tool Structural Profiler Co-Processor Generator

Structural Profiler:

low-level feedback (from synthesis) and DSE for topology optimization.

  • (ASIC + FPGA)

Co-Processor Generator:

generation of ready-to-use Xilinx Ips

  • (FPGA)

Power Manager:

automatic application of clock-gating and/or power-gating.

  • CG (ASIC + FPGA)
  • PG(ASIC)

MDC design suite http://sites.unica.it/rpct/

4/19

slide-10
SLIDE 10

MULTI DATAFLOW COMPOSER TOOL

Power Management

A

in1

D

in2

F

in3

E G B

SB1 SB2

  • ut1

C

SB0

LUT

Coarse Grained Reconfigurable Platform α β γ

ID net

Power Manager Multi Dataflow Composer Tool Structural Profiler

MDC design suite http://sites.unica.it/rpct/

Co-Processor Generator

Power Manager:

automatic application of clock-gating and/or power-gating.

  • CG (ASIC + FPGA)
  • PG (ASIC)

5/19

slide-11
SLIDE 11

MULTI DATAFLOW COMPOSER TOOL

Power Management

A

in1

D

in2

F

in3

E G B

SB1 SB2

  • ut1

C

SB0

LUT

Coarse Grained Reconfigurable Platform α β γ

ID net

Power Manager Multi Dataflow Composer Tool Structural Profiler

MDC design suite http://sites.unica.it/rpct/

Co-Processor Generator

Power Manager:

automatic application of clock-gating and/or power-gating.

  • CG (ASIC + FPGA)
  • PG (ASIC)

α

5/19

slide-12
SLIDE 12

MULTI DATAFLOW COMPOSER TOOL

Power Management

A

in1

D

in2

F

in3

E G B

SB1 SB2

  • ut1

C

SB0

LUT

Coarse Grained Reconfigurable Platform α β γ

ID net

Power Manager Multi Dataflow Composer Tool Structural Profiler

MDC design suite http://sites.unica.it/rpct/

Co-Processor Generator

Power Manager:

automatic application of clock-gating and/or power-gating.

  • CG (ASIC + FPGA)
  • PG (ASIC)

α β

5/19

slide-13
SLIDE 13

MULTI DATAFLOW COMPOSER TOOL

Power Management

A

in1

D

in2

F

in3

E G B

SB1 SB2

  • ut1

C

SB0

LUT

Coarse Grained Reconfigurable Platform α β γ

ID net

Power Manager Multi Dataflow Composer Tool Structural Profiler

MDC design suite http://sites.unica.it/rpct/

Co-Processor Generator

Power Manager:

automatic application of clock-gating and/or power-gating.

  • CG (ASIC + FPGA)
  • PG (ASIC)

α β γ

5/19

slide-14
SLIDE 14

MULTI DATAFLOW COMPOSER TOOL

Power Management

A

in1

D

in2

F

in3

E G B

SB1 SB2

  • ut1

C

SB0

LUT

Coarse Grained Reconfigurable Platform α β γ

ID net

Power Manager Multi Dataflow Composer Tool Structural Profiler

MDC design suite http://sites.unica.it/rpct/

Co-Processor Generator

Power Manager:

automatic application of clock-gating and/or power-gating.

  • CG (ASIC + FPGA)
  • PG (ASIC)

α β γ

LR4 LR3 LR4

α γ

LR1

α γ

LR5

γ β

LR2

α γ β

5/19

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SLIDE 15

Acknowledgements

The CERBERO project has received funding from the EU Commission’s H2020 Programme under grant agreement No 732105.