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A Tail-feedback VCO with Self-Adjusting Current Modulation Scheme
Aravind Tharayil Narayanan, Wei Deng, Kenichi Okada, and Akira Matsuzawa
Matsuzawa & Okada Lab.
b.
y
Matsuzawa & Okada Lab.
b.
y
A Tail-feedback VCO with Self-Adjusting Current Modulation Scheme - - PowerPoint PPT Presentation
A Tail-feedback VCO with Self-Adjusting Current Modulation Scheme - - PowerPoint PPT Presentation
A Tail-feedback VCO with Self-Adjusting Current Modulation Scheme Aravind Tharayil Narayanan, Wei Deng, Kenichi Okada, and Akira Matsuzawa Tokyo Institute of Technology, Japan b. b. Matsuzawa Matsuzawa & Okada Lab. & Okada Lab. y
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Motivation
9.1mW 32.5mW 76.1% 21.9% VCO Others [1] L. Vercesi, JSSC 2012.
Aim:
§ Low-power § High-purity § Long lifetime
Ø Low-power VCO needed for longer battery-life VCO
PD ref LPF N
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High Efficiency VCOs
Class-C Class-D Class-F High current efficiency High voltage efficiency
VP VN VDD M1 M2 M3 CTail VTail Vgbias VP VN VDD LDO M1 M2 M1 M2 VP VN KM VDD VDD M3 CTail VTail
[2] P. Andreani, JSSC 2008. [3] L. Fanori, JSSC 2013. [4] M. Babaie, JSSC 2013.
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ηI × ηV
High Efficiency VCOs – Contd.
u ENF = FoMMAX – FoM
[5] M. Garampazzi, ESSCIRC 2014.
Excess Noise Factor5 (ENF)
FoMMAX : Only depends on Q ENF : Only depends on topology
u ENF ∝ 1 ηI : Current efficiecny
✓ High ηI :
§ Good candidate for practical high efficiency VCO
✗ High ηV :
§ Loading effects § Reliability issues. ηV : Voltage efficiecny
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VTune IM1 IM2 VP VN VDD M1 M2 M3 ITail CTail VTail Vgbias
t t
VP VN VDD VG,M2 VG,M1
ϖ
2ϖ 3ϖ 4ϖ
IM1 IM2 Iω0 ≈ IBias VTH
Class-C VCO
Ø Impulse-shaped current for high efficiency
[2] A. Mazzanti and P. Andreani, JSSC 2008.
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VTune VP VN VDD M1 M2 M3 M4
t t
VP VN VDD VG,M3 VG,M4
ϖ
2ϖ 3ϖ 4ϖ
IM1 IM2 Iω0 ≈ IBias Cfb VTail Cfb VTail IM1 IM2 VTH VTail Φ
Tail-Feedback VCO
Ø High efficiency can be achieved if 𝚾 is small.
[6] A. Musa, IEICE 2013.
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Startup Issue
Ø Large oscillation amplitude for better phase noise
90 60 30 1 2 3 4 5 Conduction Angle (degrees) Phase Noise Improvment (dB)
t t
VTH VTail VDD VDS IDS VT,eff
- ϖ
ϖ
Iω0 ≈ IBias
Ø VCO fails to startup at low tail-bias voltage.
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Proposed VCO
VDD VBias VTune IB1 IB2 M1 M2 M3 Bias Circuit VP Vb IM1 VN M4 M6 M5 Cb Cb Rb Rb IM2 VDD VDD Cfb Cfb
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Self-Adjusting Tail-Current Modulation
Ø Ensures robust startup
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Self-Adjusting Tail-Current Modulation
Ø Optimizes ‘𝚾’ for better phase noise
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Contents
u Motivation u High Efficiency VCOs u Reliable Power-Efficient Solutions u Startup issue in Tail-Feedback VCO u Proposed VCO u Tail-Bias Vs Class-C u Measurement Results u Conclusion
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!!"# = !!! − (!!" − !!") !
Efficiency and MOS Sizing in Class-C
[2] A. Mazzanti and P. Andreani, JSSC 2008.
Ø Large MOS required for better efficiency (class-C)
VDS VDD VTH IDS1 Imax1 Imax2 IDS2 ϖ
- ϖ
ϖ
- ϖ
2 2
−Φ2 −Φ2
VGS Small MOS Large MOS
−Φ1 Φ1
- 0.3
0.0 0.3 0.6
- 115
- 110
- 105
- 100
Phase Noise [dBc/Hz] Vgbias[V]
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Fixed Tail Bias
ϖ
2ϖ 3ϖ 4ϖ VTail IDS Noise iN iDS+iN VTH VTail ISF
Tail Noise Factor: Fixed Tail Bias
Ø Continuous Tail-Noise Up-Conversion in Class-C
[7] S.L.J. Geirkink, JSSC 1999.
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Tail Noise Factor: Modulated Tail Bias
Modulated Tail Bias
ϖ
2ϖ 3ϖ 4ϖ Vmod VTail
VT,eff =(VTail+Vmod)
IDS Noise iN iDS+iN VTH VT,eff ISF VTail
Ø Reduced Tail-Noise Up-Conversion
[7] S.L.J. Geirkink, JSSC 1999.
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In Brief
Tail-feedback VCO compared to class-C VCO
Ø Better tuning range. Ø Similar if not better noise performance. Ø Start-up issue is solvable.
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Contents
u Motivation u High Efficiency VCOs u Reliable Power-Efficient Solutions u Startup issue in Tail-Feedback VCO u Proposed VCO u Tail-Bias Vs Class-C u Measurement Results u Conclusion
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Measurement
Technology 180nm CMOS FOSC 4.6GHz PN@1MHz
- 119dBc/Hz
Power 6.8mW FoM
- 184dBc/Hz
245𝛎M 530𝛎M
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Measurement
1K
- 140
- 120
- 100
- 80
- 60
- 20
- 40
10K 100K Offset Frequency (Hz) Phase noise (dBc/Hz) 1M 10M
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Conclusion
u VCO topologies for high-efficiency is briefly analyzed. u Current-efficient topology is identified as a viable candidate for practical design. u Tail-feedback VCO is capable of achieving similar if not better performance compared to class-C VCO. u The start-up issues present in tail-feedback VCO is briefly discussed. u A bias mechanism is presented for solving startup issues. u A VCO is implemented in 180nm CMOS process incorporating the proposed bias scheme.
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APPENDIX
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Analysis: Class-C VCO
Cgs,m1 Cgd,m1 Cgd,m3 Cgs,m3 CT L C C L VTail VDD M1 M3 M3 Cdc C L Cgd,m3 Cgs,m1 Cgs,m3 Cgd,m1 VP VDD C L VP
Conventioanl Class-C equivalent circuit
CT
Ø CGS has prominent effect on tank impedance
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VDD M1 M3 Cfb C L VTail VP VDD C L Cgd,m3 Cgs,m1 Cgs,m3 Cgd,m1
Tail bias equivalent circuit
Cgs,m1 Cgd,m3 Cgs,m3 Cfb Cgd,m1 L C C L VP