A c c e l e r a t e y o u r d e v e l o p m e n t Real Embedded - PowerPoint PPT Presentation

A c c e l e r a t e y o u r d e v e l o p m e n t

• Real Embedded company; 150 employees – 120+ embedded software developers – 20+ FPGA designers – 10+ board designers • Founded in 1996, privately owned • Dutch based company, with offices in Best and Delft • 3 Business unit: – Consultancy: the Netherlands – Project execution: Europe and North America – Product development and sales: World Wide • Xilinx Premier Alliance partner 2

Rieny Rijnen Founder & CEO October 8th, 2015

• Closer integration of processing platforms 5000 5000 8.2 TeraMACs – System-on-Chip (Zynq, MPSoC) (~1.5 TFlops) – Processor technologies cannot keep-up with Moore’s FPGAs FPGA law; FPGA technologies can 500 performance 500 (Kintex Ultrascale)  FPGA integration in PC (PCI-e, Ethernet) CPU • Hardly any solution without processor system 72 GigaFlops performance CPUs (quad core i7) – System-level approach needed for FPGA design 50 50 – System-level architectures are mostly software driven =>Software- and hardware-world have to fully integrate 5 5 1997 1999 2001 2002 2004 2005 2006 2009 2011 2012 2014

• Fixed functionality – Functionality loaded at power-up – Every functions is always pre-loaded • Fast parallel execution – Massive processing power – High data throughput – Optimized pipe-line infrastructure • Implementation of FPGA functionality – Place & route very time consuming – One letter change in code means complete recalculation – Timing closure gets tougher while filling the FPGA • No default infrastructure in place

• Operating system • Dynamic task management/treading • Memory management • Process synchronization • Queueing • High level programming language • One code base • Short compile time

• Use PR to create and manage multiple PR regions in FPGA – Enables “software-like” dynamic task switching – Shorter compile times • Use HLS – High-level programming languages like C and C++ and OpenCL; “Spill a gate and win a week” – One code base for multiple processing platforms

• Reduce BOM cost due to smaller FPGA • Smaller footprint; less complex board • System remains operational while functionality changes • Ability to check underlying hardware by swapping function-block with test-block and visa versa

• Additional effort required for creating “real” OS like behavior: – Predefined infrastructure around PR blocks including connection to CPU system – Queueing on FPGA for data synchronization – Event handling for process synchronization – Memory management for data sharing

• Keep your PR block within a clock region • Keep the number of interconnects with PR low • Play around with numbers, sizes and locations of PR’s • Make PR reproducible; create a fixed framework • Decouple clock domains by using FIFO’s between your PR blocks and infrastructure • Have a fast backplane for data exchange => this helps you to get a good PR design

Application SW Node interface (file) SW Node interface (file) SW Node interface (file) SW Node interface (file) SW Node interface (file) SW Node interface (file) SW Node SW Node HW Node (process) DYPLOLINK (process) (proxy)

DYPLO CONNECT DYPLOLINK AXI, PCIe, Ethernet, … DYPLO BACKPLANE (3 – 100Gbit/sec, e.g. 1xHDMI ~ 5Gbit/sec) DYPLO I/O NODE DYPLO RECONFIGURABLE -AXI stream inputs (3- -AXI stream inputs (3-6 Gbit/sec) -AXI stream inputs (3-6 Gbit/sec) DYPLO FIXED NODE 6Gbit/sec/stream) --AXI NODE -AXI stream outputs (3-6 Gbit/sec) -AXI stream outputs (3-6 Gbit/sec) -AXI stream inputs (3-6 Gbit/sec) -AXI stream inputs (3-6 Gbit/sec) stream outputs (3- - 64Kx32bit memory mapped - 64Kx32bit memory mapped -AXI stream inputs (3-6 Gbit/sec) -AXI stream outputs (3-6 Gbit/sec) -AXI stream outputs (3-6 Gbit/sec) 6Gbit/sec/stream) -AXI stream inputs (3-6 Gbit/sec) memory space memory space -AXI stream outputs (3-6 Gbit/sec) -AXI stream outputs (3-6 Gbit/sec) - 64Kx32bit memory mapped - 64Kx32bit memory mapped memory space memory space

Eindhovenseweg 32-C, 5683 KH BEST, The Netherlands P.O. Box 440, 5680 AK BEST, The Netherlands Phone: +31 499 336969 | Fax: +31 499 336970 www.TopicProducts.com | info@TopicProducts.com