30000BC Palaeolithic peoples in central Europe and France record - - PowerPoint PPT Presentation

• 30000BC

Palaeolithic peoples in central Europe and France record numbers

• n bones.
• 5000BC

A decimal number system is in use in Egypt.

• 4000BC

Babylonian and Egyptian calendars in use.

• 3400BC

The first symbols for numbers, simple straight lines, are used in Egypt.

• 3000BC

The abacus is developed in the Middle East and in areas around the Mediterranean. A somewhat different type of abacus is used in China.

• 3000BC

Hieroglyphic numerals in use in Egypt.

• 3000BC

Babylonians begin to use a sexagesimal number system for recording financial transactions. It is a place-value system without a zero place value.

• 2000BC

Harappans adopt a uniform decimal system of weights and measures.

• 1950BC

Babylonians solve quadratic equations.

• 1900BC

The Moscow papyrus is written. It gives details of Egyptian geometry.

• 1850BC

Babylonians know Pythagoras's Theorem.

• 1800BC

Babylonians use multiplication tables.

• 1750BC

The Babylonians solve linear and quadratic algebraic equations, compile tables of square and cube roots. They use Pythagoras's theorem and use mathematics to extend knowledge of astronomy.

• 1700BC

The Rhind papyrus (sometimes called the Ahmes papyrus) is written. It shows that Egyptian mathematics has developed many techniques to solve problems. Multiplication is based on repeated doubling, and division uses successive halving.

• 1360BC

A decimal number system with no zero starts to be used in China.

• 1000BC

Chinese use counting boards for calculation.

• 540BC

Counting rods used in China.

• 500BC

The Babylonian sexagesimal number system is used to record and predict the positions of the Sun, Moon and planets.

Egyptian Numerals

Egyptian number system is additive.

Mesopotamia Civilization

Above: Babylonian sexagesimal (base 60) number. It is the first positional number system. Left: Oldest cuneiform writing by Sumerian.

Babylonian numerals

4359

Chinese numerals

Indian numerals

Greek number systems

Roman Numerals

I 1 II 2 III 3 IV 4 V 5 VI 6 VII 7 VIII 8 IX 9 X 10 L 50 C 100 D 500 M 1000

MMMDCCCLXXVIII 3878

Mayan mathematics

[8;14;3;1;12] represents 12 + 1 x 20 + 3 x 18 x 20 + 14 x 18 x 202 + 8 x 18 x 203 = 1253912.

250 AD to 900 AD, this period was built on top of a civilization which had lived in the region from about 2000 BC.

The numerals from al-Sizji's treatise of 969

Abaci

Boethius (Hindu-Arabic) vs Pythagoras (counting board)

Chinese Abacus

Logarithm and Slide Rule

If ay=x, then y = logax log (u v) = log (u) + log(v) John Napier of Scotland developed the concept of logarithm around AD 1600. Slide rule based

• n the property of

logarithm was invented in the late 1700s.

Decimal Numbers: Base 10

Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 Example: 3271 = (3x103) + (2x102) + (7x101) + (1x100)

Numbers: positional notation

• Number Base B ⇒ B symbols per digit:

– Base 10 (Decimal): 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 Base 2 (Binary): 0, 1

• Number representation:

– d31d30 ... d1d0 is a 32 digit number – value = d31 × × × × B31 + d30 × × × × B30 + ... + d1 × × × × B1 + d0 × × × × B0

• Binary:

0,1 (In binary digits called “bits”)

– 0b11010 = 1× × × ×24 + 1× × × ×23 + 0× × × ×22 + 1× × × ×21 + 0× × × ×20 = 16 + 8 + 2 = 26 – Here 5 digit binary # turns into a 2 digit decimal # – Can we find a base that converts to binary easily?

#s often written 0b…

Hexadecimal Numbers: Base 16

• Hexadecimal:

0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F

– Normal digits + 6 more from the alphabet – In C, written as 0x… (e.g., 0xFAB5)

• Conversion: Binary⇔Hex

– 1 hex digit represents 16 decimal values – 4 binary digits represent 16 decimal values ⇒1 hex digit replaces 4 binary digits

• One hex digit is a “nibble”. Two is a “byte”
• Example:

– 1010 1100 0011 (binary) = 0x_____ ?

Decimal vs. Hexadecimal vs. Binary

Examples: 1010 1100 0011 (binary) = 0xAC3 10111 (binary) = 0001 0111 (binary) = 0x17 0x3F9 = 11 1111 1001 (binary)

How do we convert between hex and Decimal? 00 0 0000 01 1 0001 02 2 0010 03 3 0011 04 4 0100 05 5 0101 06 6 0110 07 7 0111 08 8 1000 09 9 1001 10 A 1010 11 B 1011 12 C 1100 13 D 1101 14 E 1110 15 F 1111

Examples: 1010 1100 0011 (binary) = 0xAC3 10111 (binary) = 0001 0111 (binary) = 0x17 0x3F9 = 11 1111 1001 (binary)

How do we convert between hex and Decimal?

What to do with representations of numbers?

• Just what we do with numbers!

– Add them – Subtract them – Multiply them – Divide them – Compare them

• Example: 10 + 7 = 17

– …so simple to add in binary that we can build circuits to do it! – subtraction just as you would in decimal – Comparison: How do you tell if X > Y ?

1 0 1 0 + 0 1 1 1

• 1 0 0 0 1

1 1

Which base do we use?

• Decimal: great for humans, especially when doing

arithmetic

• Hex: if human looking at long strings of binary

numbers, its much easier to convert to hex and look 4 bits/symbol

– Terrible for arithmetic on paper

• Binary: what computers use;

you will learn how computers do +, -, *, /

– To a computer, numbers always binary – Regardless of how number is written: 32ten == 3210 == 0x20 == 1000002 == 0b100000 – Use subscripts “ten”, “hex”, “two” in book, slides when might be confusing

BIG IDEA: Bits can represent anything!!

• Characters?

– 26 letters ⇒ 5 bits (25 = 32) – upper/lower case + punctuation ⇒ 7 bits (in 8) (“ASCII”) – standard code to cover all the world’s languages ⇒ 8,16,32 bits (“Unicode”) www.unicode.com

• Logical values?

– 0 ⇒ False, 1 ⇒ True

• colors ? Ex:
• locations / addresses? commands?
• MEMORIZE: N bits ⇔

⇔ ⇔ ⇔ at most 2N things Red (00) Green (01) Blue (11)

How to Represent Negative Numbers?

• So far, unsigned numbers
• Obvious solution: define leftmost bit to be sign!

– 0 ⇒ +, 1 ⇒ - – Rest of bits can be numerical value of number

• Representation called sign and magnitude
• MIPS uses 32-bit integers. +1ten would be:

0000 0000 0000 0000 0000 0000 0000 0001

• And –1ten in sign and magnitude would be:

1000 0000 0000 0000 0000 0000 0000 0001

Shortcomings of sign and magnitude?

• Arithmetic circuit complicated

– Special steps depending whether signs are the same or not

• Also, two zeros

– 0x00000000 = +0ten – 0x80000000 = -0ten – What would two 0s mean for programming?

• Therefore sign and magnitude abandoned

Another try: complement the bits

• Example:

710 = 001112

• 710 = 110002
• Called One’s Complement
• Note: positive numbers have leading 0s, negative

numbers have leadings 1s.

00000 00001 01111 ... 11111 11110 10000 ...

• What is -00000 ? Answer: 11111
• How many positive numbers in N bits?
• How many negative ones?

Shortcomings of One’s complement?

• Arithmetic still a somewhat complicated.
• Still two zeros

– 0x00000000 = +0ten – 0xFFFFFFFF = -0ten

• Although used for awhile on some computer products,
• ne’s complement was eventually abandoned because

another solution was better.

Standard Negative Number Representation

• What is result for unsigned numbers if tried to subtract

large number from a small one?

– Would try to borrow from string of leading 0s, so result would have a string of leading 1s » 3 - 4 ⇒ 00…0011 - 00…0100 = 11…1111 – With no obvious better alternative, pick representation that made the hardware simple – As with sign and magnitude, leading 0s ⇒ positive, leading 1s ⇒ negative » 000000...xxx is ≥ 0, 111111...xxx is < 0 » except 1…1111 is -1, not -0 (as in sign & mag.)

• This representation is Two’s Complement

Sign and Magnitude

0000 0111 0011 1011 1111 1110 1101 1100 1010 1001 1000 0110 0101 0100 0010 0001

+0 +1 +2 +3 +4 +5 +6 +7

• 1
• 2
• 3
• 4
• 5
• 6
• 7

0 100 = + 4 1 100 = - 4 +

• High order bit is sign: 0 = positive (or zero), 1 = negative

Remaining low order bits is the magnitude: 0 (000) thru 7 (111) Number range for n bits = +/- 2n-1 - 1 Representations for 0? Operations: =, <, >, +, - ???

Example: N = 4

Ones Complement (algebraically)

N is positive number, then N is its negative 1's complement N = (2n

• 1) - N

Example: 1's complement of 7 2 = 10000

• 1 = 00001

1111

• 7 = 0111

1000

• 7 in 1's comp.

Bit manipulation: simply complement each of the bits 0111 -> 1000 4

Ones Complement on the number wheel

Subtraction implemented by addition & 1's complement Sign is easy to determine Closure under negation. If A can be represented, so can -A Still two representations of 0! If A = B then is A – B == 0 ? Addition is almost clockwise advance, like unsigned

0000 0111 0011 1011 1111 1110 1101 1100 1010 1001 1000 0110 0101 0100 0010 0001

+0 +1 +2 +3 +4 +5 +6 +7

• 7
• 6
• 5
• 4
• 3
• 2
• 1

0 100 = + 4 1 011 = - 4 +

Twos Complement number wheel

0000 0111 0011 1011 1111 1110 1101 1100 1010 1001 1000 0110 0101 0100 0010 0001

+0 +1 +2 +3 +4 +5 +6 +7

• 8
• 7
• 6
• 5
• 4
• 3
• 2
• 1

0 100 = + 4 1 100 = - 4 +

• Easy to determine sign (0?)

Only one representation for 0 Addition and subtraction just as in unsigned case Simple comparison: A < B iff A – B < 0 One more negative number than positive number

• one number has no additive inverse

like 1's comp except shifted

• ne position

clockwise

Twos Complement (algebraically)

N* = 2n - N

Example: Twos complement of 7 2 = 10000 7 = 0111 1001 = repr. of -7 Example: Twos complement of -7 4 2 = 10000

• 7 = 1001

0111 = repr. of 7 4 sub sub

Bit manipulation:

Twos complement: take bitwise complement and add one 0111 -> 1000 + 1 -> 1001 (representation of -7) 1001 -> 0110 + 1 -> 0111 (representation of 7)

How is addition performed in each number system?

• Operands may be positive or negative

Sign Magnitude Addition

4 + 3 7 0100 0011 0111

• 4

+ (-3)

• 7

1100 1011 1111 result sign bit is the same as the operands' sign 4

• 3

1 0100 1011 0001

• 4

+ 3

• 1

1100 0011 1001 Operand have same sign: unsigned addition of magnitudes Operands have different signs: subtract smaller from larger and keep sign of the larger

Ones complement addition

4 + 3 7 0100 0011 0111

• 4

+ (-3)

• 7

1011 1100 10111 1 1000 4

• 3

1 0100 1100 10000 1 0001

• 4

+ 3

• 1

1011 0011 1110 End around carry End around carry Perform unsigned addition, then add in the end-around carry

When carry occurs

0000 0111 0011 1011 1111 1110 1101 1100 1010 1001 1000 0110 0101 0100 0010 0001

+0 +1 +2 +3 +4 +5 +6 +7

• 7
• 6
• 5
• 4
• 3
• 2
• 1

0 100 = + 4 1 011 = - 4 +

• M – N where M > N
• M - N

Why does end-around carry work?

End-around carry work is equivalent to subtracting 2n and adding 1 M - N = M + N = M + (2 - 1 - N) = (M - N) + 2 - 1 n n (when M > N)

• M + (-N) = M + N = (2 - M - 1) + (2 - N - 1)

= 2 + [2 - 1 - (M + N)] - 1 n n n n M + N < 2 n-1 after end around carry: = 2 - 1 - (M + N) n this is the correct form for representing -(M + N) in 1's comp! N = (2n

• 1) - N

Recall:

Twos Complement Addition

4 + 3 7 0100 0011 0111

• 4

+ (-3)

• 7

1100 1101 11001 4

• 3

1 0100 1101 10001

• 4

+ 3

• 1

1100 0011 1111 Simpler addition scheme makes twos complement the most common choice for integer number systems within digital systems Perform unsigned addition and Discard the carry out. Overflow?

Twos Complement number wheel

0000 0111 0011 1011 1111 1110 1101 1100 1010 1001 1000 0110 0101 0100 0010 0001

+0 +1 +2 +3 +4 +5 +6 +7

• 8
• 7
• 6
• 5
• 4
• 3
• 2
• 1

0 100 = + 4 1 100 = - 4 +

• M + -N where N + M ≤ 2n-1
• M + N when N > M

2s Comp: ignore the carry out

• M + N when N > M:

M* + N = (2 - M) + N = 2 + (N - M) n n Ignoring carry-out is just like subtracting 2n

• M + -N where N + M ≤ 2n-1
• M + (-N) = M* + N* = (2 - M) + (2 - N)

= 2 - (M + N) + 2 n n After ignoring the carry, this is just the right twos compl. representation for -(M + N)! n n

2s Complement Overflow

Add two positive numbers to get a negative number

• r two negative numbers to get a positive number

5 + 3 = -8!

• 7 - 2 = +7!

0000 0001 0010 0011 1000 0101 0110 0100 1001 1010 1011 1100 1101 0111 1110 1111

+0 +1 +2 +3 +4 +5 +6 +7

• 8
• 7
• 6
• 5
• 4
• 3
• 2
• 1

0000 0001 0010 0011 1000 0101 0110 0100 1001 1010 1011 1100 1101 0111 1110 1111

+0 +1 +2 +3 +4 +5 +6 +7

• 8
• 7
• 6
• 5
• 4
• 3
• 2
• 1

How can you tell an overflow occurred?

2s comp. Overflow Detection

5 3

• 8

0 1 1 1 0 1 0 1 0 0 1 1 1 0 0 0

• 7
• 2

7 1 0 0 0 1 0 0 1 1 1 0 0 1 0 1 1 1 5 2 7 0 0 0 0 0 1 0 1 0 0 1 0 0 1 1 1

• 3
• 5
• 8

1 1 1 1 1 1 0 1 1 0 1 1 1 1 0 0 0 Overflow Overflow No overflow No overflow

Overflow occurs when carry in to sign does not equal carry out

Two’s Complement for N=32

0000 ... 0000 0000 0000 0000two = 0ten 0000 ... 0000 0000 0000 0001two = 1ten 0000 ... 0000 0000 0000 0010two = 2ten . . . 0111 ... 1111 1111 1111 1101two = 2,147,483,645ten 0111 ... 1111 1111 1111 1110two = 2,147,483,646ten 0111 ... 1111 1111 1111 1111two = 2,147,483,647ten 1000 ... 0000 0000 0000 0000two = –2,147,483,648ten 1000 ... 0000 0000 0000 0001two = –2,147,483,647ten 1000 ... 0000 0000 0000 0010two = –2,147,483,646ten . . . 1111 ... 1111 1111 1111 1101two = –3ten 1111 ... 1111 1111 1111 1110two = –2ten 1111 ... 1111 1111 1111 1111two = –1ten

• One zero; 1st bit called sign bit
• 1 “extra” negative:no positive 2,147,483,648ten

Two’s Complement Formula

• Can represent positive and negative numbers in terms of

the bit value times a power of 2:

d31 x -(231) + d30 x 230 + ... + d2 x 22 + d1 x 21 + d0 x 20

• Example: 1101two

= 1x-(23) + 1x22 + 0x21 + 1x20 = -23 + 22 + 0 + 20 = -8 + 4 + 0 + 1 = -8 + 5 = -3ten

Two’s Complement shortcut: Negation

• Change every 0 to 1 and 1 to 0 (invert or complement),

then add 1 to the result

• Proof: Sum of number and its (one’s) complement must

be 111...111two

However, 111...111two= -1ten Let x’ ⇒ one’s complement representation of x Then x + x’ = -1 ⇒ x + x’ + 1 = 0 ⇒ x’ + 1 = -x

• Example: -3 to +3 to -3
• x : 1111 1111 1111 1111 1111 1111 1111 1101two
• x’: 0000 0000 0000 0000 0000 0000 0000 0010two
• +1: 0000 0000 0000 0000 0000 0000 0000 0011two
• ()’: 1111 1111 1111 1111 1111 1111 1111 1100two
• +1: 1111 1111 1111 1111 1111 1111 1111 1101two

You should be able to do this in your head…

Two’s comp. shortcut: Sign extension

• Convert 2’s complement number rep. using n bits to

more than n bits

• Simply replicate the most significant bit (sign bit) of

smaller to fill new bits

–2’s comp. positive number has infinite 0s –2’s comp. negative number has infinite 1s –Binary representation hides leading bits; sign extension restores some of them –16-bit -4ten to 32-bit:

1111 1111 1111 1100two 1111 1111 1111 1111 1111 1111 1111 1100two

What if too big?

• Binary bit patterns above are simply representatives of numbers.

Strictly speaking they are called “numerals”.

• Numbers really have an ∞

∞ ∞ ∞ number of digits

– with almost all being same (00…0 or 11…1) except for a few of the rightmost digits – Just don’t normally show leading digits

• If result of add (or -, *, / ) cannot be represented by these

rightmost HW bits, overflow is said to have occurred.

00000 00001 00010 11111 11110 unsigned

Kilo, Mega, Giga, Tera, Peta, Exa, Zetta, Yotta

• Confusing! Common usage of “kilobyte” means

1024 bytes, but the “correct” SI value is 1000 bytes

• Hard Disk manufacturers & Telecommunications are the only

computing groups that use SI factors, so what is advertised as a 30 GB drive will actually only hold about 28 x 230 bytes, and a 1 Mbit/s connection transfers 106 bps.

1024 = 1,000,000,000,000,000,000,000,000 280 = 1,208,925,819,614,629,174,706,176 Y Yotta 1021 = 1,000,000,000,000,000,000,000 270 = 1,180,591,620,717,411,303,424 Z Zetta 1018 = 1,000,000,000,000,000,000 260 = 1,152,921,504,606,846,976 E Exa 1015 = 1,000,000,000,000,000 250 = 1,125,899,906,842,624 P Peta 1012 = 1,000,000,000,000 240 = 1,099,511,627,776 T Tera 109 = 1,000,000,000 230 = 1,073,741,824 G Giga 106 = 1,000,000 220 = 1,048,576 M Mega 103 = 1,000 210 = 1,024 K Kilo

SI size Factor Abbr Name

physics.nist.gov/cuu/Units/binary.html

kibi, mebi, gibi, tebi, pebi, exbi, zebi, yobi

• International Electrotechnical Commission (IEC) in 1999 introduced

these to specify binary quantities.

– Names come from shortened versions of the original SI prefixes (same pronunciation) and bi is short for “binary”, but pronounced “bee” :-( – Now SI prefixes only have their base-10 meaning and never have a base-2 meaning.

280 = 1,208,925,819,614,629,174,706,176 270 = 1,180,591,620,717,411,303,424 260 = 1,152,921,504,606,846,976 250 = 1,125,899,906,842,624 240 = 1,099,511,627,776 230 = 1,073,741,824 220 = 1,048,576 210 = 1,024

Factor

Yi yobi Zi zebi Ei exbi Pi pebi Ti tebi Gi gibi Mi mebi Ki kibi

Abbr Name

en.wikipedia.org/wiki/Binary_prefix

• What is 234? How many bits addresses (I.e., what’s

ceil log2 = lg of) 2.5 TiB?

• Answer! 2XY means…

X=0 ⇒ --- X=1 ⇒ kibi ~103 X=2 ⇒ mebi ~106 X=3 ⇒ gibi ~109 X=4 ⇒ tebi ~1012 X=5 ⇒ tebi ~1015 X=6 ⇒ exbi ~1018 X=7 ⇒ zebi ~1021 X=8 ⇒ yobi ~1024

The way to remember #s

Y=0 ⇒ 1 Y=1 ⇒ 2 Y=2 ⇒ 4 Y=3 ⇒ 8 Y=4 ⇒ 16 Y=5 ⇒ 32 Y=6 ⇒ 64 Y=7 ⇒ 128 Y=8 ⇒ 256 Y=9 ⇒ 512

MEMORIZE!

Comparing the signed number systems

• Here are all the 4-bit numbers

in the different systems.

• Positive numbers are the

same in all three representations.

• Signed magnitude and one’s

complement have two ways

• f representing 0. This makes

things more complicated.

• Two’s complement has

asymmetric ranges; there is

• ne more negative number

than positive number. Here, you can represent -8 but not +8.

• However, two’s complement

is preferred because it has

• nly one 0, and its addition

algorithm is the simplest.

Decimal S.M. 1’s comp. 2’s comp.

7 0111 0111 0111 6 0110 0110 0110 5 0101 0101 0101 4 0100 0100 0100 3 0011 0011 0011 2 0010 0010 0010 1 0001 0001 0001 0000 0000 0000

1000 1111 —

• 1

1001 1110 1111

• 2

1010 1101 1110

• 3

1011 1100 1101

• 4

1100 1011 1100

• 5

1101 1010 1011

• 6

1110 1001 1010

• 7

1111 1000 1001

• 8

— — 1000

And in Conclusion...

• We represent “things” in computers as particular bit patterns: N

bits ⇒ 2N

• Decimal for human calculations, binary for computers, hex to

write binary more easily

• 1’s complement - mostly abandoned
• 2’s complement universal in computing: cannot avoid, so learn
• Overflow: numbers ∞

∞ ∞ ∞; computers finite, errors!

Numbers represented in memory

• Memory is a place to store

bits

• A word is a fixed number of

bits (eg, 32) at an address

• Addresses are naturally

represented as unsigned numbers in C

101101100110

00000 11111 = 2k - 1 01110

Signed vs. Unsigned Variables

• Java just declares integers int

– Uses two’s complement

• C has declaration int also

– Declares variable as a signed integer – Uses two’s complement

• Also, C declaration unsigned int

– Declares a unsigned integer – Treats 32-bit number as unsigned integer, so most significant bit is part of the number, not a sign bit

Binary Codes for Decimal Digits

There are over 8,000 ways that you can chose 10 elements from the 16 binary numbers of 4 bits. A few are useful: Decimal 8,4,2,1 Excess3 8,4,-2,-1

0000 0011 0000 1 0001 0100 0111 2 0010 0101 0110 3 0011 0110 0101 4 0100 0111 0100 5 0101 1000 1011 6 0110 1001 1010 7 0111 1010 1001 8 1000 1011 1000 9 1001 1100 1111

Binary Coded Decimal (BCD)

Binary Coded Decimal or 8,4,2,1 Code. This code is the simplest, most intuitive binary code for decimal digits and uses the same weights as a binary number, but only encodes the first ten values from 0 to 9. Examples: 1001 is 8 + 1 = 9 0011 is 2 + 1 = 3 0100 is 4 1010 is an illegal code.

Other Decimal Codes

The Excess-3 Code adds binary 0011 to the BCD code.

The BCD (8,4, 2, 1) Code, and the (8,4,-2,-1) Code are examples of weighted codes. Each bit has a "weight" associated with it and you can compute the decimal value by adding the weights where a 1 exists in the code-word. Example: 1111 in (8,4,-2,-1) is 8 + 4 + (-2) + (-1) = 9

Warning: Conversion or Coding?

DO NOT mix up CONVERSION of a decimal number to a binary number with CODING a decimal number with a BINARY CODE. 1310 = 11012 (This is CONVERSION) 13 ⇔ ⇔ ⇔ ⇔ 00010011 (This is CODING)

Binary Addition: Half Adder

Ai 1 1 Bi 1 1 Sum 1 1 Carry 1 Ai Bi 1 1 1 1 Sum = Ai Bi + Ai Bi = Ai + Bi Ai Bi 1 1 1 Carry = Ai Bi

Half-adder Schematic

Carry Sum A

i

B

i

But each bit position may have a carry in…

Full-Adder

A 1 1 1 1 B 1 1 1 1 CI 1 1 1 1 S 1 1 1 1 CO 1 1 1 1 A B CI 1 00 01 11 10 1 1 1 1 A B CI 1 00 01 11 10 1 1 1 1 S CO

S = CI xor A xor B CO = B CI + A CI + A B = CI (A + B) + A B Now we can connect them up to do multiple bits… 0 0 1 1 + 0 0 1 0 0 1 0 1

1

A B S Cin Co

Ripple Carry

+ A3 B3 S3 + A2 B2 S2 + A1 B1 S1 + A0 B0 S0 C1 C2 C3

Full Adder from Half Adders (little aside)

Alternative Implementation: 5 Gates A B + CI (A xor B) = A B + B CI + A CI Standard Approach: 6 Gates A A A B B B CI CI S CO

Half Adder A B Half Adder A + B CI A + B + CI

S S CO CO

CI (A + B) A B S CO

Delay in the Ripple Carry Adder

Critical delay: the propagation of carry from low to high order stages

A A B B CI CO @0 @0 @0 @0 @N @1 @1 @N+1 @N+2

late arriving signal two gate delays to compute CO 4 stage adder final sum and carry

A B C S @2 A

1

B

1

C

1 @2

S

1

@3 A

2

B

2

C

2 @4

S

2

@5 A

3

B

3

C

3 @6

S

3

@7 C

4 @8

1 2 3

Ripple Carry Timing

Critical delay: the propagation of carry from low to high order stages 1111 + 0001 worst case addition T0: Inputs to the adder are valid T2: Stage 0 carry out (C1) T4: Stage 1 carry out (C2) T6: Stage 2 carry out (C3) T8: Stage 3 carry out (C4) 2 delays to compute sum but last carry not ready until 6 delays later

T0 T2 T4 T6 T8 S0, C1 Valid S1, C2 Valid S2, C3 Valid S3, C4 Valid

Adders (cont.)

Ripple Adder Ripple adder is inherently slow because, in general s7 must wait for c7 which must wait for c6 … T α n, Cost α n How do we make it faster, perhaps with more cost?

FA c0 a0 b0 s0 c1 c2 c3 c4 c5 c6 c7 s7 s6

Or use a MUX !!!

Classic approach: Carry Look-Ahead

Carry Select Adder

T = Tripple_adder / 2 + TMUX COST = 1.5 * COSTripple_adder+ (n+1) * COSTMUX

1

c8 FA a4 a5 a6 a7 b7 b6 b5 b4 c0 a0 b0 s0 a1 a2 a3 b3 b2 b1 s1 s2 s3 FA

1

a4 a5 a6 a7 b7 b6 b5 b4

1 1 1 1

s4 s5 s6 s7

Extended Carry Select Adder

• What is the optimal # of blocks and # of bits/block?

– If # blocks too large delay dominated by total mux delay – If # blocks too small delay dominated by adder delay per block

1 1 1 1 1

4-bit Adder 4-bit Adder

1 1 1 1 1

4-bit Adder 4-bit Adder

1 1 1 1 1

4-bit Adder 4-bit Adder 4-bit Adder a3-a0 b3-b0 cin cout a11-a8 b11-b8 a15-a12 b15-b12 b7-b4 a7-a4

bits N

• f

stages N

T α sqrt(N), Cost ≈2*ripple + muxes

Carry Select Adder Performance

• Compare to ripple adder delay:

Ttotal = 2 sqrt(N) TFA – TFA, assuming TFA = TMUX For ripple adder Ttotal = N TFA “cross-over” at N=3, Carry select faster for any value of N>3.

• Is sqrt(N) really the optimum?

– From right to left increase size of each block to better match delays – Ex: 64-bit adder, use block sizes [12 11 10 9 8 7 7]

• How about recursively defined carry select?

1 1 1 1 1

4-bit Adder 4-bit Adder

1 1 1 1 1

4-bit Adder 4-bit Adder

1 1 1 1 1

4-bit Adder 4-bit Adder 4-bit Adder a3-a0 b3-b0 cin cout a11-a8 b11-b8 a15-a12 b15-b12 b7-b4 a7-a4

What really happens with the carries

FA c0 a0 b0 s0 c1 c2 c3 c4 c5 c6 c7 s7 s6 A B Cout S 0 0 0 Cin 0 1 Cin ~Cin 1 0 Cin ~Cin 1 1 1 Cin Carry action kill Propagate propagate generate

Carry Generate Gi = Ai Bi must generate carry when A = B = 1 Carry Propagate Pi = Ai xor Bi carry in will equal carry out here

Ai Bi Gi Ai Bi Pi All generates and propagates in parallel at first stage. No ripple.

Carry Look Ahead Logic

Carry Generate Gi = Ai Bi must generate carry when A = B = 1 Carry Propagate Pi = Ai xor Bi carry in will equal carry out here Si = Ai xor Bi xor Ci = Pi xor Ci Ci+1 = Ai Bi + Ai Ci + Bi Ci = Ai Bi + Ci (Ai + Bi) = Ai Bi + Ci (Ai xor Bi) = Gi + Ci Pi Sum and Carry can be reexpressed in terms of generate/propagate:

Gi Ci Pi Ci Pi Si Ci+1

All Carries in Parallel

Reexpress the carry logic for each of the bits: C1 = G0 + P0 C0 C2 = G1 + P1 C1 = G1 + P1 G0 + P1 P0 C0 C3 = G2 + P2 C2 = G2 + P2 G1 + P2 P1 G0 + P2 P1 P0 C0 C4 = G3 + P3 C3 = G3 + P3 G2 + P3 P2 G1 + P3 P2 P1 G0 + P3 P2 P1 P0 C0 Each of the carry equations can be implemented in a two-level logic network Variables are the adder inputs and carry in to stage 0!

CLA Implementation

Adder with Propagate and Generate Outputs Increasingly complex logic

Pi @ 1 gate delay Ci Si @ 2 gate delays Bi Ai Gi @ 1 gate delay

C0 C0 C0 C0 P0 P0 P0 P0 G0 G0 G0 G0 C1 P1 P1 P1 P1 P1 P1 G1 G1 G1 C2 P2 P2 P2 P2 P2 P2 G2 G2 C3 P3 P3 P3 P3 G3 C4

How do we extend this to larger adders?

• Faster carry propagation

– 4 bits at a time

• But still linear
• Can we get to log?
• Compute propagate and generate for each adder BLOCK

4 4 4 A3-0 B3-0 S3-0 4 4 4 A7-4 B7-4 S7-4 4 4 4 A11-8 B11-8 S11-8 4 4 4 A15-12 B15-12 S15-12

Cascaded Carry Lookahead

4 bit adders with internal carry lookahead second level carry lookahead unit, extends lookahead to 16 bits One more level to 64 bits

4-bit Adder 4 4 4 A [15-12] B [15-12] C

12

C

16

S [15-12] P G 4-bit Adder 4 4 4 A [1 1-8] B [1 1-8] C

8

S [1 1-8] P G 4-bit Adder 4 4 4 A [7-4] B [7-4] C

4

S [7-4] P G 4-bit Adder 4 4 4 A [3-0] B [3-0] C S [3-0] P G Lookahead Carry Unit C P G P

1 G 1

P

2

G

2

P

3

G

3

C

3

C

2

C

1

C P 3-0 G 3-0 C

4

@3 @2 @0 @4 @4 @3 @2 @5 @7 @3 @2 @5 @8 @8 @3 @2 @5 @5 @3 @0 C

16

Trade-offs in combinational logic design

• Time vs. Space Trade-offs

Doing things fast requires more logic and thus more space Example: carry lookahead logic

• Simple with lots of gates vs complex with fewer
• Arithmetic Logic Units

Critical component of processor datapath Inner-most "loop" of most computer instructions

2s comp. Overflow Detection

5 3

• 8

0 1 1 1 0 1 0 1 0 0 1 1 1 0 0 0

• 7
• 2

7 1 0 0 0 1 0 0 1 1 1 0 0 1 0 1 1 1 5 2 7 0 0 0 0 0 1 0 1 0 0 1 0 0 1 1 1

• 3
• 5
• 8

1 1 1 1 1 1 0 1 1 0 1 1 1 1 0 0 0 Overflow Overflow No overflow No overflow

Overflow occurs when carry in to sign does not equal carry out

2s Complement Adder/Subtractor

A - B = A + (-B) = A + B + 1

A B CO S + CI A B CO S + CI A B CO S + CI A B CO S + CI 0 1 Add/Subtract A

3 B 3 B 3

0 1 A

2 B 2 B 2

0 1 A

1 B 1 B 1

0 1 A

0 B 0 B

Sel Sel Sel Sel S

3

S

2

S

1

S Overflow

Summary

• Circuit design for unsigned addition

– Full adder per bit slice – Delay limited by Carry Propagation » Ripple is algorithmically slow, but wires are short

• Carry select

– Simple, resource-intensive – Excellent layout

• Carry look-ahead

– Excellent asymptotic behavior – Great at the board level, but wire length effects are significant on chip

• Digital number systems

– How to represent negative numbers – Simple operations – Clean algorithmic properties

• 2s complement is most widely used

– Circuit for unsigned arithmetic – Subtract by complement and carry in – Overflow when cin xor cout of sign-bit is 1

Basic Arithmetic and the ALU

• Now

– Integer multiplication » Booth’s algorithm – Integer division » Restoring, non-restoring – Floating point representation – Floating point addition, multiplication

Multiplication

• Flashback to 3rd grade

– Multiplier – Multiplicand – Partial products – Final sum

• Base 10: 8 x 9 = 72

– PP: 8 + 0 + 0 + 64 = 72

• How wide is the result?

– log(n x m) = log(n) + log(m) – 32b x 32b = 64b result

1 1 1 1 1 1 x 1

Combinational Multiplier

• Generating partial products

– 2:1 mux based on multiplier[i] selects multiplicand or 0x0 – 32 partial products (!)

• Summing partial products

– Build Wallace tree of CSA

Carry Save Adder

A + B => S Save carries A + B => S, Cout Use Cin A + B + C => S1, S2 (3# to 2# in parallel) Used in combinational multipliers by building a Wallace Tree

c b a c s CSA

Wallace Tree

a b c d e f CSA CSA CSA CSA

Multicycle Multipliers

• Combinational multipliers

– Very hardware-intensive – Integer multiply relatively rare – Not the right place to spend resources

• Multicycle multipliers

– Iterate through bits of multiplier – Conditionally add shifted multiplicand

Multiplier (F4.25)

1 1 1 1 1 1 x 1

Multiplier (F4.26)

Done

• 1. Test

M ultiplier0

• 1a. Add m ultiplicand to product and

place the result in Product register

• 2. Shift the Multiplicand register left 1 bit
• 3. Shift the Multiplier register right 1 bit

32nd repetition? Start M ultiplier0 = 0 M ultiplier0 = 1 No: < 32 repetitions Yes: 32 repetitions

1 1 1 1 1 1 x 1

Multiplier Improvements

• Do we really need a 64-bit adder?

– No, since low-order bits are not involved – Hence, just use a 32-bit adder » Shift product register right on every step

• Do we really need a separate multiplier register?

– No, since low-order bits of 64-bit product are initially unused – Hence, just store multiplier there initially

Multiplier (F4.31)

Control test Write 32 bits 64 bits Shift right Product Multiplicand 32-bit ALU

1 1 1 1 1 1 x 1

Multiplier (F4.32)

D one

• 1. Test

Product0

• 1a. Add multiplicand to the left half of

the product and place the result in the left half of the Product register

• 2. Shift the Product register right 1 bit

32nd repetition? Start Product0 = 0 Product0 = 1 No: < 32 repetitions Yes: 32 repetitions

1 1 1 1 1 1 x 1

Signed Multiplication

• Recall

– For p = a x b, if a<0 or b<0, then p < 0 – If a<0 and b<0, then p > 0 – Hence sign(p) = sign(a) xor sign(b)

• Hence

– Convert multiplier, multiplicand to positive number with (n-1) bits – Multiply positive numbers – Compute sign, convert product accordingly

• Or,

– Perform sign-extension on shifts for F4.31 design – Right answer falls out

Booth’s Encoding

• Recall grade school trick

– When multiplying by 9: » Multiply by 10 (easy, just shift digits left) » Subtract once – E.g. » 123454 x 9 = 123454 x (10 – 1) = 1234540 – 123454 » Converts addition of six partial products to one shift and one subtraction

• Booth’s algorithm applies same principle

– Except no ‘9’ in binary, just ‘1’ and ‘0’ – So, it’s actually easier!

Booth’s Encoding

• Search for a run of ‘1’ bits in the multiplier

– E.g. ‘0110’ has a run of 2 ‘1’ bits in the middle – Multiplying by ‘0110’ (6 in decimal) is equivalent to multiplying by 8 and subtracting twice, since 6 x m = (8 – 2) x m = 8m – 2m

• Hence, iterate right to left and:

– Subtract multiplicand from product at first ‘1’ – Add multiplicand to product after first ‘1’ – Don’t do either for ‘1’ bits in the middle

Booth’s Algorithm

00001111000 00001111000 00001111000 00001111000 Example Nothing Middle of a run of ‘0’ Add End of a run of ‘1’ 1 Nothing Middle of run of ‘1’ 1 1 Subtract Begins run of ‘1’ 1 Operation Explanation Bit to right Current bit

Integer Division

• Again, back to 3rd grade

1 1 1 1 1 1 1 1 1 1 1 Remainder

• 1
• Dividend

1 1 Divisor Quotient

Integer Division

• How does hardware know if division fits?

– Condition: if remainder divisor – Use subtraction: (remainder – divisor) 0

• OK, so if it fits, what do we do?

– Remaindern+1 = Remaindern – divisor

• What if it doesn’t fit?

– Have to restore original remainder

• Called restoring division

Integer Division (F4.40)

Done Test Remainder

• 2a. Shift the Quotient register to the left,

setting the new rightmost bit to 1

• 3. Shift the Divisor register right 1 bit

33rd repetition? Start Remainder < 0 No: < 33 repetitions Yes: 33 repetitions

• 2b. Restore the original value by adding

the Divisor register to the Remainder register and place the sum in the Remainder register. Also shift the Quotient register to the left, setting the new least significant bit to 0

• 1. Subtract the Divisor register from the

Remainder register and place the result in the Remainder register Remainder > 0 –

1 1 1 1 1 1 1 1 1 1 1 Remainder

• 1
• Dividend

1 1 Divisor Quotient

Integer Division

64-bit ALU Control test Quotient Shift left Remainder Write Divisor Shift right 64 bits 64 bits 32 bits

1 1 1 1 1 1 1 1 1 1 1 Remainder

• 1
• Dividend

1 1 Divisor Quotient

Division Improvements

• Skip first subtract

– Can’t shift ‘1’ into quotient anyway – Hence shift first, then subtract » Undo extra shift at end

• Hardware similar to multiplier

– Can store quotient in remainder register – Only need 32b ALU » Shift remainder left vs. divisor right

Improved Divider (F4.40)

D o n e . S h ift le ft h a lf o f R e m a in d e r rig h t 1 b it T e s t R e m a in d e r 3 a . S h ift th e R e m a in d e r re g is te r to th e le ft, s e ttin g th e n e w rig h tm o s t b it to 1 3 2 n d re p e titio n ? S ta rt R e m a in d e r < 0 N o : < 3 2 re p e titio n s Y e s : 3 2 re p e titio n s 3 b . R e s to re th e o rig in a l v a lu e b y a d d in g th e D iv is o r re g is te r to th e le ft h a lf o f th e R e m a in d e r re g is te r a n d p la c e th e s u m in th e le ft h a lf o f th e R e m a in d e r re g is te r. A ls o sh ift th e R e m a in d e r re g is te r to th e le ft, s e ttin g th e n e w rig h tm o s t b it to 0 2 . S u b tra c t th e D iv is o r re g is te r fro m th e le ft h a lf o f th e R e m a in d e r re g is te r a n d p la c e th e re s u lt in th e le ft h a lf o f th e R e m a in d e r re g is te r R e m a in d e r 1 . S h ift th e R e m a in d e r re g iste r le ft 1 b it – >

Improved Divider (F4.41)

Write 32 bits 64 bits Shift left Shift right Remainder 32-bit ALU Divisor Control test

Further Improvements

• Division still takes:

– 2 ALU cycles per bit position » 1 to check for divisibility (subtract) » One to restore (if needed)

• Can reduce to 1 cycle per bit

– Called non-restoring division – Avoids restore of remainder when test fails

Non-restoring Division

• Consider remainder to be restored:

Ri = Ri-1 – d < 0 – Since Ri is negative, we must restore it, right? – Well, maybe not. Consider next step i+1: Ri+1 = 2 x (Ri) – d = 2 x (Ri – d) + d

• Hence, we can compute Ri+1 by not restoring Ri, and

adding d instead of subtracting d

– Same value for Ri+1 results

• Throughput of 1 bit per cycle

NR Division Example

0001 0011 0010 Shift Rem right by 1 0010 0011 0010 Rem > 0 (sub next), sll 1 0001 0001 0010 Rem = Rem – Div 4 0011 0001 0010 3a: Rem > 0 (sub next), sll 1 0001 1000 0010 2: Rem = Rem + Div 3 1111 1000 0010 3b: Rem < 0 (add next), sll 0 1111 1100 0010 2: Rem = Rem + Div 2 1101 1100 0010 3b: Rem < 0 (add next), sll 0 1110 1110 0010 2: Rem = Rem - Div 1 0000 1110 0010 Shift rem left 1 0000 0111 0010 Initial values Remainder Divisor Step Iteration

2’s Complement Number “line”: N = 5

• 2N-1 non-negatives
• 2N-1 negatives
• one zero
• how many

positives?

00000 00001 00010 11111 11110 10000 01111 10001 1 2

• 1
• 2
• 15 -16

15 . . . . . .

• 3

11101

• 4

11100 00000 00001 01111 ... 11111 11110 10000 ...

So what about subtraction?

• Develop subtraction

circuit using the same process

– Truth table for each bit slice – Borrow in from slice of lesser significance – Borrow out to slice of greater significance – Very much like carry chain

• Homework exercise

0000 0111 0011 1011 1111 1110 1101 1100 1010 1001 1000 0110 0101 0100 0010 0001

+0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +10 +11 +12 +13 +14 +15

Finite representation?

• What happens when

A + B > 2N - 1 ?

– Overflow – Detect? » Carry out

• What happens when

A - B < 0 ?

– Negative numbers? – Borrow out?

0000 0111 0011 1011 1111 1110 1101 1100 1010 1001 1000 0110 0101 0100 0010 0001

+0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +10 +11 +12 +13 +14 +15

Number Systems

• Desirable properties:

– Efficient encoding (2n bit patterns. How many numbers?) – Positive and negative » Closure (almost) under addition and subtraction

• Except when overflow

» Representation of positive numbers same in most systems » Major differences are in how negative numbers are represented – Efficient operations » Comparison: =, <, > » Addition, Subtraction » Detection of overflow – Algebraic properties? » Closure under negation? » A == B iff A – B == 0

• Three Major schemes:

– sign and magnitude – ones complement – twos complement – (excess notation)

Booth’s Encoding

• Really just a new way to encode numbers

– Normally positionally weighted as 2n – With Booth, each position has a sign bit – Can be extended to multiple bits

2-bit Booth

• 2

+2 1-bit Booth

• 1

+1 Binary 1 1

2-bits/cycle Booth Multiplier

• For every pair of multiplier bits

– If Booth’s encoding is ‘-2’ » Shift multiplicand left by 1, then subtract – If Booth’s encoding is ‘-1’ » Subtract – If Booth’s encoding is ‘0’ » Do nothing – If Booth’s encoding is ‘1’ » Add – If Booth’s encoding is ‘2’ » Shift multiplicand left by 1, then add

Booth’s Example

• Negative multiplicand:
• 6 x 6 = -36

1010 x 0110, 0110 in Booth’s encoding is +0-0 Hence:

1101 1100 (-36) Final Sum: 1101 0000 x +1 1101 0000 0000 0000 x 0 1110 1000 0000 1100 x –1 1111 0100 0000 0000 x 0 1111 1010

Booth’s Example

• Negative multiplier:
• 6 x -2 = 12

1010 x 1110, 1110 in Booth’s encoding is 00-0 Hence:

0000 1100 (-12) Final Sum: 0000 0000 x 0 1101 0000 0000 0000 x 0 1110 1000 0000 1100 x –1 1111 0100 0000 0000 x 0 1111 1010