You Can Do That Cloud & Distributed Computing Scripting & - PowerPoint PPT Presentation

16.1 16.2 You Can Do That… Cloud & Distributed Computing Scripting & (CyberPhysical, Databases, Data Networked Interfaces Mining,etc.) Applications Applications SW (AI, Robotics, Graphics, Mobile) Applications C / C++ / Java Unit 16 Systems & Networking OS Libraries (Embedded Systems, Networks) Assembly / Machine Code Computer Organization and Processor / Memory / I/O Architecture (Processor & Embedded HW) Instruction Sets Functional Units (Registers, Adders, Muxes) Where we will head now… HW Logic Gates Devices & Integrated Circuits (Semiconductors & Fabrication) Transistors Voltage / Currents 16.3 16.4 Motivation Computer Organization • Now that you have some understanding… • Three primary sets of components – Of how hardware is designed and works – Processor – Of how software can be used to control hardware – Memory • We will look at how to improve efficiency of – I/O (everything else) computer systems and software so that… • Tell us where things live? – …we can start to understand why HW companies create – Running code the structures they do (multicore processors) – Compiled program (not running) – …we can begin to intelligently take advantage of the – Circuitry to execute code capabilities the HW gives us – Source code file – …we can start to understand why SW companies deal with – Data variables some of the issues they do (efficiencies, etc.) – Data for the pixels being displayed on your screen

16.5 16.6 Input / Output Processor • Processor performs reads and writes to communicate with I/O • 3 Primary Components inside a processor devices just as it does with memory – ALU – I/O devices have locations (i.e. __________ ) that contain data that the – Registers processor can access – Control Circuitry – These registers are assigned unique ____________ just like memory • Connects to memory and I/O via address , data , and control buses ( bus = _________________) Processor Memory Bus 0 … Processor Memory 3FF A D C Addr Video 0 Interface 800 1 FE may FE 800 FE 2 signify a WRITE … white dot at Data 3 01 a particular 4 location ‘a’ = 61 hex Keyboard in ASCII 5 Interface This could just as easily be the Control 6 command and data register from 400 61 the LCD shield… Or the PORT/DDR registers. 16.7 16.8 Arithmetic and Logic Unit (ALU) Registers • Executes arithmetic operations like addition • Some are for general use by software and subtraction along with logical operations – Registers provide ________________ storage locations within the processor (to avoid having to read/write slow memory) (AND, OR, etc.) • Others are required for specific purposes to ensure proper operation of the hardware Processor Memory Processor Memory PC Addr Addr 0 0 op. op. 1 1 ALU ALU 2 2 ADD, ADD, out in1 out in1 SUB, Data 3 SUB, Data 3 AND, AND, 4 4 in2 in2 OR OR 5 5 R0-R15 Control Control 6 6

16.9 16.10 General Purpose Registers What if we didn’t have registers? • Example w/o registers: F = (X+Y) – (X*Y) • Registers available to software instructions for use – Requires an ADD instruction, MULtiply instruction, and SUBtract by the __________________ Instruction • Instructions use these registers as inputs (_______ – w/o registers • ADD: Load X and Y from memory, store result to memory locations) and outputs (____________ locations) • MUL: Load X and Y again from mem., store result to memory • SUB: Load results from ADD and MUL and store result to memory • 9 memory accesses Processor Memory Processor Memory PC Addr PC 0 Addr op. 0 X 1 op. ALU 1 Y ALU 2 ADD, out in1 2 ADD, SUB, Data 3 out in1 SUB, Data 3 F AND, 4 AND, in2 OR 4 in2 OR 5 R0-R15 5 Control R0-R15 6 Control 6 16.11 16.12 What if we have registers? Other Registers • Example w/ registers: F = (X+Y) – (X*Y) • Some bookkeeping information is needed to make the processor operate correctly – Load X and Y into registers – ADD: R0 + R1 and store result in R2 • Example: Program Counter (PC) – MUL: R0 * R1 and store result in R3 – Recall that the processor must fetch instructions from memory before – SUB: R2 – R3 and store result in R4 decoding and executing them – Store R4 back to memory – PC register holds the address of the currently executing instruction – 3 total memory access Processor Memory Processor Memory PC PC Addr 0 Addr 0 X op. op. 1 1 Y ALU ALU 2 ADD, 2 out in1 ADD, X out in1 SUB, Data 3 SUB, Y Data 3 F AND, 4 AND, in2 OR 4 in2 OR 5 R0-R15 5 R0-R15 Control 6 Control 6

16.13 16.14 Fetching an Instruction Fetching an Instruction • To fetch an instruction • To fetch an instruction – PC contains the address of the instruction – PC contains the address of the instruction – The value in the PC is placed on the address bus and the memory is – The value in the PC is placed on the address bus and the memory is told to read told to read – The PC is incremented, and the process is repeated for the next – The PC is incremented, and the process is repeated for the next instruction instruction Processor Memory Processor Memory PC = Addr = 0 PC = Addr = 1 0 1 PC PC Addr Addr 0 inst. 1 0 inst. 1 op. op. 1 inst. 2 1 inst. 2 ALU ALU Data = inst.1 machine code 2 inst. 3 Data = inst.2 machine code 2 inst. 3 ADD, ADD, out in1 out in1 SUB, Data 3 SUB, Data 3 inst. 4 inst. 4 AND, AND, 4 inst. 5 4 inst. 5 in2 in2 OR OR Control = Read Control = Read … … R0-R15 R0-R15 Control Control FF FF 16.15 16.16 Control Circuitry Control Circuitry • Assume 0x0201 is machine code for an ADD instruction of R2 • Control circuitry is used to __________ the instruction and = R0 + R1 then generate the necessary signals to complete its execution • Control Logic will… • Controls the ALU – select the registers (R0 and R1) • _____________ registers to be used as source and destination – tell the ALU to add locations (using ____________) – select the destination register (R2) Processor Memory Processor Memory 0 0 0 PC PC Addr Addr Control Control 0 inst. 1 0 0201 op. ADD 1 inst. 2 1 inst. 2 ALU 2 inst. 3 0201 2 inst. 3 ADD, out in1 out ALU in1 SUB, Data 3 inst. 4 Data 3 inst. 4 ADD AND, 4 4 inst. 5 inst. 5 in2 in2 OR … … R0-R15 R0-R15 Control Control FF FF

16.17 16.18 INSTRUCTION SETS INSTRUCTION SET OVERVIEW 16.19 16.20 Instruction Sets Instruction Set Architecture (ISA) • Defines the software _____________ of the • 2 approaches processor and memory system – ________ = ____________ instruction set computer • ________________ vocabulary • Instruction set is the ___________ the HW processor • More work per instruction, slower clock cycle can understand and the SW is composed with – ________ = ____________ instruction set computer – Usually the compiler is the one that translates the • Small, basic, but _____________ vocabulary software • Less work per instruction, faster clock cycle • Most assembly/machine instructions fall into one of • Usually a simple and small set of instructions with regular format three categories facilitates building faster processors – ___________________ – ___________________ (to and from memory) – ___________________ (branch, subroutine call, etc.)