Why Analog IP is The Seed And Interface IP is The Skin of the IP - - PowerPoint PPT Presentation

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Why Analog IP is The Seed And Interface IP is The Skin of the IP - - PowerPoint PPT Presentation

Why Analog IP is The Seed And Interface IP is The Skin of the IP SOC world Unparalleled Power Performance 1 Milestones in Evolution of Vinification vs SoC Industry Milestones Vinification SoC Industry Philosophy: Traditional: Old World


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Unparalleled Power Performance

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Why Analog IP is The Seed And Interface IP is The Skin

  • f the IP SOC world
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Milestones in Evolution of Vinification vs SoC Industry

Milestones

Philosophy: Integration of Science Industrialization Downturn-80’s Disaggregation

Vinification SoC Industry

Traditional: Old World Modern: New World Analog, Interface, RF Digital, Memory Controlled Fermentation Moore’s Law Phylloxera Global Recession Refrigeration EDA/Foundry/IP Vineyard -> Bottle 1 entity

Vineyard,WineMaker,Channel

IDM-> Silicon Fabless, EDA/IP, Fabs

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Cross Section of a Wine Grape vs SoC

PCIe PCIe

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Sizes and Compositions of Wine Grapes in a Bottle

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Sizes and Compositions of SoC’s in Various Systems

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Digital: The Old World vs The New World

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Analog: The Old World vs The New World

Performance

Complex models More parasitics More variability (Corners, Monte Carlo) Top level simulations (CDR, PLL, SerDes) Device noise (RF, TN)

Accuracy

Foundry certified Silicon correlated device noise nm SPICE to near SPICE

Capacity

Top-level sim Complex block with LPE Complex RF (pre/post)

Ease of Use

Drop-in compatible flows Same netlist/models Existing states and measures Ease of adoption for new flows (TN, aging) Robust post-processing Repeatable Processes

Full Suite of Analysis

AC, DC, Tran Stability Transient Noise Driven RF Oscillator RF Aging

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The FinFet Digital Terroir – Logic and Memory

▪ 100’s of Billions of Transistors ▪ Defined and prescribed methodology with EDA tools and endorsed by fabs ▪ Lots of engineers working on RTL ▪ Even more engineers working on verification ▪ Lots of EDA tools ▪ Huge compute and server farms ▪ Cloud-based computing ▪ Project managers for every block

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The FinFet Analog Terroir – Analog and Interfaces

▪ Precision and patience ▪ Start everything from physics and metal – EM/IR/RC challenges ▪ Metal first design for high speed SERDES and Clocking ▪ Parasitic not just due to RC but due to gate resistance in FinFets ▪ Worry about layout topology and FinFet structures ▪ Leakage at 150C for automotive applications changes architecture ▪ Aging of transistors and flicker noise impact on performance

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Analog Engineer and Wine Maker – The Eternal Artists

Thinks electrons all day - uses paper and pens and scientific calculator (1+1 is never2) Imagines and challenge to solve problems in projects and fights to succeed Loves physics, geek talks and labs Circuit Sims, layout checks, EM/IR, IBIS/AMI Checks every result carefully with relentless patience and decides with 1000’s data points Thinks brix all day –Soil, Fermentation, Barrels,

  • Bubbling. 1+1 is never 2

Imagination to take a grape to wine and later realize it in winery relentless Loves chemistry, microbiology and labs pH, titration, sugar by refractometer, YAN analysis, malic acid 1000’s of decisions

If your circuit has a mistake you own it and fix it If your bottle is a mistake you own it and deal with it

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Design Life Cycle of s SOC Turning Sand to Systems with Lots of Passion and Energy

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The Perfect Blend of Analog and Digital

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What Makes the Perfect Blend

SOC is about Perfect Amalgamation

  • f Analog and Digital

Wine is all about balance, and winemakers look for the perfect balance between flavor components like sugar, acid, and tannin.

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For SoC Engineers –the Collaboration and Joy of Changing the World We Live In