[PPT] - VXD Environmental Monitors and Interlock Lorenzo Vitale Univ. PowerPoint Presentation

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Belle

VXD Environmental Monitors and Interlock

Lorenzo Vitale

Univ. & INFN Trieste

On behalf of VXD monitoring crew

BPAC focused VXD review KEK, October 17, 2017

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Outline

Radiation: sCVD Diamond sensors
Temperature: NTC and FOS
Humidity: Dew Point “sniffers”
VXD Local Hardwired Interlock (VLHI): PLC

Prototypes have already been operated in Phase 1 or VXD Beam Tests

here shortly mention phase 1
more on installation status and schedule

→ both Phase 2 and Phase 3 sometimes overlapping

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Belle Belle Belle Belle Environmental monitoring summary

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Subsystem Phase 1/Beam Test Sensors Phase 2 Sensors Phase 3 Sensors Time span Feb-Jun 2016/Mar 2016 + Mar 2017 Feb-Jun 2018 Dec 2018 → Diamonds 4 8 20 NTC 26 26 56+12 FOS 1 fiber 8 sensors 4+2 fibers 26 sensors 38+2 232 sensors Dew Point 1 1+3 1+3

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RADIATION: SCVD DIAMONDS

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sCVD Radiation Sensors: Phases 2 and 3

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6 + 6 sensors close to SVD L3 support rings 4 + 4 sensors PXD-beam pipe Now: Installing Assembling + test,

→ calibration 1-2 weeks/sensor

Phase 2: 8 “PXD” sCVD sensors Phase 3: 8 “PXD”+ 12 “SVD”

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Phase 1 results

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Integrated dose

FW_180 BW_180 FW_0 BW_0

date [m/d/y] 01/07/16 01/25/16 02/12/16 02/29/16 03/18/16 04/05/16 04/23/16 05/10/16 05/28/16 06/15/16 07/03/16 integrated dose [krad] 20 40 60 80 100 120

FW_180 position FW_0 position BW_180 position BW_0 position

integrated dose measured in the four position on the beam pipe

BEAST-II phase 1 - diamond sensors KEK, 05-02-2017

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Belle Belle Belle BellePhase 1 diamonds– aborts, refilling

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Dia0 Dia1 Dia3 Dia2 HER current, pressure LER current, pressure

HER Abort 3 LER Aborts

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Correlations with LER, HER

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Dia0 Dia1 Dia3 Dia2 HER current, pressure LER current, pressure FW_180, BW_0: very sensitive to LER, not to HER FW_0, BW_180: same sensitivity for both

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sCVD sensors: assembly, tests, calibration

Package preparation:

HV test, sensor gluing, cables soldering/gluing, I-V in the dark

Transient Current Test (TCT) with alpha source

fast amplifier + fast oscilloscope sCVD crystal quality, electrons/holes transport parameters

Beta source (3 MBq):

Priming/pumping to fill-in traps Stability tests at “high” current (about 1 nA) Calibrations: current vs particle flux (realized by changing the source distance), comparison with Fluka simulation and film dosimeters

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Example from 17 tested sensors

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Calibrations: extracted from the sCVD current vs source distance, at different HV value and polarity, compared with FLUKA simulations New: also radiochromic film dosimeters, collaboration with Naples

10 20 30 40 50 0.2 0.4 0.6 0.8 1 1.2 1.4

100 V 200 V 300 V

Source distance [mm] current [nA]

Dose range: 3 kGy- 100 kGy

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Diamonds Thin strips on Beam Pipe Several on FANGS, in particular 3 strips along z

Moreover PLUME & ECL detectors, DOCKS So far 4000 cm2, aiming to reach 7000 cm2

Film positioning in Phase 2

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SVD Layer 3 “fingers” SVD Outer Cover and Cartridge walls

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Phase 3: Diamond installation

6 final diamond sensors mounted in June 2017

n the first 2 SVD half-cones (BW and FW)

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Phase 2: Diamonds installation

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All 8 diamonds for phase 2

installed on the beam pipe on Sept 18-19

Functionally tested with a 90Sr

beta source

Two radiochromic films were

attached on their inner surface

Moreover two thin strips on BP

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Diamonds readout electronics

Prototype 4-channel module:

HV, currents digitization and averaging, beam abort logics successfully tested in Phase 1 (no abort)

Final engineered version in delivery

now

the FINAL re-engineered hardware parts of the radiation monitoring electronics (FPGA board, analog front-end board, HV modules, Ethernet interfaces) are READY AND TESTED The mechanical assembly of 2 modules for 8 diamonds are ongoing for Phase 2 3 additional modules + 1 spare will be ready for Phase 3 (ordering now)

Development in collaboration

Elettra Sincrotrone Trieste SCpa (Electronics Division G.Cautero et al.)

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TEMPERATURE: NTC AND FOS

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SVD Temperature

Requirements:

Temperature monitoring & interlocks: 0.1oC precision, 1oC accuracy Monitoring points:

close to SVD FE chips (heat sources)
Inlets and outlets of CO2 cooling pipes & half

rings (possible indication of cooling failure)

Design:
FBG (Fiber Bragg Grating) sensors on optical

fibers (FOS), embedded in SVD ladders (Airex)

NTC thermistors, with hardware interlock

capability, on cooling pipes and half-rings

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SLIDE 17

Belle Belle Belle BelleNTC final configuration for Phase 3

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in in in in in in in in

ut
ut
ut
ut
ut
ut
ut
ut

LEFT HALF RINGS RIGHT HALF RINGS LEFT ORIGAMI RIGHT ORIGAMI BACKWARD FORWARD LEFT HALF RIGHT HALF

3 3 3 5 6 5 6 5 6 3 5 6 CO2.5 CO2.6 CO2.7 CO2.8 CO2.11 CO2.9 CO2.12 CO2.10 L.6 L.6 L.5 L.4

+ FOS.1-8 + CO2.1-8 + CO2.9-12

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NTC read out for Phase 3 (&2)

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sensors docks Box in Electronics Hut PC CANbus ELMB 0A ELMB 0E Power supply

2 x 16 twisted pairs twisted pairs (32)

Current sources + interlocks

4 interlock signals

4 interlocks to PLC EPICS

≈ 3÷4 m BW

ELMB 0C

Current sources + interlocks Current sources + interlocks

FW BW

4 interlocks 4 interlocks

NTC Readout

18

SLIDE 19

Belle Belle Belle BelleNTC temperature sensors: installation

Phase 3

In June the read out system and all the sensors were shipped to KEK, and re-tested: they have be mounted (1/2) at the end of July and (1/2) in December for the Ladder Mount of the two SVD halfs

Phase 2

In July the back-up read out system and the sensors used for the DESY beam tests were dis-assembled and shipped from DESY to KEK. It has re-assembled in September with small modifications for Phase 2

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Temperature FOS sensors: first half 2017

Calibrations of 55 fibers completed
Cutting fiber excess & glueing clamps
System test with splitters and first

prototype of EPICS software

Mechanical tests in May at KEK:

insertions on all ladders interference with Layer 6 logistics in B1 glueing on the SVD Outer Cover

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FOS Schedule

Schedule:

2 Fibers for phase 2 outer cover installed on May
2 Fibers for phase 3 outer cover → installed in September
3 Fibers for phase 2 cartridge → installed in September
19 fibers SVD Ladder Mount +X half → first 2 installed on

Layer 4 Sep-Oct

19 fibers SVD Ladder Mount -X half → to be installed

starting from January 2018

Present status:

2 readout “interrogators” are available at KEK
All fibers are available at KEK

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HUMIDITY: DEW POINT SNIFFERS

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Dew Point Sniffers: overview

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Based on Dew Point Sniffers
Reduced system (1 line)

Successfully operated in in two Beam Tests at DESY

Full system: completely defined

4 Vaisala Dew Point Transmitters Pressure sensors Bronkhorst flow meter Calibration system (DewGen, DewMaster) 2 pumps

Humidity Sniffer

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Dew Point Sniffers: status

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Mechanics: Crate hosting Vaisala sensors,

pressure sensors, flowmeters and electronics

CAD design completed
Mechanical components available
Mechanical assembly: started in October
Sensors, electronics:
All components available
Readout interfaces and drivers: ready
Linux software developed & tested for all

sensors/actuators

Next:
Completion of mechanical assembly and tests before

shipping to KEK in November

EPICS interface in October
“DESY prototype” to be delivered at KEK as back-up

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Dew Point Sniffers: sensors & readout

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Vaisala Dew Point Transmitters & readout board Bronkhorst Flowmeters & readout board Pressure sensors readout board

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VXD LOCAL HARDWIRED INTERLOCK (VLHI): PLC

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VLHI Overview

Vertex Local Hardwired Interlock

(VLHI) is hardwired PLC-based system aimed at prevention of damage to VXD

It interlocks VXD PS basing on

hardwired inputs and variables from EPICS, and also it is supervised by EPICS

Presented in last BPAC
Documentation:

confluence page Belle II internal note VLHI simulator describing its logics running online

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VLHI Interlocks Status

PLC hardware:
I/O completely defined (modules, cables, connectors) (see

spreadsheet and CAD schematics in backup)

PLC crate interconnections, power lines: CAD design

completed

PLC crate mechanics, patch panel: ready (see photo)
PLC crate cabling: almost done
Next:
PLC crate cabling, to be finalized in October
Functional tests in Trieste with simulated inputs, outputs

programmed with the agreed interlock logics, before shipping to KEK for installation in E-hut in December

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VLHI crate: back view

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Back view of the PLC crate: patch panel, all I/O connections defined

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CONCLUSIONS AND SCHEDULE

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In Summary

Radiation: sCVD diamond sensors

BEAST Phase 1 analysis, NIM paper Assembly & calibration of sensors in Trieste

now 17 completed, 8 ongoing, out of 4+8+20

Final electronics in preparation for Phase 2, Detector installations completed for Ph1 & Ph2

4 Ph1, 6 SVD Jun17, 8 Ph2 Sep17, 6 SVD Dec17, 8 ph3 early 2018

Temperature: NTC and FOS sensors

All NTC+FOS sensors and electronics tested & calibrated in Trieste Installation at KEK ongoing

From May 2017 to Apr 2018

Humidity: Dew Point “sniffers”

Design and test of components completed, assembly in progress in Trieste

Shipping in Nov, inst/test Dec

VXD Local Hardwired Interlock (VLHI)

Design and simulations completed PLC & I/O assembled, cabling in progress

Shipping in Nov, inst/test DeC

VXD Monitoring & Interlock - VXD PAC 31 17/10/17

NTC Readout sCVD, FW cone FOS, outer cover

1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 A A B B C C D D SHEET 1 OF 8 DRAWN CHECKED QA MFG APPROVED Cristaud 3/23/2017 DWG NO PLC_SubRack_6UD355mm TITLE PLC subrack 6U D 355mm SIZE D SCALE REV 1 : 1 BMXDRA0805 RELE MODULE BMXDDO1602 DIGITAL OUTPUT MODULE BMXDDI1602 DIGITAL INPUT MODULE BMXP342030 CPU BMXCPS3500 POWER SUPPLY BMXXBP0800 BACKPLANE SCHNEIDER PLC MODULE BMXFTB2000 CLAMP TERMINAL BLOCK BMXAMI0810 ANALOG ISOLATED 8 INPUTS 4 -20mA MODULE

VLHI PLC FOS, ladders sniffers sCVD, Beam Pipe

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Commissioning at DESY/KEK - summary Item 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12 SuperKEKB Phase 2 SuperKEKB Phase 3 DESY beam test, BEAST Phase 2 assembly BEAST Phase 2 installation at KEK SVD Ladder Mount 4 FOS + 1/2 NTC PXD ready/delivery to KEK VXD integration, commissioning & installation Commissioning at DESY/KEK - summary Phase 2 cables installation BW FW Phase 2 - 8 sCVD sensors installation & commissioning 8 Phase 2 Rad.Mon.installation & commissioning - KEK Phase 2+3 Rad.Mon.signals from/to SuperKEKB, cabling Phase 2+3 Rad.Mon.signals from/to SuperKEKB, tests Phase 3 cables ? Phase 3 - 12 sCVD sensors (SVD) installation 6 6 Phase 3 - 8 sCVD sensors (PXD) installation 8 Phase 3 - final Rad.Mon. commissioning Phase 2 - (few NTC sensors substitution) DESY Phase 2 NTC cables installation phase 2 FOS sensors in layers 4,5,6, etc, tests phase 2 fibres from DOCKS to E-hut phase 3 FOS sensors in layers 4, 5, 6, etc, insertion & tests phase 3 fibres from DOCKS to E-hut ? phase 3 final FOS commissioning Sniffers delivery at KEK Sniffers piping to E-hut (DESY crew) at KEK Sniffers final commissioning at KEK Sniffer: on SVD ladder mount: prototype? No Interlock cabling and tests at KEK Interlock final commissioning at KEK Lab activities at INFN Trieste Installation and commissioning at DESY or KEK 2016 2017 2018

VXD monitoring: schedules @ KEK

Phase 2 Phase 3

Radiation NTC FOS sniffers VLHI

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Backup

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Belle Belle Belle Belle Documentation and Contributors

More information on environmental monitors, electronics,

etc:

BELLE2-NOTE-TE-2015-026, SVD Radiation and Environmental Monitoring: general requirements BELLE2-NOTE-TE-2016-007, Environmental Monitors for the Beam Test at DESY BELLE2-NOTE-TE-2016-008, NTC Readout System for the Belle II VXD BELLE2-NOTE-TE-2016-xxx, The VXD Local Hardwired Interlock System (draft) Other documents in Confluence (internal Belle II repository)

VXD Monitoring crew
L. Bosisio, B. Gobbo, I. Komarov, C. La Licata, L. Lanceri, D. Tonelli, L. Vitale

(Univ. & INFN Trieste) + students Technicians: M. Bari, P. Cristaudo, A. Zanetti + electronics & mechanics workshops (INFN Trieste)

G. Cautero, D. Giuressi, H. Menk (Elettra Sincrotrone Trieste SCpA) + students
S. Bacher (Krakóv)

+ Vienna, KEK, Bonn, DESY, MPI etc precious contributions

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RADIATION: PHASE 1 STUDIES

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Belle Belle Belle BelleDiamonds: Abort Buffer Memories

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Mem 1 Mem 2 Mem 3 Mem 4 Present configuration of revolving Abort Buffer Memories to be improved with really “running sums”

5000

∑

100

∑

1000

∑

Sum 1250 ADC samples every 10 μs Sum 1250 x 100 ADC samples every 1 ms Sum 1250 x 5000 ADC samples every 50 ms Sum 1250 x 100000 ADC samples every 1 s

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Buffer Memories: Snapshot Example

VXD Monitoring & Interlock - VXD PAC 37

h41

Entries 100000 Mean 1.511 Std Dev 0.4744 1 − 0.5 − 0.5 1 1.5 2 2.5 3 200 400 600 800 1000 1200

h41

Entries 100000 Mean 1.511 Std Dev 0.4744

diam 4 mem 1

h42 Entries 1000 Mean 1.529 Std Dev 0.1781

0.5 1 1.5 2 2.5 3 5 10 15 20 25 30 35

h42 Entries 1000 Mean 1.529 Std Dev 0.1781

diam 4 mem 2

h43

Entries 1000 Mean 1.549 Std Dev 0.04712 0.5 1 1.5 2 2.5 3 20 40 60 80 100

h43

Entries 1000 Mean 1.549 Std Dev 0.04712

diam 1 mem 3

h43

Entries 100 Mean 1.549 Std Dev 0.03405 0.5 1 1.5 2 2.5 3 2 4 6 8 10 12 14 16

h43

Entries 100 Mean 1.549 Std Dev 0.03405

diam 1 mem 3

Example of snapshot of Buffer Memories (Mem1 to Mem4) for Dia3 = BW_0 in stable beam conditions, with average I(BW_0) = 1.5 nA Noise decreases with increased averaging, from about 0.47 nA to < 0.04 nA OK both for fast (10 μs) and slow (> 1 s) beam aborts with appropriate thresholds

BW_0 Mem1 BW_0 Mem2 BW_0 Mem4 BW_0 Mem3 100000 entries 1 s history σ = 0.47 nA 1000 entries 50 s history σ = 0.047 nA 100 entries 100 s history σ = 0.034 nA 1000 entries 1 s history σ = 0.18 nA 0 nA 0 nA 3 nA 3 nA

1 nA

3 nA

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Belle Belle Belle Belle Diamonds in BEAST 1: Summary

Main goals for BEAST 1 and results

Validation of sCVD sensor choice, mechanics, cables OK Characterization of prototype electronics OK Stability and reliability of operation over several months OK Correlations with accelerator conditions and backgrounds, contributions to BEAST studies OK Initial studies of beam abort features just started Integration in EPICS marginal trick now: to be done!

Plans for the future (as May 2016)

Check absolute calibrations of the 4 BEAST-1 sensors Mounting, test, calibrations of final diamond sensors in Trieste Final electronics production (at least 2 boxes ready for BEAST – 2) Prepare for BEAST – 2 and SVD installation

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Belle Belle Belle Belle Examples from 17 tested sensors - 1

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DC13 DC14 DC15 DC16

I-V measurements with β source of 4 sensors: sCVD crystals are not all equal; asymmetric behaviour HV [V] I [nA]

0 nA

1 nA

+1 nA

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Belle Belle Belle Belle Examples from 17 tested sensors - 2

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Priming/stability studies with β source at different HV values: example from one sensor I [nA] time [s]

0.99 nA 1.04 nA 1.05 nA

≈ 18 hours

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Stability at about 1 nA may depend (not always) on HV polarity zoom time [s] time [s] I [nA] ≈ 8% ≈1.5% zoom HV to back HV to front

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RADIOCHROMIC FILMS DOSIMETRY (WITH NAPLES)

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Absolute dose measurement with radiochromic films in BEAST II phase 2 (Napoli group)

Non-invasive radio-chromic films has been proposed for

integrated measurements during phase 2, collaboration with Trieste group

Proposal well accepted by Japanese colleagues
Study of dose radial dependence
Independent dose measurement cross-check for several sub-

detectors

Thin layer films and easy handling: negligible material budget
High spatial resolution, no processing required to develop or fix

the image, insensitive to visible light

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SLIDE 44

Belle Belle Belle BelleFilm types proposed for BEAST application

B3 (3kGy-100 kGy), to be positioned very close to interaction point
HDV2 (10 Gy – 1kGy) for intermediate range
EBT3 (1-60 Gy) calorimeter region
Wide range of doses could be covered with the 3 film types proposed

B3 films

Plastic polyvinyl butyral by Riso

laboratory Denmark

Thickness: 20 μm
Dose range (3kGy-100 kGy)
Readout peak at 554 nm

HD-V2

Active layer (12 μm) coated on a 97

μm polyester substrate

Dose range (10Gy-1kGy)
Readout peak maximum at 670 nm

Strips on FANGS

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RADIATION: SIMULATION RESULTS

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PXD: Ph2 vs Ph3 dose rate

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Phase 2 Phase 3

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SVD: Ph3 dose rate

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Dose

(a) Campaign 16 (b) Campaign 15

4 / 20

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SVD: Ph3 vs Ph2 dose rate

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Dose

(a) Phase3 (b) Phase2

14 / 20

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Belle Belle Belle Belle Diamond low sensitivity to x-rays

Comparison Diamond vs. Silicon 20 um thick

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Belle Belle Belle Belle CO2 cooling system: NTC sensors

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LEFT HALF RINGS RIGHT HALF RINGS FORWARD BACKWARD LEFT ORIGAMI RIGHT ORIGAMI Temperatures of the half rings and at the inlets and outlets

f each CO2 circuit

+ 8 sensors to cross-check a sample of FOS sensors + 12 for CO2 in the external circuits, requested by the CO2 group

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SVD$Cartridge$–$Top$View$ BWD$ FWD$

Outlet$pipe,$hybrids$ $$$$$$$$Outlet$pipes$

rigami$$$$$$$$$$$hybrids$

Inlet$pipe,$hybrids$

rigami$$$$$$$$$hybrids$

$$$$$$$$$Inlet$pipes$

INh1_FWD) INh2_FWD) OUTh1_FWD) OUTh2_FWD) INh1_BWD) INh2_BWD) OUTh1_BWD) OUTh2_BWD) INo1_BWD) INo2_BWD) OUTo1_BWD) OUTo2_BWD) EL6_1_FWD) EL6_2_FWD) EL5_1_FWD) EL5_2_FWD) EL4_1_FWD) EL4_2_FWD) CA_L3_FWD) EL4_1_BWD) EL4_2_BWD) EL5_1_BWD) EL5_2_BWD) EL6_1_BWD) EL6_2_BWD) CA_L3_BWD) BR_L3_BWD) AN_L3_FWD) AP_L3_FWD) AP_L3_BWD)

NTC Sensors in SVD Cartridge @BT

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Similar to the final SVD configuration, where pairs of NTCs will monitor inlets and outlets of the CO2 cooling lines, and each of the supporting “half rings”, with their cooling channels

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NTC Temperature @BT

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The temperature of the CO2 cooling system (MARCO) decreased gradually in steps. With MARCO running at -27°C, NTC readings of SVD CO2 in/out lines were at -20°C

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FBG Sensors Calibrations

Fiber Bragg Grating (FBG)

Maximum reflectivity at Wavelength λB depends on strain ε, temperature T

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Calibrations

Environmental chamber Reference PT100 Polynomial fit (3rd order) Stable and reproducible results, within specs.

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Belle Belle Belle Belle Phase3: FOS on SVD outer covers

FOS fibers with 4 sensors were glued and tested on the SVD outer covers in Sept (Phase 2 were done on May)

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Belle Belle Belle Belle Phase 3 activities: ladder-mount

First 2 FOS on L4+x, locations 4.09, 4.10; unfortunately L4.006 in 4.10 was dismounted on Sept 26, the other later

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In location 4.09 with a modified

“dedicated” clamp and “after” H shape

In location 4.10 with a “normal”

clamp and “before” H shape

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TEMPERATURE IN PXD: IN DCP

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Temperature in PXD-1

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W37_OF1

Module Temperatures



measured via DHP temperature diode



all covers, with clamp, chiller @ 18°C



nly DHPs powered

 25-30



DHPs and DCD powered, but DCD analog OFF

 30-35

-> for both W37_OF1 and EMCM



DHPs and DCDs powered and DCD analog ON

 50-58



all powered (DCDs analog ON and matrix)

 55-60 

calibration?



even with only DHPs powered: 5-10 spread between DHP temperatures

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Temperature in PXD-2

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Utility IOC

Temperature Interlock

 Utility IOC can monitor the DHP temperatures and trigger an

emergency shutdown

 Utility IOC is a temporary solution for lab setups and will not be

used in the final experiment

 Heartbeat between PS Seq IOC and DHH IOC required for a

stable and save solution

 This requires some work on both IOCs, to produce/receive

the heartbeat and perform the temperature measurement

PS PS IOC DHE IOC Heart Beat Heart Beat

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Humidity calibration system

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Dew point generator (DewGen) for calibrations

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Belle Belle Belle Belle Humidity: inputs from Dew Point Sensors

Vaisala DMT242B Dew Point Transmitters

[-60, +60]oC dew point range

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Edgetech Dewmaster Chilled Mirror Hygrometer (for calibrations)

Rotameter flux meters Pump Sniffing pipes

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Prototype system under construction

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1 1 2 2 3 3 4 4 A A B B C C D D SHEET 1 OF 1 DRAWN CHECKED QA MFG APPROVED Zanetti Aldo 21/05/2015 DWG NO

Pannello completo

TITLE

Sampling System

SIZE

C

SCALE REV

Front Back

Vaisala DMT242B Dew Point Transmitters

[-60, +60]oC dew point range

Rotameter flux meters Front view Back view

SLIDE 62

Belle Belle Belle Belle

Simplified Block Diagram, PLC

17/10/17 VXD Monitoring & Interlock - VXD PAC 62

VXD Local Hardwired Interlock = VLHI

Schneider Electric Modicon M340 + BMX DDM 16022 Discrete I/O + BMX AMI 0410 Analog Input

SLIDE 63

Belle Belle Belle Belle

VLHI I/O spreadsheet

17/10/17 VXD Monitoring & Interlock - VXD PAC 63

VLHI%PLC%crate%configuration:%inputs,%outputs,%connectors%(preliminary,%August%24,%2017) cable Unit purpose I/O%channels type assignment PLC%memory type length from to type pins Reference%person Institution CPS3500 power,unit BMX,P34,20302 M340,CPU USB Ethernet CANopen BMX,DDI,1602 16?ch,digital,input %I0.1.0 EBOOL Manual %MW001 ? ? slot,1 %I0.1.1 EBOOL Beam,Abort %MW002 ? ? %I0.1.2 EBOOL %MW003 %I0.1.3 EBOOL from_Central_Interlock_Sol_Abn %MW011 Sadaharo,Uehara KEK %I0.1.4 EBOOL from_Central_Interlock_Env_Mon %MW012 Sadaharo,Uehara KEK %I0.1.5 EBOOL from_Central_Interlock_WaterLeak %MW013 Sadaharo,Uehara KEK %I0.1.6 EBOOL from_Central_Interlock_EH_Power %MW014 Sadaharo,Uehara KEK %I0.1.7 EBOOL CO2,ER,COND.,(DSS2) Hans?Gunther,Moser MPI,Munich %I0.1.8 EBOOL CO2,OK,(DSS3) Hans?Gunther,Moser MPI,Munich %I0.1.9 EBOOL %I0.1.10 EBOOL %I0.1.11 EBOOL %I0.1.12 EBOOL %I0.1.13 EBOOL %I0.1.14 EBOOL %I0.1.15 EBOOL BMX,DDI,1602 16?ch,digital,input %I0.2.0 EBOOL HumiditySniffer_1 %MW021 Benigno,Gobbo INFN,Trieste slot,2 %I0.2.1 EBOOL HumiditySniffer_2 %MW022 Benigno,Gobbo INFN,Trieste %I0.2.2 EBOOL HumiditySniffer_3 %MW023 Benigno,Gobbo INFN,Trieste %I0.2.3 EBOOL HumiditySniffer_4 %MW024 Benigno,Gobbo INFN,Trieste %I0.2.4 EBOOL NTC_Temperature_1 %MW031 Pietro,Cristaudo INFN,Trieste %I0.2.5 EBOOL NTC_Temperature_2 %MW032 Pietro,Cristaudo INFN,Trieste %I0.2.6 EBOOL NTC_Temperature_3 %MW033 Pietro,Cristaudo INFN,Trieste %I0.2.7 EBOOL NTC_Temperature_4 %MW034 Pietro,Cristaudo INFN,Trieste %I0.2.8 EBOOL NTC_Temperature_5 %MW035 Pietro,Cristaudo INFN,Trieste %I0.2.9 EBOOL NTC_Temperature_6 %MW036 Pietro,Cristaudo INFN,Trieste %I0.2.10 EBOOL NTC_Temperature_7 %MW041 Pietro,Cristaudo INFN,Trieste %I0.2.11 EBOOL NTC_Temperature_8 %MW042 Pietro,Cristaudo INFN,Trieste %I0.2.12 EBOOL NTC_Temperature_9 %MW043 Pietro,Cristaudo INFN,Trieste %I0.2.13 EBOOL NTC_Temperature_10 %MW044 Pietro,Cristaudo INFN,Trieste %I0.2.14 EBOOL NTC_Temperature_11 %MW045 Pietro,Cristaudo INFN,Trieste %I0.2.15 EBOOL NTC_Temperature_12 %MW046 Pietro,Cristaudo INFN,Trieste BMX,DDI,1602 16?ch,digital,input %I0.3.0 EBOOL WaterLeak_Disconnected_1 %MW051 flat? Markus,Friedl Vienna slot,3 %I0.3.1 EBOOL WaterLeak_Disconnected_2 %MW052 flat? Markus,Friedl Vienna %I0.3.2 EBOOL WaterLeak_Disconnected_3 %MW053 flat? Markus,Friedl Vienna %I0.3.3 EBOOL WaterLeak_Disconnected_4 %MW054 flat? Markus,Friedl Vienna %I0.3.4 EBOOL WaterLeak_Disconnected_5 %MW055 flat? Markus,Friedl Vienna %I0.3.5 EBOOL WaterLeak_Detected_1 %MW061 twisted,pair Markus,Friedl Vienna %I0.3.6 EBOOL WaterLeak_Detected_2 %MW062 twisted,pair Markus,Friedl Vienna %I0.3.7 EBOOL WaterLeak_Detected_3 %MW063 twisted,pair Markus,Friedl Vienna %I0.3.8 EBOOL WaterLeak_Detected_4 %MW064 twisted,pair Markus,Friedl Vienna %I0.3.9 EBOOL WaterLeak_Detected_5 %MW065 twisted,pair Markus,Friedl Vienna %I0.3.10 EBOOL %I0.3.11 EBOOL %I0.3.12 EBOOL %I0.3.13 EBOOL %I0.3.14 EBOOL %I0.3.15 EBOOL BMX,DRA,0805 8?ch,rele, %Q0.4.0 EBOOL SVD_LV_Interlock_1 %MV101 coax,BNC BNC Francesco,Forti INFN,Pisa slot,4 %Q0.4.1 EBOOL SVD_LV_Interlock_2 %MV102 coax,BNC BNC Francesco,Forti INFN,Pisa %Q0.4.2 EBOOL SVD_LV_Interlock_3 %MV103 coax,BNC BNC Francesco,Forti INFN,Pisa %Q0.4.3 EBOOL SVD_HV_Interlock_1 %MV111 coax,BNC BNC Francesco,Forti INFN,Pisa %Q0.4.4 EBOOL SVD_HV_Interlock_2 %MV112 coax,BNC BNC Francesco,Forti INFN,Pisa %Q0.4.5 EBOOL SVD_HV_Interlock_3 %MV113 coax,BNC BNC Francesco,Forti INFN,Pisa %Q0.4.6 EBOOL CO2_CoolingPlant_Interlock %MV132 Hans?Gunther,Moser MPI,Munich %Q0.4.7 EBOOL WARM Hans?Gunther,Moser MPI,Munich BMX,AMI,0410 4?ch,analog,inputs %I0.5.0 INT N2,Flow %MW301 ? ? DESY,? slot,5 %I0.5.1 INT DOCK_Chiller_flow %MW302 ? D?SUB,9,pin,male, (2pin,of,9) Markus,Friedler Vienna %I0.5.2 INT Pressure %MW303 ? ? ? %I0.5.3 INT BMX,AMI,0410 4?ch,analog,inputs %I0.6.0 INT slot,6 %I0.6.1 INT %I0.6.2 INT %I0.6.3 INT BMX,DRA,0805 8?ch,rele, %Q0.7.0 EBOOL to_Central_Interlock_SVD_LV_Int %MV141 Sadaharo,Uehara KEK slot,7 %Q0.7.1 EBOOL to_Central_Interlock_SVD_HV_Int %MV142 Sadaharo,Uehara KEK %Q0.7.2 EBOOL to_Central_Interlock_PXD_Int %MV143 Sadaharo,Uehara KEK %Q0.7.3 EBOOL to_Central_Interlock_Waterleak_Int %MV144 Sadaharo,Uehara KEK %Q0.7.4 EBOOL PXD_Interlock_1 %MV121 coax,BNC BNC ? ? %Q0.7.5 EBOOL PXD_Interlock_2 %MV122 coax,BNC BNC ? ? %Q0.7.6 EBOOL PXD_Interlock_3 %MV123 coax,BNC BNC ? ? %Q0.7.7 EBOOL DOCK_Chiller_Interlock %MV131 ? D?SUB,9,pin,male, (2pin,of,9) Markus,Friedler Vienna PLC%Pannel%Connector D?SUB,9,pin,Male D?SUB,9,pin,Female JC,series,10,pin, Male Multiconduc tor,8,wires Multiconduc tor,8,wires Multiconduc tor,10,wires Multiconduc tor,10,wires twisted, round,cable, 5,couple twisted, round,cable, 5,couple twisted, round,cable, 5,couple D?SUB,9,pin,Female D?SUB,9,pin,Female D?SUB,15,pin,Male D?SUB,15,pin, Female JC,series,16,pin, Female,(4pin,of,16) JC,series,10,pin, Female JC,series,16,pin, Female,(4pin,of,16)

PLC I/O hardware completely defined:

module types
cables
connectors

SLIDE 64

Belle Belle Belle Belle

VLHI crate: CAD design

17/10/17 VXD Monitoring & Interlock - VXD PAC 64

1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 D D C C B B A A 1 INFN TRIESTE LABORATORIO ELETTRONICA 9 PLC INTERLOCK SYSTEM CP-2017-1 * 20/6/2017 U:\AltiumDesignerWork\Belle2_PLCinterlock\PLC_Interlock\InterlockTop.SchDoc Title: Size: Number: Date: File: Revision: Sheet

f

A3 Draw by: Cristaudo P. BELLE II PRJ: Slot2 - 24 VDC -2 Slot2 - 24 VDC -6 Slot2 - 24 VDC -1 Slot2 - 24 VDC -5 Slot2 - 24 VDC -3 Slot2 - 0 VDC -1 Slot2 - 0 VDC -2 Slot2 - 24 VDC -4 Slot3 - 24 VDC -1 Slot3 - 0 VDC -1 Slot3 - 24 VDC -2 Slot3 - 24 VDC -7 Slot3 - 24 VDC -3 Slot3 - 0 VDC -2 Slot3 - 24 VDC -4 Slot3 - 24 VDC -6 Slot3 - 24 VDC -5 Slot1 - 24 VDC -1 Slot1 - 0 VDC -2 Slot1 - 24 VDC -2 Slot1 - 0 VDC -1 Slot1 - 24 VDC -8 Slot3 - 24 VDC -8 Slot3 - 24 VDC -9 Slot1 - 24 VDC -6 Slot1- 24 VDC -9 Slot3 - 24 VDC -12 Slot3 - 24 VDC -10 Slot3 - 24 VDC -11 Slot1- 24 VDC -7 Slot1 - 24 VDC -3 Slot1 - 24 VDC -5 Slot1 - 24 VDC -4 Slot1- 24 VDC -10 Slot7 - 0 VDC -1 Slot7 - 24 VDC -1 U_PowerSupply_CPU_BackPlane PowerSupply_CPU_BackPlane.SchDoc Slot1 - 0 VDC -2 Slot1 - 24 VDC -1 Slot1 - 24 VDC -2 Slot1 - 0 VDC -1 Slot1 - 24 VDC -6 Slot1 - 24 VDC -5 Slot1 - 24 VDC -3 Slot1 - 24 VDC -4 CO2 OK (DSS3) CO2 ER (DSS2) Slot1 - 24 VDC -9 Slot1 - 24 VDC -10 U_Slot 1 BMX DDI 1602 Slot 1 BMX DDI 1602.SchDoc Slot2 - 24 VDC -1 Slot2 - 24 VDC -6 Slot2 - 0 VDC -2 Slot2 - 0 VDC -1 Slot2 - 24 VDC -2 Slot2 - 24 VDC -3 Slot2 - 24 VDC -4 Slot2 - 24 VDC -5 U_Slot 2 BMX DDI 1602 Slot 2 BMX DDI 1602.SchDoc Slot3 - 24 VDC -3 Slot3 - 24 VDC -6 Slot3 - 24 VDC -7 Slot3 - 24 VDC -5 Slot3 - 24 VDC -4 Slot3 - 0 VDC -2 Slot3 - 0 VDC -1 Slot3 - 24 VDC -1 Slot3 - 24 VDC -2 Slot3 - 24 VDC -11 Slot3 - 24 VDC -12 Slot3 - 24 VDC -9 Slot3 - 24 VDC -8 Slot3 - 24 VDC -10 U_Slot 3 BMX DDI 1602 Slot 3 BMX DDI 1602.SchDoc + DOCK CHILLER

DOCK CHILLER

U_Slot 5 BMX ami 0410 Slot 5 BMX ami 0410.SchDoc U_Slot 6 BMX ami 0410 Slot 6 BMX ami 0410.SchDoc DOCK CH INT Slot7 - 24 VDC -1 U_Slot 7 BMX DRA 0805 Slot 7 BMX DRA 0805.SchDoc 1 2 3 4 5 6 7 8 9 J3 D-Sub 9 way Male 1 2 3 5 6 7 8 14 15 16 4 9 13 12 11 10 P5 JC2A21-16S CO2 CP INT + CO2 CP INT - WARM + WARM - U_Slot 4 BMX DRA 0805 Slot 4 BMX DRA 0805.SchDoc TB30 Double Terminal Block SPARE WIRES CO2 ALARMS DOCK CHILLER 1.10 1.11 4.13 4.14 4.15 4.16 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 1.10 2.1 2.2 2.3 2.4 2.5 2.6 2.1 2.2 2.3 2.4 2.5 2.6 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 7.1 7.1 1.1 1.2 2.1 2.2 2.1 2.2 3.1 3.2 3.1 3.2 7.1 7.1 1.8 1.9 5.8 5.9 7.16 1.7 1.8 PIJ301 PIJ302 PIJ303 PIJ304 PIJ305 PIJ306 PIJ307 PIJ308 PIJ309 COJ3 PIP501 PIP502 PIP503 PIP504 PIP505 PIP506 PIP507 PIP508 PIP509 PIP5010 PIP5011 PIP5012 PIP5013 PIP5014 PIP5015 PIP5016 COP5 PITB3000 PITB3001 PITB3002 PITB3003 COTB30 PIJ301 PIJ302 PIJ303 PIJ304 PIJ305 PIJ306 PIJ307 PIJ308 PIJ309 PIP501 PIP502 PIP503 PIP504 PIP505 PIP506 PIP507 PIP508 PIP509 PIP5010 PITB3002 PIP5011 PIP5012 PIP5013 PIP5014 PITB3000 PIP5015 PIP5016 PITB3001 PITB3003

PLC crate internal cabling, I/O signal definitions and connection types: all available in CAD drawings (here an example, PLC at top level)

SLIDE 65

Belle Belle Belle Belle

VLHI crate: front view

17/10/17 VXD Monitoring & Interlock - VXD PAC 65

Front view of the cabled PLC crate; Two empty slots: analog modules (available) to be inserted

SLIDE 66

Belle Belle Belle Belle

VLHI crate: top view

17/10/17 VXD Monitoring & Interlock - VXD PAC 66