1 1
Machine Interlocks Machine Interlocks
Outline: Outline:
Proposed architecture & locations Outstanding issues & requirements Participation to Hardware Commissioning Summary
LHC CP LHC CP-
- 4 Session 5.3 on Hw
4 Session 5.3 on Hw Com Comg
g:
: Machine interlocks Machine interlocks
2 2
Abort Powering in case of failure
Stop power converter Open energy extraction switch
Machine Interlock System = BEAM Interlock + POWERING Interlock
- Record data for Post-Mortem
analysis
- Provoke generation of a Post-
Mortem Event
- Record data for P-M analysis
Abort Beams in case of failure
Carry the request a.s.a.p. to the Beam Dump System
Time critical (~10 ms) and must be fail-safe
all safety/time critical signals via fail-safe hardware links
Very Time critical (~10 µs) and must be fail-safe
all safety/time critical signals via fail-safe hardware links
Give Power Permit to converters Give Beam Permit for injection
3 3
Beam Interlock System Beam Interlock System
LHC CP LHC CP-
- 4 Session 5.3 on Hw
4 Session 5.3 on Hw Com Comg
g:
: Machine interlocks Machine interlocks
4 4
Layout of the Beam Interlock System
(* with possible redundancy) unique signal request per
system* and per BIC
16 Beam Interlock Controllers 2 fast links if one loop open ⇒ Beam Dump
BIC 1R BIC 1L BIC 2R BIC 2L BIC 8L BIC 8R BIC 7L BIC 7R BIC 6R BIC 6L BIC 5R BIC 5L BIC 4L BIC 4R BIC 3L BIC 3R
1 8 7 6 5 4 3 2
Beam Dump system
Beam Permit loops
(stable frequency signal of 10 MHz)