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Unified Static and Runtime Verification of Object-Oriented Software - - PowerPoint PPT Presentation

Unified Static and Runtime Verification of Object-Oriented Software Wolfgang Ahrendt 1 , Mauricio Chimento 1 , Gerardo Schneider 2 , Gordon J. Pace 3 1 Chalmers University of Technology, Gothenburg, Sweden 2 University of Gothenburg, Sweden 3


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Unified Static and Runtime Verification of Object-Oriented Software

Wolfgang Ahrendt1, Mauricio Chimento1, Gerardo Schneider2, Gordon J. Pace3

1Chalmers University of Technology, Gothenburg, Sweden 2University of Gothenburg, Sweden 3University of Malta

Tallinn, August 2014

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Static Verification vs. Runtime Verification

◮ Static verification

◮ High precision ◮ Use abstractions for increased automation

but

◮ Powerful judgements hard to achieve automatically ◮ Often losing aspects of concrete system

◮ Runtime verification

◮ Full precision (including real deployment) ◮ Full automation

but

◮ Cannot judge future runs ◮ Computational overhead of monitoring the running system

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Project on Unified Static and Runtime Verification

Unified Static and Runtime Verification of Object-Oriented SW Members:

◮ Wolfgang Ahrendt,

Chalmers University of Technology

◮ Mauricio Chimento,

Chalmers University of Technology

◮ Gerardo Schneider,

University of Gothenburg

External collaborator:

◮ Gordon J. Pace,

University of Malta

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Project on Unified Static and Runtime Verification

Unified Static and Runtime Verification of Object-Oriented SW Members:

◮ Wolfgang Ahrendt,

Chalmers University of Technology

◮ Mauricio Chimento,

Chalmers University of Technology

◮ Gerardo Schneider,

University of Gothenburg

External collaborator:

◮ Gordon J. Pace,

University of Malta

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Framework for Unified Static and Runtime Verification

◮ Combine static and runtime verification

◮ Combine data centric and control centric properties ◮ Unified specification for both

◮ Use (partial) static verification results for

partial evaluation of properties

◮ Runtime verification of resulting properties ◮ Increase safety and efficiency

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Larva: A Runtime Verification Tool for Java

Larva≡ Logical Automata for Runtime Verification and Analysis

◮ targets Java applications ◮ checks control oriented properties (untimed and real-time),

specified in

◮ DATE (Dynamic Automata with Timers and Events) ◮ Lustre ◮ duration calculus

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DATE Automaton Example

start connDrop↓\c == 5\unreliable! connDrop↓\c < 5\c ++

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DATE Automaton Example

start connDrop↓\c == 5\unreliable! connDrop↓\c < 5\c ++

foreach transfer :

start bad start↓(transfer)\\ unreliable?\\ receive↓\\ end↓(transfer)\\ receive↓\\

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DATE Automaton Example

start connDrop↓\c == 5\unreliable! connDrop↓\c < 5\c ++

foreach transfer :

start bad start↓(transfer)\\ unreliable?\\ receive↓\\ end↓(transfer)\\ receive↓\\

In general:

◮ communicating automata, event-triggered transitions, timers ◮ events: method entry/exit, timer events, synchronising events

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Larva Functionality

◮ Larva input

◮ DATE automaton (or alternative format) ◮ application code

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Larva Functionality

◮ Larva input

◮ DATE automaton (or alternative format) ◮ application code

◮ Larva output

◮ monitor ◮ instrumented application code,

with triggers for monotor

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KeY

KeY is an approach and tool for the

◮ Formal specification of foremost functional properties ◮ Deductive verification, i.e., using theorem proving

  • f

◮ OO software, foremost Java and ABS

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KeY

◮ Dynamic logic (generalisation of Hoare logic) as program logic ◮ Verification = symbolic execution + induction/invariants ◮ Sequent calculus ◮ Prover is automated + interactive ◮ most elaborate KeY instance KeY-Java

◮ Java as target language ◮ Supports specification language JML

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Specification Language for Data and Control

ppDATE:

◮ Extending DATE with

pre/post-conditions, associated to the automata’s states: q

event|cond→act

− − − − − − − − − − → q′ τ(q) = { ..., {pre} method {post}, ... }

◮ Transition enabled if cond holds

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Violating Traces

ppDATE trace w ∈ (Σ × Θ)∗ is violating prefix if either

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Violating Traces

ppDATE trace w ∈ (Σ × Θ)∗ is violating prefix if either

◮ (q0, v0) w

= ⇒ (q, v) and q ∈ BadStates

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Violating Traces

ppDATE trace w ∈ (Σ × Θ)∗ is violating prefix if either

◮ (q0, v0) w

= ⇒ (q, v) and q ∈ BadStates

◮ w = w1 +

+ (m↓

id, θ1) +

+ w2 + + (m↑

id, θ2)

such that:

  • 1. (q0, v0)

w1

= ⇒ (q, v)

  • 2. τ(q) ∋ {pre} m {post}
  • 3. θ1 |

= pre

  • 4. θ2 |

= post

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Violating Traces

ppDATE trace w ∈ (Σ × Θ)∗ is violating prefix if either

◮ (q0, v0) w

= ⇒ (q, v) and q ∈ BadStates

◮ w = w1 +

+ (m↓

id, θ1) +

+ w2 + + (m↑

id, θ2)

such that:

  • 1. (q0, v0)

w1

= ⇒ (q, v)

  • 2. τ(q) ∋ {pre} m {post}
  • 3. θ1 |

= pre

  • 4. θ2 |

= post

A violating trace has a violating prefix

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High-level description of the framework

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Case study: Login Example

Scenario:

◮ At login, new users are added to set users ◮ Assume users is implemented using hashing with open

addressing

◮ Adding implemented by users.add(u,key)

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Case study: Login Example

q q′ add(o,key)↓ | users.contains(o,key) = true → •

τ(q) = { {users.size < users.capacity} add {post} } post ≡ (∃ int i; i ≥ 0 && i < users.capacity ; users.h[i] = o ; )

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Case study: Login Example - Static Analysis

◮ Translation of Hoare triple to JML

❝❧❛ss HashTable { ... /*@ ♣✉❜❧✐❝ ♥♦r♠❛❧❴❜❡❤❛✈✐♦r @ r❡q✉✐r❡s size < capacity; @ ❡♥s✉r❡s (❭❡①✐sts ✐♥t i; @ i>= 0 && i < capacity; @ h[i] == o); @ ❛ss✐❣♥❛❜❧❡ size, h[*]; ...... @*/ ♣✉❜❧✐❝ ✈♦✐❞ add (Object o, ✐♥t key) {} }

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Case study: Login Example - Static Analysis

♣✉❜❧✐❝ ✈♦✐❞ add (Object o, ✐♥t key) { ... ✐♥t i = hash(key); ✐❢ (h[i] == ♥✉❧❧) { h[i] = o; size++; } ❡❧s❡ { ✇❤✐❧❡ ... \\ store at next free slot ...} }

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Case study: Login Example - Static Analysis

◮ KeY tries to prove:

size < capacity → add(o, key) ∃ i. h[i] = o

◮ KeY will produce branches:

. . . , h[key%capacity] = null ⊢ . . . and . . . , ¬ h[key%capacity] = null ⊢ . . .

◮ first branch closes automatically, the second doesn’t

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Case study: Login Example - Partial Specification Evaluation

◮ First, for τ(q) replace {pre} add {post} by

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Case study: Login Example - Partial Specification Evaluation

◮ First, for τ(q) replace {pre} add {post} by

{pre ∧ ¬ users.h[key%capacity] = null} add {post} and {pre ∧ users.h[key%capacity] = null} add {true}

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Case study: Login Example - Partial Specification Evaluation

◮ Second, new argument is added to distinguish different calls

♣✉❜❧✐❝ ✈♦✐❞ ✐♥t ♣✉❜❧✐❝ ✈♦✐❞ ✐♥t

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Case study: Login Example - Partial Specification Evaluation

◮ Second, new argument is added to distinguish different calls

♣✉❜❧✐❝ ✈♦✐❞ add (Object o, ✐♥t key) { addAux(fid.getNewId(),o,key); } ♣✉❜❧✐❝ ✈♦✐❞ addAux (Integer id, Object o, ✐♥t key) { //same code as add had before. } {pre ∧ ¬ users.h[key%capacity] = null} addAux {post} and {pre ∧ users.h[key%capacity] = null} addAux {true}

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Case study: Login Example - Model Transformation

q

addAux↓

id|pre→sid!

− − − − − − − − − − − → q′

start

  • k

bad sid? addAux↑

id | users.opPost()

addAux↑

id | ¬users.opPost()

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Case study: Login Example - Model Transformation

q

addAux↓

id|users.contains(o, key) =true→if pre then sid!

− − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − → q′

start

  • k

bad sid? addAux↑

id | users.opPost()

addAux↑

id | ¬users.opPost()

q

addAux↓

id|¬(users.contains(o, key) = true)∧(pre∧¬ users.h[key%capacity] = null)→sid!

− − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − − → q

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Case study: Login Example - Monitor Generation

◮ Finally, Larva generates the monitors which will control the

partially verified property.

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Reference

◮ Wolfgang Ahrendt, Gordon J. Pace, Gerardo Schneider

A Unified Approach for Static and Runtime Verification: – Framework and Applications ISoLA 2012 Springer, LNCS 7609