Toward a Core Design to Distribute an Execution on a Manycore - - PowerPoint PPT Presentation

PaCT’2015, Petrozavodsk, August 31 - September 4, 2015

Toward a Core Design to Distribute an Execution on a Manycore Processor.

Bernard Goossens, David Parello, Katarzyna Porada, Djallal Rahmoune Universit´ e de Perpignan Via Domitia DALI-LIRMM

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Summary.

1

Parallelization of a C Code.

2

Automatic Hardware Parallelization.

3

Determinism.

4

Conclusion.

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Parallelization of a C Code.

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Example : a sum reduction.

long sum( long t [ ] , unsigned i n t n){ i f ( n==1) return t [ 0 ] ; i f ( n==2) return t [0]+ t [ 1 ] ; return sum( t , n /2) + sum(&( t [ n / 2 ] ) , n−n / 2 ) ; }

This code looks sequential. Let us parallelize it.

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What we do today : e.g. using pthreads.

typedef s t r u c t { unsigned long ∗p ; unsigned long i ;} ST ; void ∗sum( void ∗ s t ){ ST str1 , s t r 2 ; unsigned long s , s1 , s2 ; p t h r e a d t tid1 , t i d 2 ; i f ( ( ( ST ∗) s t)−>i >2){ s t r 1 . p=((ST ∗) s t)−>p ; s t r 1 . i =((ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid1 , NULL, sum , ( void ∗)& s t r 1 ) ; s t r 2 . p=((ST ∗) s t)−>p + ( (ST ∗) s t)−>i /2; s t r 2 . i =((ST ∗) s t)−>i − ( (ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid2 , NULL, sum , ( void ∗)& s t r 2 ) ; } e l s e i f ( ( ( ST ∗) s t)−>i ==1){s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =0;} e l s e {s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =((ST ∗) s t)−>p [ 1 ] ; } s=s1+s2 ; p t h r e a d e x i t ( ( void ∗) s ) ; }

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What we do today : e.g. using pthreads.

typedef s t r u c t { unsigned long ∗p ; unsigned long i ;} ST ; void ∗sum( void ∗ s t ){ ST str1 , s t r 2 ; unsigned long s , s1 , s2 ; p t h r e a d t tid1 , t i d 2 ; i f ( ( ( ST ∗) s t)−>i >2){ s t r 1 . p=((ST ∗) s t)−>p ; s t r 1 . i =((ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid1 , NULL, sum , ( void ∗)& s t r 1 ) ; s t r 2 . p=((ST ∗) s t)−>p + ( (ST ∗) s t)−>i /2; s t r 2 . i =((ST ∗) s t)−>i − ( (ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid2 , NULL, sum , ( void ∗)& s t r 2 ) ; } e l s e i f ( ( ( ST ∗) s t)−>i ==1){s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =0;} e l s e {s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =((ST ∗) s t)−>p [ 1 ] ; } s=s1+s2 ; p t h r e a d e x i t ( ( void ∗) s ) ; }

The code is multithreaded.

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What we do today : e.g. using pthreads.

typedef s t r u c t { unsigned long ∗p ; unsigned long i ;} ST ; void ∗sum( void ∗ s t ){ ST str1 , s t r 2 ; unsigned long s , s1 , s2 ; p t h r e a d t tid1 , t i d 2 ; i f ( ( ( ST ∗) s t)−>i >2){ s t r 1 . p=((ST ∗) s t)−>p ; s t r 1 . i =((ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid1 , NULL, sum , ( void ∗)& s t r 1 ) ; s t r 2 . p=((ST ∗) s t)−>p + ( (ST ∗) s t)−>i /2; s t r 2 . i =((ST ∗) s t)−>i − ( (ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid2 , NULL, sum , ( void ∗)& s t r 2 ) ; } e l s e i f ( ( ( ST ∗) s t)−>i ==1){s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =0;} e l s e {s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =((ST ∗) s t)−>p [ 1 ] ; } s=s1+s2 ; p t h r e a d e x i t ( ( void ∗) s ) ; }

The code is multithreaded. Threads executions are non deterministically ordered.

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What we do today : e.g. using pthreads.

typedef s t r u c t { unsigned long ∗p ; unsigned long i ;} ST ; void ∗sum( void ∗ s t ){ ST str1 , s t r 2 ; unsigned long s , s1 , s2 ; p t h r e a d t tid1 , t i d 2 ; i f ( ( ( ST ∗) s t)−>i >2){ s t r 1 . p=((ST ∗) s t)−>p ; s t r 1 . i =((ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid1 , NULL, sum , ( void ∗)& s t r 1 ) ; s t r 2 . p=((ST ∗) s t)−>p + ( (ST ∗) s t)−>i /2; s t r 2 . i =((ST ∗) s t)−>i − ( (ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid2 , NULL, sum , ( void ∗)& s t r 2 ) ; } e l s e i f ( ( ( ST ∗) s t)−>i ==1){s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =0;} e l s e {s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =((ST ∗) s t)−>p [ 1 ] ; } s=s1+s2 ; p t h r e a d e x i t ( ( void ∗) s ) ; }

The code is multithreaded. Threads executions are non deterministically ordered. Too few synchronization => the result is not deterministic.

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Synchronized threads.

typedef s t r u c t { unsigned long ∗p ; unsigned long i ;} ST ; void ∗sum( void ∗ s t ){ ST str1 , s t r 2 ; unsigned long s , s1 , s2 ; p t h r e a d t tid1 , t i d 2 ; i f ( ( ( ST ∗) s t)−>i >2){ s t r 1 . p=((ST ∗) s t)−>p ; s t r 1 . i =((ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid1 , NULL, sum , ( void ∗)& s t r 1 ) ; p t h r e a d j o i n ( tid1 , ( void ∗)&s1 ) ; s t r 2 . p=((ST ∗) s t)−>p + ( (ST ∗) s t)−>i /2; s t r 2 . i =((ST ∗) s t)−>i − ( (ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid2 , NULL, sum , ( void ∗)& s t r 2 ) ; p t h r e a d j o i n ( tid2 , ( void ∗)&s2 ) ; } e l s e i f ( ( ( ST ∗) s t)−>i ==1){s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =0;} e l s e {s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =((ST ∗) s t)−>p [ 1 ] ; } s=s1+s2 ; p t h r e a d e x i t ( ( void ∗) s ) ; }

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Synchronized threads.

typedef s t r u c t { unsigned long ∗p ; unsigned long i ;} ST ; void ∗sum( void ∗ s t ){ ST str1 , s t r 2 ; unsigned long s , s1 , s2 ; p t h r e a d t tid1 , t i d 2 ; i f ( ( ( ST ∗) s t)−>i >2){ s t r 1 . p=((ST ∗) s t)−>p ; s t r 1 . i =((ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid1 , NULL, sum , ( void ∗)& s t r 1 ) ; p t h r e a d j o i n ( tid1 , ( void ∗)&s1 ) ; s t r 2 . p=((ST ∗) s t)−>p + ( (ST ∗) s t)−>i /2; s t r 2 . i =((ST ∗) s t)−>i − ( (ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid2 , NULL, sum , ( void ∗)& s t r 2 ) ; p t h r e a d j o i n ( tid2 , ( void ∗)&s2 ) ; } e l s e i f ( ( ( ST ∗) s t)−>i ==1){s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =0;} e l s e {s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =((ST ∗) s t)−>p [ 1 ] ; } s=s1+s2 ; p t h r e a d e x i t ( ( void ∗) s ) ; }

Among all the run orderings, the synchronization keeps only good ones (i.e. computing the same result as a sequential execution).

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Synchronized threads.

typedef s t r u c t { unsigned long ∗p ; unsigned long i ;} ST ; void ∗sum( void ∗ s t ){ ST str1 , s t r 2 ; unsigned long s , s1 , s2 ; p t h r e a d t tid1 , t i d 2 ; i f ( ( ( ST ∗) s t)−>i >2){ s t r 1 . p=((ST ∗) s t)−>p ; s t r 1 . i =((ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid1 , NULL, sum , ( void ∗)& s t r 1 ) ; p t h r e a d j o i n ( tid1 , ( void ∗)&s1 ) ; s t r 2 . p=((ST ∗) s t)−>p + ( (ST ∗) s t)−>i /2; s t r 2 . i =((ST ∗) s t)−>i − ( (ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid2 , NULL, sum , ( void ∗)& s t r 2 ) ; p t h r e a d j o i n ( tid2 , ( void ∗)&s2 ) ; } e l s e i f ( ( ( ST ∗) s t)−>i ==1){s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =0;} e l s e {s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =((ST ∗) s t)−>p [ 1 ] ; } s=s1+s2 ; p t h r e a d e x i t ( ( void ∗) s ) ; }

Among all the run orderings, the synchronization keeps only good ones (i.e. computing the same result as a sequential execution). Too much synchronization => not parallel enough.

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Correctly synchronized threads.

typedef s t r u c t { unsigned long ∗p ; unsigned long i ;} ST ; void ∗sum( void ∗ s t ){ ST str1 , s t r 2 ; unsigned long s , s1 , s2 ; p t h r e a d t tid1 , t i d 2 ; i f ( ( ( ST ∗) s t)−>i >2){ s t r 1 . p=((ST ∗) s t)−>p ; s t r 1 . i =((ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid1 , NULL, sum , ( void ∗)& s t r 1 ) ; s t r 2 . p=((ST ∗) s t)−>p + ( (ST ∗) s t)−>i /2; s t r 2 . i =((ST ∗) s t)−>i − ( (ST ∗) s t)−>i /2; p t h r e a d c r e a t e (& tid2 , NULL, sum , ( void ∗)& s t r 2 ) ; p t h r e a d j o i n ( tid1 , ( void ∗)&s1 ) ; p t h r e a d j o i n ( tid2 , ( void ∗)&s2 ) ; } e l s e i f ( ( ( ST ∗) s t)−>i ==1){s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =0;} e l s e {s1 =((ST ∗) s t)−>p [ 0 ] ; s2 =((ST ∗) s t)−>p [ 1 ] ; } s=s1+s2 ; p t h r e a d e x i t ( ( void ∗) s ) ; }

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What we propose to do.

long sum( long t [ ] , unsigned i n t n){ i f ( n==1) return t [ 0 ] ; i f ( n==2) return t [0]+ t [ 1 ] ; return sum( t , n /2) + sum(&( t [ n / 2 ] ) , n−n / 2 ) ; }

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What we propose to do.

long sum( long t [ ] , unsigned i n t n){ i f ( n==1) return t [ 0 ] ; i f ( n==2) return t [0]+ t [ 1 ] ; return sum( t , n /2) + sum(&( t [ n / 2 ] ) , n−n / 2 ) ; }

This code is usually understood as sequential.

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What we propose to do.

long sum( long t [ ] , unsigned i n t n){ i f ( n==1) return t [ 0 ] ; i f ( n==2) return t [0]+ t [ 1 ] ; return sum( t , n /2) + sum(&( t [ n / 2 ] ) , n−n / 2 ) ; }

This code is usually understood as sequential. The order of instructions and expressions matches the order of execution.

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What we propose to do.

long sum( long t [ ] , unsigned i n t n){ i f ( n==1) return t [ 0 ] ; i f ( n==2) return t [0]+ t [ 1 ] ; return sum( t , n /2) + sum(&( t [ n / 2 ] ) , n−n / 2 ) ; }

This code is usually understood as sequential. The order of instructions and expressions matches the order of execution. Left half sum is computed before right half sum.

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What we propose to do : nothing.

long sum( long t [ ] , unsigned i n t n){ i f ( n==1) return t [ 0 ] ; i f ( n==2) return t [0]+ t [ 1 ] ; return sum( t , n /2) + sum(&( t [ n / 2 ] ) , n−n / 2 ) ; }

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What we propose to do : nothing.

long sum( long t [ ] , unsigned i n t n){ i f ( n==1) return t [ 0 ] ; i f ( n==2) return t [0]+ t [ 1 ] ; return sum( t , n /2) + sum(&( t [ n / 2 ] ) , n−n / 2 ) ; }

This code can be understood as parallel.

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What we propose to do : nothing.

long sum( long t [ ] , unsigned i n t n){ i f ( n==1) return t [ 0 ] ; i f ( n==2) return t [0]+ t [ 1 ] ; return sum( t , n /2) + sum(&( t [ n / 2 ] ) , n−n / 2 ) ; }

This code can be understood as parallel. Just change the compiler and the processor hardware.

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What we propose to do : nothing.

long sum( long t [ ] , unsigned i n t n){ i f ( n==1) return t [ 0 ] ; i f ( n==2) return t [0]+ t [ 1 ] ; return sum( t , n /2) + sum(&( t [ n / 2 ] ) , n−n / 2 ) ; }

This code can be understood as parallel. Just change the compiler and the processor hardware. Rename and run in parallel, hardware synchronize reader with writer.

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The compiled sum reduction (actual compiler).

sum : cmpq $2 , %r s i ; i f (n>2) goto .L1 j a .L1 movq (% r d i ) , %rax ; rax = t [ 0 ] jb .L2 ; i f (n<2) goto .L2 addq 8(% r d i ) , %rax ; rax = t [ 0 ] + t [ 1 ] .L2 : r e t ; r e t u r n ( rax ) .L1 : pushq %r s i ; save n pushq %r d i ; save t pushq %rbp ; save rbp subq $8 , %rsp ; a l l o c ( temp ) movq %r s i , %rbp ; rbp = n shrq %r s i ; n = n/2 c a l l sum ; rax = sum( t , n /2) movq %rax , 0(% rsp ) ; temp = t [ 0 ] + . . . + t [ n/2−1] l e a q (%r di , %r s i , 8) , %r d i ; t = t + n/2∗8 = &(t [ n / 2 ] ) subq %r s i , %rbp ; rbp = n − n/2 movq %rbp , %r s i ; n = n − n/2 c a l l sum ; rax = sum(&( t [ n / 2 ] ) , n−n /2) addq 0(% rsp ) , %rax ; rax = t [ 0 ] + . . . + t [ n/2−1] ; + t [ n /2] + . . . + t [ n−1] addq $8 , %rsp ; f r e e ( temp ) popq %rbp ; r e s t o r e rbp popq %r d i ; r e s t o r e t popq %r s i ; r e s t o r e n r e t ; r e t u r n ( rax )

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The compiled sum reduction (parallelizing compiler).

sum : cmpq $2 , %r s i ; i f (n>2) goto .L1 j a .L1 movq (% r d i ) , %rax ; rax = t [ 0 ] jb .L2 ; i f (n<2) goto .L2 addq 8(% r d i ) , %rax ; rax = t [ 0 ] + t [ 1 ] .L2 : endfork ; r e t u r n ( rax ) .L1 : ; at fork , rsp , rbp , r di , r s i and rbx are copied subq $8 , %rsp ; a l l o c ( temp ) movq %r s i , %rbp ; rbp = n shrq %r s i ; n = n/2 f o r k sum ; rax = sum( t , n /2) movq %rax , 0(% rsp ) ; temp = t [ 0 ] + . . . + t [ n/2−1] l e a q (%r di , %r s i , 8) , %r d i ; t = t + n/2∗8 = &(t [ n / 2 ] ) subq %r s i , %rbp ; rbp = n − n/2 movq %rbp , %r s i ; n = n − n/2 f o r k sum ; rax = sum(&( t [ n / 2 ] ) , n−n /2) addq 0(% rsp ) , %rax ; rax = t [ 0 ] + . . . + t [ n/2−1] ; + t [ n /2] + . . . + t [ n−1] addq $8 , %rsp ; f r e e ( temp ) endfork ; r e t u r n ( rax )

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The parallel run steps.

Fetch the trace as fastly as possible, relying on fork machine instruction.

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The parallel run steps.

Fetch the trace as fastly as possible, relying on fork machine instruction. Rename destinations and match readers with writers from trace total order.

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The parallel run steps.

Fetch the trace as fastly as possible, relying on fork machine instruction. Rename destinations and match readers with writers from trace total order. Run in partial order of reader to writer dependencies.

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The parallel run steps.

Fetch the trace as fastly as possible, relying on fork machine instruction. Rename destinations and match readers with writers from trace total order. Run in partial order of reader to writer dependencies. Discard intermediate storing resources when overwritten or freed (dynamic regions : stack, heap).

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The parallel run steps.

Fetch the trace as fastly as possible, relying on fork machine instruction. Rename destinations and match readers with writers from trace total order. Run in partial order of reader to writer dependencies. Discard intermediate storing resources when overwritten or freed (dynamic regions : stack, heap). Dump final results to physical memory (single writer => trivial coherency).

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Automatic Hardware Parallelization.

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Fetching = Reading IP-addressed code and computing the control flow.

Fork :

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Fetching = Reading IP-addressed code and computing the control flow.

Fork : 2 sections : current IP continues to callee + new IP resumes after callee return.

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Fetching = Reading IP-addressed code and computing the control flow.

Fork : 2 sections : current IP continues to callee + new IP resumes after callee return. Registers rsp, rbp, rdi, rsi, rbx are copied from current section to new section.

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Fetching = Reading IP-addressed code and computing the control flow.

Fork : 2 sections : current IP continues to callee + new IP resumes after callee return. Registers rsp, rbp, rdi, rsi, rbx are copied from current section to new section. 2 copies of the stack : callee stack + resume stack.

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Fetching = Reading IP-addressed code and computing the control flow.

Fork : 2 sections : current IP continues to callee + new IP resumes after callee return. Registers rsp, rbp, rdi, rsi, rbx are copied from current section to new section. 2 copies of the stack : callee stack + resume stack. End of section = endfork.

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Synchronizing reader with writer.

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Synchronizing reader with writer.

Reader and writer in the same section : Tomasulo’s algorithm (ooo execution).

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Synchronizing reader with writer.

Reader and writer in the same section : Tomasulo’s algorithm (ooo execution). Reading and writing a register in different sections : reader sends import value request to predecessor section when known, writer sends value to reader when computed.

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Synchronizing reader with writer.

Reader and writer in the same section : Tomasulo’s algorithm (ooo execution). Reading and writing a register in different sections : reader sends import value request to predecessor section when known, writer sends value to reader when computed. Reading and writing a memory location : reader imports value from same address writer, following predecessor links.

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Synchronizing reader with writer.

Reader and writer in the same section : Tomasulo’s algorithm (ooo execution). Reading and writing a register in different sections : reader sends import value request to predecessor section when known, writer sends value to reader when computed. Reading and writing a memory location : reader imports value from same address writer, following predecessor links. Reading and writing a rsp-based stack location : reader imports value from same address writer, following level predecessor links.

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Retiring = Exporting results.

A computed value is exported to (if not overwritten, freed or consumed by a successor) :

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Retiring = Exporting results.

A computed value is exported to (if not overwritten, freed or consumed by a successor) : The next section (register, stack, heap).

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Retiring = Exporting results.

A computed value is exported to (if not overwritten, freed or consumed by a successor) : The next section (register, stack, heap). The next section at the same level (rsp-based stack).

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Retiring = Exporting results.

A computed value is exported to (if not overwritten, freed or consumed by a successor) : The next section (register, stack, heap). The next section at the same level (rsp-based stack). The previous section (static memory).

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rsi = 8, rdi = t, rsp = SP, sum(8,t)

2 3 4 5 6 addq 0(%rsp), %rax addq $8, %rsp endfork cmpq $2, %rsi ja .L1 1 movq (%rdi), %rax jb .L2 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi subq $8, %rsp fork sum c0 1 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi fork sum sum:

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One section, block 4 fetched+decoded, block 1 executed.

3 5 6 addq 0(%rsp), %rax addq $8, %rsp endfork cmpq $2, %rsi ja .L1 jb .L2 2 1 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi 4 movq (%rdi), %rax subq $8, %rsp fork sum c0 4 1 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi fork sum sum:

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Second section, rbp=n,rsi=n/2,rdi=t copied, blk1 retired.

3 4 6 addq 0(%rsp), %rax addq $8, %rsp endfork cmpq $2, %rsi ja .L1 jb .L2 2 1 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi movq (%rdi), %rax subq $8, %rsp c0 c3 4 1 1 5 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi 5 fork sum fork sum sum:

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Third section, blk5 renames rax (when predecessor known).

3 4 5 6 rax cmpq $2, %rsi ja .L1 jb .L2 .L1: 4 2 1 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi movq (%rdi), %rax subq $8, %rsp c0 c3 c6 4 1 4 5 1 6 5 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi addq 0(%rsp), %rax addq $8, %rsp endfork fork sum fork sum sum:

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Blk6 renames rax ( ?) and 0(rsp) (level predecessor).

3 6 addq 0(%rsp), %rax addq $8, %rsp endfork 5 rDS: cmpq $2, %rsi ja .L1 1 jb .L2 2 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi 4 movq (%rdi), %rax subq $8, %rsp c0 c1 c3 c6 1 4 1 5 5 1 4 6 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi rax 0(rsp) fork sum fork sum

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B5,c3 renames rax, predecessor sends rax when computed.

3 rDS: cmpq $2, %rsi ja .L1 1 jb .L2 2 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi 4 movq (%rdi), %rax subq $8, %rsp c0 c1 c2 c3 c4 c6 4 1 2 5 1 6 5 1 4 1 5 6 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi 5 addq 0(%rsp), %rax addq $8, %rsp endfork 6 fork sum fork sum

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B4,c3 retires : nothing to export, ooo retirement.

4 movq (%rdi), %rax jb .L2 2 5 rDS: cmpq $2, %rsi ja .L1 1 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi 3 subq $8, %rsp c0 c1 c2 c3 c4 c5 c6 5 1 2 6 5 4 1 2 5 1 6 6 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi addq 0(%rsp), %rax addq $8, %rsp endfork 6 1 2 3 fork sum fork sum

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B3,c0 computes rax, value sent to renamer b5,c1.

4 5 6 addq 0(%rsp), %rax addq $8, %rsp endfork rDS: cmpq $2, %rsi ja .L1 1 movq (%rdi), %rax jb .L2 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi 2 3 subq $8, %rsp c0 c1 c2 c3 c4 c5 c6 5 1 2 3 6 5 1 2 3 5 1 2 6 6 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi 2 3 fork sum fork sum

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B5+b3,c1 send rax and 0(rsp) to renamer b6,c2.

2 4 5 6 addq 0(%rsp), %rax addq $8, %rsp endfork rDS: cmpq $2, %rsi ja .L1 1 movq (%rdi), %rax jb .L2 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi 3 subq $8, %rsp c0 c1 c2 c3 c4 c5 c6 6 5 2 3 5 1 2 3 6 6 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi 5 2 3 3 fork sum fork sum

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B6,c2 sends half sum rax to b5,c3.

2 4 5 6 addq 0(%rsp), %rax addq $8, %rsp endfork rDS: cmpq $2, %rsi ja .L1 1 movq (%rdi), %rax jb .L2 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi 3 subq $8, %rsp c0 c1 c2 c3 c4 c5 c6 6 5 3 5 3 6 6 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi 5 3 fork sum fork sum 2

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B5,c3 sends stack saved half sum 0(rsp) to b6,c6.

2 4 5 6 addq 0(%rsp), %rax addq $8, %rsp endfork rDS: cmpq $2, %rsi ja .L1 1 movq (%rdi), %rax jb .L2 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi 3 subq $8, %rsp c0 c1 c2 c3 c4 c5 c6 6 5 5 3 6 6 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi fork sum fork sum

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B6,c6 computes final sum into rax.

2 4 5 6 addq 0(%rsp), %rax addq $8, %rsp endfork rDS: cmpq $2, %rsi ja .L1 1 movq (%rdi), %rax jb .L2 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi 3 subq $8, %rsp c0 c1 c2 c3 c4 c5 c6 5 6 6 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi fork sum fork sum

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B6,c6 sends rax to renamer (main).

2 4 5 6 addq 0(%rsp), %rax addq $8, %rsp endfork rDS: cmpq $2, %rsi ja .L1 1 movq (%rdi), %rax jb .L2 addq 8(%rdi), %rax endfork .L2: .L1: movq %rsi, %rbp shrq %rsi 3 subq $8, %rsp c0 c1 c2 c3 c4 c5 c6 6 movq %rax, 0(%rsp) leaq (%rdi, %rsi, 8), %rdi subq %rsi, %rbp movq %rbp, %rsi fork sum fork sum

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Determinism.

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Hardware parallelization ensures determinism.

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Hardware parallelization ensures determinism.

The parallel fetch builds a total order of the trace which associates each reader to the closest writer.

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Hardware parallelization ensures determinism.

The parallel fetch builds a total order of the trace which associates each reader to the closest writer. The renaming builds a deterministic partial order (reader related to writer and synchronized).

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Hardware parallelization ensures determinism.

The parallel fetch builds a total order of the trace which associates each reader to the closest writer. The renaming builds a deterministic partial order (reader related to writer and synchronized). The reader/writer synchronization and the partial order run ensure determinism.

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Hardware parallelization ensures determinism.

The parallel fetch builds a total order of the trace which associates each reader to the closest writer. The renaming builds a deterministic partial order (reader related to writer and synchronized). The reader/writer synchronization and the partial order run ensure determinism. This is to be compared to pthread non determinism and complex software synchronization.

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Conclusion.

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Conclusion : what message is being sent out ?

Total order of execution : sequential + deterministic.

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Conclusion : what message is being sent out ?

Total order of execution : sequential + deterministic. Partial order + OS scheduling : parallel + non deterministic.

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Conclusion : what message is being sent out ?

Total order of execution : sequential + deterministic. Partial order + OS scheduling : parallel + non deterministic. Total order of trace + dataflow order of execution : parallel + deterministic.

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Conclusion : what message is being sent out ?

Total order of execution : sequential + deterministic. Partial order + OS scheduling : parallel + non deterministic. Total order of trace + dataflow order of execution : parallel + deterministic. http ://perso.numericable.fr/bernard.goossens/i want a fork.html

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