Thermal stability of SiC JFETs in conduction mode EPE 2013 Rmy O - - PowerPoint PPT Presentation

Thermal stability of SiC JFETs in conduction mode

EPE 2013 Rémy OUAIDA, Cyril BUTTAY, Raphaël RIVA, Dominique BERGOGNE, Christophe RAYNAUD, Florent MOREL, Bruno ALLARD

Laboratoire Ampère, Lyon, France

4/9/13

Thermal stability of SiC JFETs 1/21

Outline Introduction JFET Characterization Experimental study of the runaway condition Conclusions

Thermal stability of SiC JFETs 2/21

Plan Introduction JFET Characterization Experimental study of the runaway condition Conclusions

Thermal stability of SiC JFETs 3/21

Maximum operating temperature – Theory

0°C 500°C 1000°C 1500°C 2000°C 2500°C 3000°C 10 V 100 V 1 kV 10 kV 100 kV 1 MV Junction temperature Breakdown voltage Silicon 3C−SiC 6H−SiC 4H−SiC 2H−GaN Diamond

◮ Silicon operating temp is intrisically limited at high voltages. ◮ Wide-bandgap semiconducors (inc. SiC) go much higher

Thermal stability of SiC JFETs 4/21

Maximum operating temperature – Practically

Example: SiCED JFET:

material

• max. temp.

cause Semiconductor SiC 2730° C sublimation backside metal Ag 962° C melting point Top metallization Al 660° C melting point

• second. passivation

polyimide 500-620° C decomposition

◮ Most of these limitations can be overcome by the die

manufacturer (e.g topside metal)

◮ Other will depend on the packaging technology

◮ Case material (ceramic, plastic. . . ) ◮ Solder alloys, etc.

➜ TJ > 300° C is possible

Thermal stability of SiC JFETs 5/21

Maximum operating temperature – Practically

Example: SiCED JFET:

material

• max. temp.

cause Semiconductor SiC 2730° C sublimation backside metal Ag 962° C melting point Top metallization Al 660° C melting point

• second. passivation

polyimide 500-620° C decomposition

◮ Most of these limitations can be overcome by the die

manufacturer (e.g topside metal)

◮ Other will depend on the packaging technology

◮ Case material (ceramic, plastic. . . ) ◮ Solder alloys, etc.

➜ TJ > 300° C is possible

Thermal stability of SiC JFETs 5/21

Maximum operating temperature – Practically

Example: SiCED JFET:

material

• max. temp.

cause Semiconductor SiC 2730° C sublimation backside metal Ag 962° C melting point Top metallization Al 660° C melting point

• second. passivation

polyimide 500-620° C decomposition

◮ Most of these limitations can be overcome by the die

manufacturer (e.g topside metal)

◮ Other will depend on the packaging technology

◮ Case material (ceramic, plastic. . . ) ◮ Solder alloys, etc.

➜ TJ > 300° C is possible

Thermal stability of SiC JFETs 5/21

Maximum operating temperature – Practically

Example: SiCED JFET:

material

• max. temp.

cause Semiconductor SiC 2730° C sublimation backside metal Ag 962° C melting point Top metallization Al 660° C melting point

• second. passivation

polyimide 500-620° C decomposition

◮ Most of these limitations can be overcome by the die

manufacturer (e.g topside metal)

◮ Other will depend on the packaging technology

◮ Case material (ceramic, plastic. . . ) ◮ Solder alloys, etc.

➜ TJ > 300° C is possible

Thermal stability of SiC JFETs 5/21

Reduced cooling

Take advantage of the high junction temp. capability of SiC devices to save on thermal management

Source: APEI [1]. Converter operating at 150° C ambient, with 250° C junction temperature, using passive cooling.

◮ Operation in milder ambient ◮ Reduction in

◮ Volume, weight ◮ Complexity (passive vs

active)

◮ Many applications:

◮ Transports ◮ Low-maintenance, high-rel. Thermal stability of SiC JFETs 6/21

Reduced cooling

Take advantage of the high junction temp. capability of SiC devices to save on thermal management

Source: APEI [1]. Converter operating at 150° C ambient, with 250° C junction temperature, using passive cooling.

◮ Operation in milder ambient ◮ Reduction in

◮ Volume, weight ◮ Complexity (passive vs

active)

◮ Many applications:

◮ Transports ◮ Low-maintenance, high-rel.

➜ Thermal runaway issues must be considered

Thermal stability of SiC JFETs 6/21

Thermal Run-away mechanism – Principle

◮ an imaginary device ◮ its associated cooling system ◮ in region A, the device

dissipates more than the cooling system can extract

◮ in region B, the device

dissipates less than the cooling system can extract

◮ two equilibrium points: one

stable and one unstable

◮ above the unstable point,

run-away occurs

Thermal stability of SiC JFETs 7/21

Thermal Run-away mechanism – Principle

◮ an imaginary device ◮ its associated cooling system ◮ in region A, the device

dissipates more than the cooling system can extract

◮ in region B, the device

dissipates less than the cooling system can extract

◮ two equilibrium points: one

stable and one unstable

◮ above the unstable point,

run-away occurs

Thermal stability of SiC JFETs 7/21

Thermal Run-away mechanism – Principle

◮ an imaginary device ◮ its associated cooling system ◮ in region A, the device

dissipates more than the cooling system can extract

◮ in region B, the device

dissipates less than the cooling system can extract

◮ two equilibrium points: one

stable and one unstable

◮ above the unstable point,

run-away occurs

Thermal stability of SiC JFETs 7/21

Thermal Run-away mechanism – Principle

◮ an imaginary device ◮ its associated cooling system ◮ in region A, the device

dissipates more than the cooling system can extract

◮ in region B, the device

dissipates less than the cooling system can extract

◮ two equilibrium points: one

stable and one unstable

◮ above the unstable point,

run-away occurs

Thermal stability of SiC JFETs 7/21

Thermal Run-away mechanism – Principle

◮ an imaginary device ◮ its associated cooling system ◮ in region A, the device

dissipates more than the cooling system can extract

◮ in region B, the device

dissipates less than the cooling system can extract

◮ two equilibrium points: one

stable and one unstable

◮ above the unstable point,

run-away occurs

Thermal stability of SiC JFETs 7/21

Thermal Run-away mechanism – examples

Always stable

Thermal stability of SiC JFETs 8/21

Thermal Run-away mechanism – examples

Always stable Always unstable

Thermal stability of SiC JFETs 8/21

Thermal Run-away mechanism – examples

Always stable Always unstable Becomming unstable with ambient temperature rise

Thermal stability of SiC JFETs 8/21

Aim of the study

◮ JFETs can operate at high temperature ◮ We might take advantage of this to size the cooling system

down

Thermal stability of SiC JFETs 9/21

Aim of the study

◮ JFETs can operate at high temperature ◮ We might take advantage of this to size the cooling system

down

Thermal stability of SiC JFETs 9/21

Aim of the study

◮ JFETs can operate at high temperature ◮ We might take advantage of this to size the cooling system

down

Is there a risk of thermal runaway of JFETs?

Thermal stability of SiC JFETs 9/21

Plan Introduction JFET Characterization Experimental study of the runaway condition Conclusions

Thermal stability of SiC JFETs 10/21

Test configuration

◮ High temperature test system

◮ Silver-sintered interconnects ◮ Ceramic substrate (DBC) ◮ Copper-kapton leadframe

◮ DUT: 500 mΩ SiC JFET from SiCED ◮ characterization:

◮ Tektronix 371A curve tracer ◮ Thermonics T2500-E conditionner Thermal stability of SiC JFETs 11/21

Test configuration

◮ High temperature test system

◮ Silver-sintered interconnects ◮ Ceramic substrate (DBC) ◮ Copper-kapton leadframe

◮ DUT: 500 mΩ SiC JFET from SiCED ◮ characterization:

◮ Tektronix 371A curve tracer ◮ Thermonics T2500-E conditionner Thermal stability of SiC JFETs 11/21

Test configuration

◮ High temperature test system

◮ Silver-sintered interconnects ◮ Ceramic substrate (DBC) ◮ Copper-kapton leadframe

◮ DUT: 500 mΩ SiC JFET from SiCED ◮ characterization:

◮ Tektronix 371A curve tracer ◮ Thermonics T2500-E conditionner

Source: Thermonics T-2500SE Datasheet

Thermal stability of SiC JFETs 11/21

Static Characterization over a wide temperature range

2 4 6 8 10 12

Forward voltage [V]

2 4 6 8 10 12

Forward current [A]

• 50 ◦ C
• 10 ◦ C

30 ◦ C 70 ◦ C 110 ◦ C 150 ◦ C 190 ◦ C 230 ◦ C 270 ◦ C 300 ◦ C

VGS = 0 V, i.e. device fully-on

Thermal stability of SiC JFETs 12/21

Power dissipation as a function of the junction temp.

50 50 100 150 200 250 300

Temperature [C]

20 40 60 80 100 120 140

Dissipated power [W]

2.0 A 4.0 A 6.0 A 8.0 A 10.0 A

Thermal stability of SiC JFETs 13/21

Power dissipation as a function of the junction temp.

50 50 100 150 200 250 300

Temperature [C]

20 40 60 80 100 120 140

Dissipated power [W] 1K/W 2K/W 4 . 5 K / W 8K/W

2.0 A 4.0 A 6.0 A 8.0 A 10.0 A

Thermal stability of SiC JFETs 13/21

Power dissipation as a function of the junction temp.

50 50 100 150 200 250 300

Temperature [C]

20 40 60 80 100 120 140

Dissipated power [W] 1K/W 2K/W 4 . 5 K / W 8K/W

2.0 A 4.0 A 6.0 A 8.0 A 10.0 A

Thermal stability of SiC JFETs 13/21

Power dissipation as a function of the junction temp.

50 50 100 150 200 250 300

Temperature [C]

20 40 60 80 100 120 140

Dissipated power [W] 1K/W 2K/W 4.5K/W 8K/W

2.0 A 4.0 A 6.0 A 8.0 A 10.0 A

Thermal stability of SiC JFETs 13/21

Conclusion on static characterization

◮ Conduction losses of the JFET (P) increase with the

temperature

◮ This increase can be faster than the increase in cooling

capability (Q) ∂P ∂Tj > ∂Q ∂Tj

Thermal stability of SiC JFETs 14/21

Conclusion on static characterization

◮ Conduction losses of the JFET (P) increase with the

temperature

◮ This increase can be faster than the increase in cooling

capability (Q) ∂P ∂Tj > ∂Q ∂Tj

➜ Thermal runaway seems possible

Thermal stability of SiC JFETs 14/21

Plan Introduction JFET Characterization Experimental study of the runaway condition Conclusions

Thermal stability of SiC JFETs 15/21

Test Bench

V Temperature Conditionner T

Controlled-temperature air flow Equivalent Thermal Resistance

Adiabatic enclosure I

DUT

◮ Temperature at point T controlled using the conditionner ◮ Separate control of RTh and TA ◮ DUT in conduction mode, supplied by a current source ◮ Here, RTh = 4.5 K/W, TA = 13, 75, or 135°

C

Thermal stability of SiC JFETs 16/21

Test Bench

Interconnections (leadframe) Pressure system JFET on ceramic substrate Fixed-Rth section (with thermocouple monitoring) Heatsink (forced convection with controlled air temperature)

◮ Temperature at point T controlled using the conditionner ◮ Separate control of RTh and TA ◮ DUT in conduction mode, supplied by a current source ◮ Here, RTh = 4.5 K/W, TA = 13, 75, or 135°

C

Thermal stability of SiC JFETs 16/21

Thermal Runaway – 1

1 2 3 4 5 Forward current [A] 5 10 15 20 25 30 35 40 Dissipated power [W]

simulation measurement 13 ◦ C measurement 75 ◦ C measurement 135 ◦ C

“Simulation”: losses due to the theoretical increase in RDSon with Tj: RDSon(Tj) = RDSon(300 K) Tj

300

2.4

Thermal stability of SiC JFETs 17/21

Thermal Runaway – 2

100 150 200 250 300 350 time [s] 30 40 50 60 70 80 power [W]

current changed from 3.65 to 3.7 A Run-away

1 2 3 4 5 Forward current [A] 5 10 15 20 25 30 35 40 Dissipated power [W] TA =135 ◦ C

Power supply limit: 100 W, Tj ≈ 135 + 4.5 × 100 = 585◦C The JFET survived the test.

Thermal stability of SiC JFETs 18/21

Plan Introduction JFET Characterization Experimental study of the runaway condition Conclusions

Thermal stability of SiC JFETs 19/21

Conclusions

High temperature operation

◮ JFETs can operate at very high Tj (> 300°

C)

◮ Newer generations have higher current capability

Thermal runaway

◮ They are sensitive to thermal runaway in conduction

◮ Their RDSon increases strongly with temperature

◮ Their cooling system should be carefully designed

◮ Providing RTh is low enough, JFETs are stable

◮ slow phenomenon, can be avoided by driver protection

◮ Much like the desat protection for IGBTs, to ensure graceful

response to unexpected transients

Thermal stability of SiC JFETs 20/21

Thank you for your attention,

cyril.buttay@insa-lyon.fr

Thermal stability of SiC JFETs 21/21

Properties of some semiconductors

“Classical” wide-bandgap Si GaAs 3C- SiC 6H- SiC 4H- SiC GaN

Diamond

Bandgap Energy Eg (eV) 1,12 1,4 2,3 2,9 3,2 3,39 5,6

• Elec. mobility

µn (cm2.V−1.s−1) 1450 8500 1000 415 950 2000 4000 Hole mobility µp (cm2.V−1.s−1) 450 400 45 90 115 350 3800 Critical elec. field EC (V.cm−1) 3.105 4.105 2.106 2,5.106 3.106 5.106 107 Saturation velocity vsat (cm.s−1) 107 2.107 2,5.107 2.107 2.107 2.107 3.107 Termal cond. λ (W.cm−1.K−1) 1,3 0,54 5 5 5 1,3 20

Thermal stability of SiC JFETs 1/3

Maximum allowed RTh for 2.4×2.4 mm2 JFET

5 10 15 20

Forward current [A]

10

• 1

10 10

1

10

2

Maximum thermal resistance [K/W]

Tamb=-70 C Tamb=25 C Tamb=150 C

Thermal stability of SiC JFETs 2/3

References

• J. M. Hornberger, E. Cilio, R. M. Schupbach, A. B. Lostetter, and H. A. Mantooth, “A High-Temperature

Multichip Power Module (MCPM) Inverter utilizing Silicon Carbide (SiC) and Silicon on Insulator (SOI) Electronics,” in Proceedings of the 37th Power Electronics Specialists Conference (PESC). Jeju, Korea: IEEE, Jun. 2006, pp. 9–15. Thermal stability of SiC JFETs 3/3