The Applications of SNAP2 National ASIC Design Engineering Center, - - PowerPoint PPT Presentation

1

The Applications of SNAP2

National ASIC Design Engineering Center, Institute

• f Automation, Chinese Academy of Sciences

2017-08

presenter: Lin Shu

• n behalf of: Jie Hao, Jingbin Mu, Yafang Song, Liangtian Zhao, Chengcheng Li,

Qiuxiang Fan, Hui Feng, Zhifeng Lv, Leichen Zhou, Sai Ma, Meiting Zhao, Dou Wang, Yuting Li email: jie.hao@ia.ac.cn lin.shu@ia.ac.cn

Overall

ADC FPGA GPU/CPU sever

Switch Storage

Spectral Line Pulsar Search Correlator Beamformer FRB

FAST CSRH

FAST

FAST

FPGA+GPU

Spectral Line Modes

 high bandwidth mode

2000 MHz max bandwidth Output channels: 64K, channel bandwidth ~30.5176kHz Polarizations: full stokes Output bits: 32 bits fixed File format: SDFITS

narrow bandwidth mode

Sample rate: 4000 MS/s selected 31.25 MHz, configurable mixer Output channels: 64K, channel bandwidth ~0.488kHz Polarizations: full stokes Integration: < 50s Output bits: 32 float File format: SDFITS

Result

H1

Pulsar Search Modes

incoherent (offline de-dispersion)

2000 MHz max bandwidth output channels: 2K, 4K, 8K, 16K, 32K, 64K channels Dump rate: ~65us @ 2k, ~2ms @ 64k, bandwidth on 10 GbE port ~1 Gbps Output bits: 8 bits File format: PSRFITS

800 MHz max bandwidth 2048 x 0.39MHz channels 256,1k, 2k, 4k, 8k profile bin DM < 1200 File format: PSRFITS Output bits: 32 float

coherent de-dispersion mode

FRB Search Modes (in progress)

Direct storage

ADC SNAP2 FLASH array

Memory Board Memory Board

• Capacity
• 72 pieces of eMMC NAND flash,

each 64GB

• Total capacity 4TB
• Bandwidth
• Write ： 1.2 GB/s
• Read ： 1.6 GB/s
• Interface(each FPGA)
• 8xGTX, QSFP connector, 4GB/s

(Rapid IO)

• 10/100/1000 Ethernet
• 8xGTX, ZD connector, 4GB/s

(Rapid IO)

• 10 LVDS, ZD connector
• Process
• Xilinx XC7K325T-2FFG900 FPGA
• DDR3, 256 MB, 32bit/1066MHz
• Capacity
• 72 pieces of eMMC NAND flash,

each 64GB

• Total capacity 4TB
• Bandwidth
• Write ： 1.2 GB/s
• Read ： 1.6 GB/s
• Interface(each FPGA)
• 8xGTX, QSFP connector, 4GB/s

(Rapid IO)

• 10/100/1000 Ethernet
• 8xGTX, ZD connector, 4GB/s

(Rapid IO)

• 10 LVDS, ZD connector
• Process
• Xilinx XC7K325T-2FFG900 FPGA
• DDR3, 256 MB, 32bit/1066MHz

Storage System Storage System

• 6U standard size, including one switch

board, one interface board, the number

• f memory board is based on the

requirement of storage capacity

• Read/Write bandwidth 4GB/s, through

the parallel

• peration
• f

multiple storage devices, a higher bandwidth storage system can be constructed

• Supported Features ： Bad block

management, Wear-leveling, Garbage collection, ECC

• T

emperature ： -25 ~ 85 °C

• 6U standard size, including one switch

board, one interface board, the number

• f memory board is based on the

requirement of storage capacity

• Read/Write bandwidth 4GB/s, through

the parallel

• peration
• f

multiple storage devices, a higher bandwidth storage system can be constructed

• Supported Features ： Bad block

management, Wear-leveling, Garbage collection, ECC

• T

emperature ： -25 ~ 85 °C

CSRH in Inner Mongolia

CSRH: Chinese Spectral Radio Heliograph

system requirement

 40 antennas, dual polarization, 1~80 MHz Sample rate: 8 bits @ 200 MHz FFT channels: 2048, channel bandwidth: < 100 KHz Output channels: Configurable Integration: 10~100ms two modes: beamforming mode and full correlation mode, working at the same time

System Design

Wide-band spectrometer

• 6 Gsps, 3 GHz bandwidth
• two interleaved 3 Gsps ADC
• two modes
• full bandwidth mode
• zoom mode
• utput (in frequency domain)
• maximum value
• mid-value
• 10% value
• 90% value
• 6 Gsps, 3 GHz bandwidth
• two interleaved 3 Gsps ADC
• two modes
• full bandwidth mode
• zoom mode
• utput (in frequency domain)
• maximum value
• mid-value
• 10% value
• 90% value

2

Thank you!