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T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 1 ' $ TERNARY AND QUA TERNARY LA TTICE DIA GRAMS F OR LINEARL Y-INDEPENDENT LOGIC, MUL TIPLE-V ALUED LOGIC, AND ANALOG SYNTHESIS Ma rek A. P

slide-1
SLIDE 1 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 1 ' & $ % TERNARY AND QUA TERNARY LA TTICE DIA GRAMS F OR LINEARL Y-INDEPENDENT LOGIC, MUL TIPLE-V ALUED LOGIC, AND ANALOG SYNTHESIS Ma rek A. P erk
  • wski,
Edmund Pierzchal a, and Rolf Drechsler +, Dept. Electr. Engn., P
  • rtland
State Universit y , P
  • rtland,
USA + Inst. Comp. Sci., Alb ert-Ludwigs-Universit y , F reiburg in Breisgau, Germany
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SLIDE 2 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 2 ' & $ % PLAN
  • Intro
duction
  • la
y
  • ut-driven
synthesis.
  • Expansions
and expansion no des.
  • Max-t
yp e versus LI-t yp e lattices.
  • Bina
ry LI-t yp e lattices.
  • T
erna ry lattices.
  • Quaterna
ry lattices.
  • Buttery
algo rithm to nd b est expansions.
  • Applicati
  • ns
to F uzzy and analog circuits.
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SLIDE 3 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 3 ' & $ % LA TTICE DIA GRAMS.
  • Review
Bina ry Lattice Diagrams.
  • Intro
duce T erna ry and Quaterna ry Lattice Diagrams.
  • Such
diagrams a re applica bl e to submicron design and designing new ne-grain digital, analog and mixed FPGAs.
  • Diagrams
p resented here expand the ideas
  • f
Lattice diagrams (P erk
  • wski,
Jesk e) and Linea rly Indep endent (LI) Logic (P erk
  • wski,
F alk
  • wski,
Beyl, Sa rabi).
slide-4
SLIDE 4 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 4 ' & $ % THE GO AL OF LA TTICE DIA GRAMS
  • The
goal
  • f
Lattice Diagrams is la y
  • ut-dri
ven logic synthesis in cellula r structures with mostly lo cal connections.
  • The
concept
  • f
a lattice diagram involves three comp
  • nents:
(1) expansion
  • f
a function (the function co rresp
  • nds
to the initial no de in the lattice), which creates several successo r no des
  • f
this no de, (2) joining
  • f
several (not necessa rily tautologic) no des
  • f
a tree level to a single no de, which is in a sense a reverse
  • p
eration to the expansion, (3) a regula r geometry to which the no des a re mapp ed, this geometry guides which no des
  • f
the level a re to b e joined.
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SLIDE 5 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 5 ' & $ % REGULAR LA YOUT GEOMETRY FROM LA TTICE DIA GRAMS
  • In
a regula r la y
  • ut,
every cell is connected to 4 (bina ry lattice), 6 (terna ry lattice)
  • r
8 (quaterna ry lattice) neighb
  • rs
and to a numb er
  • f
vertical, ho rizontal and diagonal buses.
  • Cell
with n inputs and m
  • utputs
is said to have n x m connectivit y pattern.
  • T
erna ry lattices have 3 inputs and 3
  • utputs
from a no de.
  • Quaterna
ry lattices have 4x4 connectivit y pattern, it means, 4 inputs and 4
  • utputs
from a no de.
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SLIDE 6 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 6 ' & $ % REGULAR LA YOUT GEOMETRY FROM LA TTICE DIA GRAMS. I I
  • Expansions
a re: Shannon, Davio, nonsingula r, fuzzy and analog.
  • F
  • r
each t yp e
  • f
expansion
  • n
no des, there exists t yp e
  • f
joining
  • p
eration fo r no des.
  • The
p ro cedure
  • f
building the lattice diagram, i.e. the la y
  • ut
  • f
a function, consist in expanding and joining no des in levels iteratively fo r (rep eated) va riables until all no de functions b ecome va riables
  • r
constants.
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SLIDE 7 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 7 ' & $ % EXP ANSION NODES F OR BINARY, MUL TI-V ALUED AND FUZZY FUNCTIONS

MIN MIN d MIN MIN a b literal1

(h)

MAX d literal c a MIN

3

literal2 a b2 4 4 d c bb2 b3 a 4

(a)

d a b c a b c c d d b a

(b) (c)

MAX d a b literal1 literal2 c a

(d)

3 d b c a 3 b2 3

(e)

a

(g) 2

2 4 b3 b2 b c 4

(f)

S

d b c

1

a

1

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SLIDE 8 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 8 ' & $ % SHANNON EXP ANSION NODES.

(a)

d a b c

S

d b c

1

a

1

  • Shannon
(S) expansion: a multiplexer, and a general notation
  • f
a 2x2 cell in a Lattice.
  • When
input a is inverted, the so-called Reversed Shannon (S') expansion is executed, which means that the role
  • f
inputs b and c is reversed.
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SLIDE 9 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 9 ' & $ % D A VIO EXP ANSION NODES.

a b c c d d b a

(b) (c)

a

  • (b)
sho ws the p
  • sitive
Davio expansion no de (pD), and (c) the negative Davio no de (nD).
  • Such
no des a re used in P
  • sitive-P
  • la
rit y , Fixed-P
  • la
rit y , Kroneck er and Pseudo-Kroneck e r Lattices and their generalizations.
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SLIDE 10 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 10 ' & $ % MUL TI-V ALUED EXP ANSION NODES.

3 d b c a 3 b2 3

(e)

4 4 d c bb2 b3 a 4

(f)

d a

(g) 2

2 4 b3 b2 b c 4

  • (e)
p resents Shannon no de fo r terna ry logic, (f ) Shannon no de fo r quaterna ry logic, and (g) realization
  • f
the quaterna ry Shannon no de from (f ) in bina ry logic.
  • Tw
  • bina
ry signals routed together simulate a 4-valued signal.
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SLIDE 11 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 11 ' & $ % FUZZY LOGIC EXP ANSION NODES.

MIN MIN MAX d a b literal1 literal2 c a

(d)

MIN MIN a b literal1

(h)

MAX d literal c a MIN

3

literal2 a b2

(d) DFL (Disjoint F uzzy Logic) with 2 literals. (h) DFL with 3 literals.
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SLIDE 12 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 12 ' & $ % EXISTENCE OF JOINING OPERA TIONS AS A CONDITION OF BUILDING LA TTICES
  • W
e denote max-t yp e
  • p
erations b y +, min-t yp e
  • p
erations b y .
  • It
can b e
  • bserved,
that a fundamen tal condition fo r existence
  • f
joining
  • p
erations is that in the underlying algeb raic structure any t w
  • literals
a re disjoint.
  • In
bina ry , this p rop ert y reduces to a
  • a
= 0.
  • Existence
  • f
joining
  • p
erations is the condition
  • f
b eing able to create lattice diagrams.
  • This
condition leads to bina ry and multiple-valu ed (MV) Max-t yp e lattices.
  • The
p rinciple
  • f
  • p
eration
  • f
bina ry max-t yp e lattices is that any path in a diagram that includes x and
  • x
cancells.
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SLIDE 13 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 13 ' & $ % EXISTENCE OF JOINING OPERA TIONS F OR LI-TYPE LOGIC
  • EX
OR function is: a
  • b
= a
  • b
+
  • a
  • b.
  • Thus,
a
  • a
= a
  • a
+
  • a
a = 0.
  • This
leads to Linea rly-Indep en den t t yp e (LI) lattices.
  • The
p rinciple
  • f
  • p
eration
  • f
LI-t yp e lattices is that any t w
  • identical
paths to the ro
  • t
in the diagram cancel
  • ne
another (x
  • x
= 0).
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SLIDE 14 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 14 ' & $ % COMP ARISON OF THREE TYPES OF LA TTICES F OR TW O-OUTPUT EX OR/XNOR FUNCTION

xnor(a,b,c,d) exor(a,b,c,d) exor xnor(a,b,c,d) 1 1 1 exor xnor(a,b,c,d) 1 a b c d a

(b) (a) (c)

s s s s s s s s s s s s s s 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 s s’ s s’ s s’ s s’

b c d

pD pD pD pD pD

a b c d a

(a) 2x2 lattice with S, (b) 3x3 lattice with S and S', (c) 2x2 lattice with pD and pD'.
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SLIDE 15 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 15 ' & $ % CREA TION OF A POSITIVE D A VIO LEVEL IN A LA TTICE

g2 2

join(g , h )

g + a h a g + h 2 2 h + g2 g (a) 2 h h 1 a h g0 1 a g h a 1 a 1 for h cancel for g cancel (b) f h g a 1 a 1 a 1 b 1 b 1 b d 1 c 1 1 a c

pD pD pD pD pD pD nD nD nD

pD’ pD’

1 (c)

Figure 1: (a) t w
  • expanded
no des b efo re joining, (b) la y er
  • f
lattice after joining
  • p
eration
  • n
no des g 2 and h , (c) Fixed-P
  • la
rit y RM Lattice fo r functions f ; g ; h.
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SLIDE 16 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 16 ' & $ % BINARY LI-TYPE LA TTICES F OR SYMMETRIC AND NON-SYMMETRIC FUNCTIONS
  • When
a function is symmetric, va riables a re not rep eated.
  • Figures
clea rly demonstrate an advantage
  • f
having higher connection patterns and mo re general expansion t yp es.
  • Predictabil
i t y and equalit y
  • f
dela ys should b e app reciated in all lattices.
  • But
what ab
  • ut
lattice realization
  • f
non-symmetric functions? { P
  • la
rized Pseudo-Kroneck er symmetries (Druck er/P erk
  • wski)
a re much mo re general than kno wn symmetries
  • f
functions. Using them, mo re functions can b e realized without rep eating va riables. { functions that do not have the P
  • la
rized Pseudo-Kroneck er symmetries can b e still realized in lattices with rep eated va riables (P erk
  • wski/Jesk
e).
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SLIDE 17 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 17 ' & $ % JOINING OPERA TION F OR LI-TYPE LA TTICES

g2 2

join(g , h )

g + a h a g + h 2 2 h + g2 g (a) 2 h h 1 a h g0 1 a g h a 1 a 1 for h cancel for g cancel (b)

Figure 2: (a) t w
  • expanded
no des b efo re joining, (b) la y er
  • f
lattice after joining
  • p
eration
  • n
no des g 2 and h .
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SLIDE 18 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 18 ' & $ % JOINING OPERA TION F OR LI-TYPE LA TTICES. I I
  • Although
sho wn here
  • nly
fo r pD no des and an
  • rdered
lattice, the same p rincipl e is used fo r mo re complex expansions and lattice diagrams
  • f
the LI t yp e.
  • The
joining rule is: g 2 J O I N h = ag 2
  • h
, which means that no des rep resenting functions g 2 = g
  • g
1 and h a re joined together to create a new no de with function ag 2
  • h
.
  • The
co rrection terms ah and ag 2 a re p ropagated to left and right, resp ectively .
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SLIDE 19 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 19 ' & $ % CREA TING A DIA GRAM BY EXP ANDING AND JOINING OPERA TIONS. I
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SLIDE 20 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 20 ' & $ %

f h g a 1 a 1 a 1 b 1 b 1 b d 1 c 1 1 a c

pD pD pD pD pD pD nD nD nD

pD’ pD’

1 (c)

Figure 3: Fixed-P
  • la
rit y RM Lattice fo r functions f ; g ; h.
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SLIDE 21 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 21 ' & $ % CREA TING A DIA GRAM BY EXP ANDING AND JOINING OPERA TIONS. I I
  • Fixed-P
  • la
rit y Reed-Muller Lattice Diagram (expansions pD and nD) fo r functions: f = a
  • ab
  • cd,
g = 1
  • b
  • cd
  • a
  • cd
  • abd
  • ab
  • cd,
h =
  • cd
  • bd
  • ab
  • c
d
  • a
  • c
d
  • abd
  • ad.
  • V
a riable a is rep eated
  • nce
mo re in the b
  • ttom
level
  • f
the lattice.
  • The
expansion in this level is pD', which means, a reversed pD, that is a pD expansion with reversed role
  • f
data inputs.
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SLIDE 22 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 22 ' & $ % CREA TING A DIA GRAM BY EXP ANDING AND JOINING OPERA TIONS. I I I
  • In
some t yp es
  • f
expansions the p ropagation
  • f
co rrection terms is
  • nly
to right,
  • r
  • nly
to left.
  • In
some
  • ther
expansions, esp eciall y the non-canonical
  • nes,
mo re p
  • w
erful co rrections t yp es a re created, and the algo rithm selects the co rrection rule evaluated as the
  • ne
leading to the simplest next level
  • f
the lattice.
  • Selecting
the
  • rder
  • f
(rep eated) va riables and the expansion t yp e in each no de a re the most imp
  • rtant
and dicult p roblems to b e solved.
slide-23
SLIDE 23 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 23 ' & $ % TERNARY AND QUA TERNARY LA TTICES.
  • Bina
ry Shannon expansions can b e easily generalize d to 3-valued and 4-valued Shannon expansions.
  • Lattices
fo r them require 3 inputs and 3
  • utputs
from a no de, and 4 inputs and 4
  • utputs
from a no de, resp ectively .
  • 3-
and 4- valued counterpa rts
  • f
S' a re created.
  • T
erna ry and quaterna ry lattices can b e created using co rresp
  • ndin
g \expansion" and \join" fo rmulas.
  • This
w a y , P
  • st-t
yp e and Galois-t yp e lattices a re created in an unifo rm w a y .
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SLIDE 24 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 24 ' & $ % TERNARY AND QUA TERNARY LA TTICES. I I
  • Ho
w ever, the t w
  • kinds
  • f
p rincipl es,
  • f
creating the expansion and
  • f
the joining rules, remain the same: disjoint literals fo r max-t yp e lattices, and a + (a) = term cancelli ng fo r LI lattices (which generalizes the rule a
  • a
=
  • f
Galois Field (2) given ea rlier).
  • The
lattices have advantages esp eciall y fo r (nea rly) symmetric functions and strongly unsp eci ed functions that can b e completed to symmetric functions.
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SLIDE 25 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 25 ' & $ % REGULAR LA YOUT
  • By
a regula r la y
  • ut
w e understand a la y
  • ut
  • f
indentical cells that connect b y abutting.
  • By
a complete la y
  • ut
structure w e understand connection pattern b et w een cells, that allo ws to realize every symmetric function without rep eating va riables.
  • It
can b e p roved that in a 2x2 lattice every bina ry symmetric function can b e realized without va riable rep etiti
  • ns,
and with connections b et w een cells having the same length.
  • Thus,
lattice la y
  • ut
fo r bina ry logic is regula r and complete.
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SLIDE 26 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 26 ' & $ % WHEN REGULAR LA YOUT CAN BE CREA TED.
  • In
contrast to bina ry functions, symmetric terna ry functions cannot b e realized in regula r 2-dimensional 3x3 lattices.
  • Although
w e created 3x3 lattices that can realize every symmetric terna ry function without va riable rep etitions, it is not p
  • ssible
to nd regula r la y
  • uts
fo r realizin g them.
  • Thus
the cells distances in subsequent levels gro w.
  • Hop
efully , it is not a p ractical p roblem fo r small functions realized in MV logic, but the b eautiful simplicit y
  • f
bina ry realizati
  • ns
do es not longer exist.
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SLIDE 27 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 27 ' & $ % WHEN REGULAR LA YOUT CAN BE CREA TED. I I
  • Thus,
if mapp ed to a 2-dimensiona l space, the terna ry lattices a re either regula r and not complete,
  • r
complete but not regula r.
  • It
is still p
  • ssible
to
  • btain
regula r and complete 3x3 lattices assuming la y
  • ut
  • f
cells in a three-dimen sion al space.
  • But
it is not p
  • ssible
to create regula r la y
  • ut
fo r 4x4 lattices, b ecause
  • ur
Universe is 3-dimensional .
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SLIDE 28 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 28 ' & $ % QUA TERNARY LI LA TTICES.
  • As
sho wn b efo re, pairs
  • f
bina ry va riables co rresp
  • nd
to 4-valued va riable s.
  • Although
here w e discuss LI lattices fo r
  • nly
t w
  • va
riables in each va riable blo ck, all concepts and algo rithms can b e expanded to va riable blo cks
  • f
a rbitra ry size.
  • Next
Figure sho ws an example
  • f
a circuit
  • btained
b y substituting no des
  • f
a quaterna ry LI lattice diagram with their circuits.
  • The
LI Lattice diagrams fo r pairs
  • f
va riables a re created simila rly to lattices fo r single va riables.
  • No
des a re no w fo r pairs
  • f
va riables, and nonsingula r expansions
  • f
LI logic a re used.
  • Every
no de has at most 4 inputs.
slide-29
SLIDE 29 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 29 ' & $ % LI PSEUDO-KRONECKER DECISION LA TTICE DIA GRAM F OR V ARIABLE BLOCKS fa,bg,fc,dg,fe,fg to function H ; G.
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SLIDE 30 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 30 ' & $ %

1 0 1 1 1 1 1 1 1 1 1

G H b a b a c d c d e f e f f e

slide-31
SLIDE 31 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 31 ' & $ % QUA TERNARY LI LA TTICES. I I
  • Instead
selecting among
  • nly
three expansions, S, pD and nD, the choice in every level
  • f
no des is among all 840 nonsingula r expansions in exact algo rithm.
  • This
is the maximum numb er
  • f
nonsingula r expansions fo r a pair
  • f
va riables
  • Or,
some subset
  • f
the expansions.
  • The
same t yp e
  • f
expansion is selected in Kroneck er t yp e lattices.
  • V
a rious expansions a re selected in no des
  • f
Pseudo-Kroneck er t yp e lattices.
  • The
joinings a re based
  • n
the same p rinciple s as b efo re.
slide-32
SLIDE 32 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 32 ' & $ % QUA TERNARY LI LA TTICES. I I I
  • The
lattices fo r all single
  • utputs
  • f
a multi-outpu t function a re created together, level-b y-level from their ro
  • t
no des (outputs).
  • In
every level, the p
  • ssible
expansions a re evaluated based
  • n
the complexit y
  • f
the next level (lo
  • k-ahead
strategy).
  • The
b est expansion found b y the P
  • la
rit y Selecting Algo rithm fo r a level is next applied to all no des (Kroneck er t yp es) from the level
  • f
the multi-output diagram.
  • In
Pseudo t yp e
  • f
lattices, the expansion decision fo r each no de is done sepa rately .
  • The
algo rithm b elo w is used fo r small functions, app ro ximate algo rithms fo r la rger functions.
slide-33
SLIDE 33 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 33 ' & $ % BUTTERFL Y DIA GRAMS TO FIND BEST LI EXP ANSIONS
  • Buttery
diagrams in Reed-Muller Logic allo w to create all xed p
  • la
rit y expansions b y transfo rming from p
  • la
rit y to p
  • la
rit y .
  • They
do this just b y incremen tal exo ring
  • f
some terms from the fo rms.
  • This
w a y , all fo rms
  • f
certain t yp e a re systematicall y created without even creating their expansion matrices M and without calculati ng their inverse matrices M 1 .
  • The
concept
  • f
Gra y-co de
  • rdering
  • f
all Generali zed Reed-Muller p
  • la
rities w as applied to nd the exact minimum GRM fo rm (Zeng/P erk
  • wski).
  • Simila
r ideas p rop
  • sed
here fo r the LI fo rms.
slide-34
SLIDE 34 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 34 ' & $ % PROPERTIES F OR BUTTERFL Y DIA GRAM ALGORITHMS Prop ert y 1. The follo wing rule BR holds f 1 (x 1 ; x 2 )S F 2 (x 3 ; :::; x n )f 3 (x 1 ; x 2 )S F 4 (x 3 ; :::; x n ) = [f 1 (x 1 ; x 2 )
  • f
3 (x 1 ; x 2 )]S F 2 (x 3 ; :::; x n ) f 3 (x 1 ; x 2 )[S F 2 (x 3 ; :::; x n )
  • S
F 4 (x 3 ; :::; x n )] where f 1 (x 1 ; x 2 ) and f 3 (x 1 ; x 2 ) a re a rbitra ry LI functions, and S F 2 (x 3 ; :::; x n ) and S F 4 (x 3 ; :::; x n ) a re the co rresp
  • ndi
ng to them data input (DI) functions.
slide-35
SLIDE 35 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 35 ' & $ % PROPERTIES F OR BUTTERFL Y DIA GRAM ALGORITHMS. I I Prop ert y 2. Any nonsingula r expansion can b e
  • btained
b y a rep eated applicati
  • n
  • f
Rule BR to pairs
  • f
functions [ f 1 (x 1 ; x 2 ); S F 2 (x 3 ; ::; x n )],[f 3 (x 1 ; x 2 ); S F 4 (x 3 ; ::; x n )]. This w a y , rule B R describ es simultaneous EX OR-ing
  • f
columns in matrix M and co rresp
  • ndin
g columns in M 1 . But ho w to select the pairs
  • f
functions? Prop ert y 3. In matrix M , as w ell as in matrix M 1 , any column can b e replaced b y a linea r combination
  • f
itself with
  • ther
columns. Thus, any p
  • la
rit y expansion can b e
  • btained
b y a rep eated applicati
  • n
  • f
the basic rule B R to certain selected columns.
slide-36
SLIDE 36 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 36 ' & $ % BUTTERFL Y DIA GRAMS TO FIND BEST EXP ANSIONS
  • In
general, there is no recursive w a y to dene the universal Buttery-lik e diagram fo r a rbitra ry LI matrix.
  • A
sp ecic diagram can b e
  • nce
created fo r a set
  • f
va riables with certain numb er
  • f
elements and fo r any set
  • f
expansion p
  • la
rities.
  • This
diagram can b e sto red in memo ry , and next used fo r evaluations fo r each pa rticula r function
  • f
the resp ective numb er
  • f
va riables.
  • W
e will call this a "p re-computed" Buttery diagram.
slide-37
SLIDE 37 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 37 ' & $ % BUTTERFL Y DIA GRAMS TO FIND BEST EXP ANSIONS

x y v z a b

  • 1

0 1 x y z a b

  • 1

0 1 x y a b

  • 1

0 1 x a b

  • 1

0 1 x a b

  • 1

0 1 x a b

  • 1

0 1 x a b

  • 1

0 1 z+v y+z z+v x+y y+z z+v y+v y+z x+y x+z y+v x+z y+v y x+y

Figure 4: First pa rt
  • f
the Buttery Diagram to nd the b est nonsingula r expansion b y creating expansions fo r all LI functions
  • f
a,b.
slide-38
SLIDE 38 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 38 ' & $ % LA TTICES F OR FUZZY LOGIC.
  • Because
in standa rd fuzzy logic a
  • a
6= 0, and a
  • a
= a
  • a
+
  • aa
6= 0, b
  • th
the Max-t yp e and LI metho ds w
  • uld
not w
  • rk
fo r it.
  • One
can dene a negation-less fuzzy logic, which w e call a Disjoint F uzzy Logic (DFL), in which all fuzzy logic axioms b esides those related to negation a re satised, and negation is simulated b y using sp ecial t yp e
  • f
literals.
  • In
DFL logic, any t w
  • literals
l iter al i ; l iter al j can have a rbitra ry shap es, but must b e disjoint; fo r any value
  • f
x 2 [0; 1] l iter al i (x)
  • l
iter al j (x) = 0.
slide-39
SLIDE 39 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 39 ' & $ % LA TTICES F OR FUZZY LOGIC.

MIN MIN MAX d a b literal1 literal2 c a

(d)

MIN MIN a b literal1

(h)

MAX d literal c a MIN

3

literal2 a b2

  • The
literals l iter al 1 ; l iter al 2 ; l iter al 3 a re all mutually disjoint.
  • DFL
expansions a re realized in terna ry fuzzy lattices, simila r to MV terna ry lattices.
  • Because
  • f
disjoint literals, joining
  • p
eration can b e alw a ys p erfo rmed.
slide-40
SLIDE 40 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 40 ' & $ % REALIZA TION OF ANALOG FUNCTIONS

const a c d

(a)

d const const2 1 a2 a1 b c h1 h2 h3 h4 h5 b

(b)

c d a b c d sin(y) cos(y) y

(c) (d)

slide-41
SLIDE 41 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 41 ' & $ % REALIZA TION OF ANALOG FUNCTIONS I.

b const a c d c d a b c d sin(y) cos(y) y expansion node for analog logic Piecewise-linear expansion in a 2x2 - type regular layout

  • f a continuous function

(a) (b)

slide-42
SLIDE 42 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 42 ' & $ % REALIZA TION OF ANALOG FUNCTIONS I I.

d const const2 1 a2 a1 b c h1 h2 h3 h4 h5

(a) (b)

expansion cell for sorting applications Regular 2x2 layout for max(h1,h2,h3,...h5)

slide-43
SLIDE 43 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 43 ' & $ % ITERA TIVE CIRCUITS AND ANALOG FPGAS.
  • Hiera
rchical design
  • f
iterative
  • ne-
and t w
  • -dimensional
structures.
  • Cellula
r connections
  • f
logic blo cks, each blo ck realized as a multi-output lattice.
  • Created
also fo r discrete circuits with memo ry .
  • Analog
counterpa rts use sample-hold analog memo ries, which pla y the same role as ip-ops in discrete technologies.
  • Lattices
allo w thus the realization
  • f
cellula r memo ry-less functions, nite state machines, and innite state machines; realized in analog, bina ry ,
  • r
multivalued logic.
  • Digital
and analog: lters, pip elined image p ro cesso rs,
  • r
systolic p ro cesso rs.
  • An
elliptic ladder lter w as mapp ed to this structure (Pierzchala).
  • Rank
and median lters, cellula r neural nets, equation solvers, and (analog and digital) image p ro cessing circuits.
slide-44
SLIDE 44 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 44 ' & $ % CONCLUSION.
  • Presented
metho ds allo w fo r la y
  • ut-driven
synthesis app roaches to bina ry , multivalued , linea rly-in dep e nd ent, Galois, fuzzy , analog and mixed functions.
  • They
unify many kno wn expansions, decision diagrams, regula r la y
  • ut
geometries and FPGA/FP AA structures.
  • Of
sp ecial interest to va rious new technologies based
  • n
regula rit y and lo cali t y
  • f
connections: { deep sub-micron technology , { bina ry and MV pass-transisto r designs, { quantum logic devices, { OT A circuits, { new ne grain digital and analog FPGAs.
slide-45
SLIDE 45 T erna ry and Quaterna ry Lattice Diagrams Singapur, Septemb er 1997 45 ' & $ % CONCLUSION. (cont.)
  • T
erna ry and quaterna ry lattices fo r bina ry , multi-valued, DFL and analog logic.
  • Such
diagrams a re the most general lattice diagrams intro duced so fa r.
  • Algo
rithm fo r creation
  • f
quaterna ry lattices fo r bina ry LI logic.
  • Metho
ds applicabl e to completely sp ecied and incompletely sp ecied functions; single-, and multi-output.
  • Kroneck
er-lik e and Pseudo-Kroneck er-li k e generaliz ati
  • ns.