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System a em arch chitect ecture f e for n net etwork-attach ached ed Research | Zurich FPGAs i in t the C e Clou oud u using p par artial al r rec econfj fjguration Burkhard Ringlein, Francois Abel, Alexander Ditter, Beat


  1. System a em arch chitect ecture f e for n net etwork-attach ached ed Research | Zurich FPGAs i in t the C e Clou oud u using p par artial al r rec econfj fjguration Burkhard Ringlein, Francois Abel, Alexander Ditter, Beat Weiss, Christoph Hagleitner, and Dietmar Fey Standalone network-attached FPGAs over TCP/IP/Ethernet 10 Tb/s full-duplex Plentiful/DC 1024/rack 64/chassis 1

  2. System Architecture: Requirements and Proposal Research | Zurich 1) Standa dalon one FPGAs must control themselves 2) Abstract the physical FPGA 3) No disclose of sources required 4) Guarantee integr grity of the DC 5) Build clusters dynamically 6) Reuse / Integrate with existing DC services 2

  3. System Architecture: Requirements and Proposal Research | Zurich 1) Standa dalon one FPGAs must control 1) TCP/IP and d REST themselves (Representational State Transfer) ● have proven to 2) Abstract the physical FPGA o sca cale ● are hardw 3) No disclose of sources required rdware re agn gnos ostic 4) Guarantee integr grity of the DC 2) FPGA must reconfjgure itself 5) Build clusters dynamically 3) Separation of privileges and 6) Reuse / Integrate with existing network interfaces within the FPGA DC services → using partial reconfjguration via a RESTful API based on TCP/IP 3

  4. System Architecture: Divide and Conquer Research | Zurich • Three le levels ls of of Ma Management: t: 1) Data Center 2) per Sled/Chassis 2 3 3) per FPGA 1 • Results ts: 1) < 2% of a Xilinx Kintex 2) deployment time independent of cluster/application size 3) single application bit-stream for “zillions” of FPGA nodes 4) fast confjguration 4

  5. System Architecture: Divide and Conquer Research | Zurich • Three le levels ls of of Ma Management: t: 1) Data Center 2) per Sled/Chassis 2 3 3) per FPGA 1 • Results ts: 1) < 2% of a Xilinx Kintex 2) deployment time independent of cluster/application size 3) single application bit-stream for “zillions” of FPGA nodes 4) fast confjguration Thank you… ngl@zurich.ibm.com zurich.ibm.com/cci/cloudFPGA/ 5

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