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Progr gram amming ing Rec econf nfigur igurable able Devi vices ces via FPGA Regio vi ions ns & De Devi vice e Tre ree Ove verl rlays A User View Benchmark on a Declarative FPGA Reconfiguration Framework Stefan Wiehler

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Progr gram amming ing Rec econf nfigur igurable able Devi vices ces vi via FPGA Regio ions ns & De Devi vice e Tre ree Ove verl rlays

A User View Benchmark on a Declarative FPGA Reconfiguration Framework

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Stefan Wiehler (University of Ulm, Missing Link Electronics) Ulrich Langenbach (Beuth University of Applied Sciences Berlin, Missing Link Electronics)

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SLIDE 2

Example le System

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Linux x FPGA Framewor ework k Architecture ecture

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A Declar clarat ative ive FPGA A Reconf nfigur gurat ation

  • n Fram

amewor ework

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Reconf nfigu igurati ation

  • n Per

Perform

  • rmance

nce

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Configuration Latency Deconfiguration Latency

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Scheduling ling Latency y - Profil iling ing Resu sult lts

  • Measurement of example system (AES accelerator)
  • Measured latencies via ftrace function entry and exit timestamps
  • Bitstream Size: 5.9 MiB
  • Overall latency: ≈135 ms

ms

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20 63 16 1 Runtime [%] Load Bitstream Partial Reconfiguration Load Platform Driver Rest incl. Framework

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SLIDE 7

Defic icienci iencies es / F Futu ture re Work

  • Scheduler / Governor
  • User space interface for device tree

manipulation

  • Shields & modular embedded systems
  • Reconfigurable systems (FPGA)
  • FPGA vendor tools to support DTO generation

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Additional Components Performance Bottlenecks

  • Firmware caching
  • FPGA reconfiguration interface

(Scope of FPGA vendors)

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SLIDE 8

Simplif ifies ies Reconf nfigur gurabl able e Computi uting ng on Linux x Systems

  • Linux DTO & FPGA Framework enables efficient operation of reconfigurable

computing systems

  • Supports scheduling time slices in fractions of minutes
  • > 10 s between reconfigurations ≈2 % overhead in our case

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  • Enables efficient development of heterogeneous systems on MPSoC-FPGAs
  • Reboot free debug and test cycles for fast turnaround times
  • Both static and runtime reconfigurable systems profit
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Referenc erences es

1. Moritz Fischer, “FPGA Manager & Device Tree Overlays”, FOSDEM 2016, Brussels, 30-Jan-2016. 2. Alan Tull, “Reprogrammable Hardware under Linux”, Embedded Linux Conference Europe 2015, Dublin, 05-Okt-2015. 3. Pantelis Antoniou, “Transactional Device Tree & Overlays: Making Reconfigurable Hardware Work”, Embedded Linux Conference 2015, San Jose, 23-Mar-2015.

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