synthesis of embedded control software
play

Synthesis of Embedded Control Software Ufuk Topcu Caltech, Control - PowerPoint PPT Presentation

Synthesis of Embedded Control Software Ufuk Topcu Caltech, Control and Dynamical Systems Papers, slides, notes, software tools at www.cds.caltech.edu/~UTopcu CMACS, CMU, Fall 2010 Synthesis of Embedded Control Software Joint work with N.


  1. Synthesis of Embedded Control Software Ufuk Topcu Caltech, Control and Dynamical Systems Papers, slides, notes, software tools at www.cds.caltech.edu/~UTopcu CMACS, CMU, Fall 2010

  2. Synthesis of Embedded Control Software Joint work with N. Wongpiromsarn, N. Ozay, and R. Murray (MIT, Singapore) (Caltech) (Caltech) Outline Setup Receding horizon temporal logic synthesis Vehicle management systems Distributed synthesis 5 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  3. How to automatically design control protocols, that… Handle mixture of discrete and continuous decision-making Account for both high-level specs and low-level dynamics Ensure proper response to external events in real-time, ... with “correctness certificates”? 6 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  4. How to “automatically” design control protocols that… • Handle mixture of discrete and continuous decision-making • Account for both high-level specs and low-level dynamics • Ensure proper response to external events in real-time Autonomous driving Vehicle management Active surveillance federated IMA VMS Applications � Active � Landing � Hydraulics � Engine � Diagnostics � Deicing � Gear � Controls � Controls � Flight � Electric System � Fuel � Lighting � AFGS � Controller � Management � Management � Control � Shared Services � ARINC 653 Ports � Electric Power Services � ARINC 653 Partitioned OS � I/O Drivers � Network Drivers � Distributed I/O Services � Compute � Platform � & I/O � Figure – regenerated from a similar figure by W. P. Kinahan, Sikorsky Aircraft � Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu 7

  5. Inputs & Outputs Alice’s planning stack A A F F LANE 1.1 LANE 1.1 B B E E LANE 1.2 LANE 1.2 D D C C S S S S Mission Planner Specifications & Requirements LANE 2.1 LANE 2.2 LANE 2.1 LANE 2.2 Traffic Planner Path Planner Path Follower Environment model Actuation Interface System Vehicle model Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu 8

  6. Specifying behavior with linear temporal logic (LTL) Extends propositional logic with temporal operators + ∧ (and), ∨ (or), ⋄ (eventually), � (always), → (implies), ! (not), U (until). • Allows to reason about infinite sequences of states -state: snapshot of values of all variables (environment+system) • Specifications (formulas) describe sets of allowable behavior - safety specs: what actions are allowed - fairness: when an action can be taken (e.g., infinitely often) • No strict notion of time. Just ordering of events. 9 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  7. Compose to specify interesting behavior (~ response) p → ⋄ q ≡ p implies eventually q (~ progress) � ⋄ p ≡ always eventually p (~ stability) ⋄ � p ≡ eventually always p (~ precedence) p → q U r ≡ p implies q until r Desired properties: C3 C4 C5 • Visit C5 infinitely often. • Whenever a park signal is received go to C0. C0 C1 C2 Environment assumption: • Park signal is not received infinitely often. � ⋄ (!park) → { � ⋄ ( s ∈ C 5) ∧ � (park → ⋄ ( s ∈ C 0) ) } 10 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  8. Sample Specifications Traffic rules: • No collision • Stay in travel lane unless blocked • Go through an intersection only when it is clear Environment Assumptions: • No road blockage • Limited sensing range • Detect obstacles before too late • Obstacles close to the car do not disappear • Each intersection is clear infinitely often Goals: Go through ‘s • Vicinity of ‘s is obstacle-free infinitely often infinitely often 11 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  9. Temporal Logic Planning Construct a control protocol such that the system satisfies ϕ init ∧ ϕ env → ϕ safety ∧ ϕ goal Game interpretation: A game between system & environment 12 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  10. Discrete Synthesis states = (system, environment) all executions satisfy the spec’s Finite Discrete Transition Planner Discrete System Synthesis Specifications Tool Piterman, Pnueli, Sa’ar ϕ init ∧ ϕ env → ϕ safety ∧ ϕ goal ∧ ϕ env → ϕ safety ∧ ϕ goal 13 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  11. Discrete Synthesis states = (system, environment) all executions satisfy the spec’s Finite Discrete Transition Planner Discrete System Synthesis Specifications Tool Piterman, Pnueli, Sa’ar ϕ init ∧ ϕ env → ϕ safety ∧ ϕ goal ∧ ϕ env → ϕ safety ∧ ϕ goal Mission Planner Traffic Planner Most systems of interest feature Path Planner interaction between Path Follower • physical components Actuation • computing, communication,... Interface Vehicle 13 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  12. Incorporating Continuous Dynamics System model: ξ ( t + 1) = f ( ξ ( t ) , w ( t ) , u ( t )) • bounded control authority u ∈ U • external disturbances w ∈ W + modeling uncertainties abstraction Finite System Transition Model Discrete Discrete System Planner Synthesis Tool Specifications ϕ init ∧ ϕ env → ϕ safety ∧ ϕ goal init ∧ ϕ env → ϕ safety ∧ ϕ goal 14 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  13. Finite abstraction System Transition Model Discrete Discrete System Planner Synthesis Tool Specifications ϕ init ∧ ϕ env → ϕ safety ∧ ϕ goal Starting with a proposition preserving partition: Control-oriented tools to account for ... Finite-time reachability to determine discrete transitions WTM@CDC09 & WTM@AAAI, SS,10 15 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  14. { Existence of continuous controllers that implement the discrete transition (projection) Construct control actions (finite-time optimal control problem) Finite abstraction System Transition Model Discrete Discrete System Planner Synthesis Tool Specifications ϕ init ∧ ϕ env → ϕ safety ∧ ϕ goal Starting with a proposition preserving partition: Control-oriented tools to account for ... Finite-time reachability to determine discrete transitions Refine the partition to increase the number of valid discrete transitions WTM@CDC09 & WTM@AAAI, SS,10 15 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  15. Hierarchical Control Architecture Discrete planner ∆ { ensures that env Trajectory the spec is satisfied Planner + noise Plant { u Continuous Continuous controller s d Controller δ u implements the discrete plan Local Control (handles low-level “Receding Horizon Control” dynamics & constraints) When put together, guaranteed to work “correctly.” 16 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  16. More on the Discrete Synthesis Tool... Discrete Synthesis Tool ϕ init ∧ ϕ env → ϕ safety ∧ ϕ goal Piterman, Pnueli, Sa’ar ∧ ϕ env → ϕ safety ∧ ϕ goal • General LTL synthesis is hard • An expressive subclass (GR(1) games) takes “polynomial” effort m n � � � ⋄ p e � ⋄ q s i → j i =1 j =1 • Based on fixpoint computations & BDDs • Implemented in JTLV 17 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  17. More on the Discrete Synthesis Tool... Discrete Synthesis Tool ϕ init ∧ ϕ env → ϕ safety ∧ ϕ goal Piterman, Pnueli, Sa’ar ∧ ϕ env → ϕ safety ∧ ϕ goal : r o t c a f g n i t i m i l A synthesis procedure considers • General LTL synthesis is hard all possible environment behaviors • An expressive subclass (GR(1) games) takes “polynomial” effort m n � � � ⋄ p e � ⋄ q s i → j i =1 j =1 • Based on fixpoint computations & BDDs • Implemented in JTLV 17 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  18. UC CS CMU campus map ME 18 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  19. Recall: Receding Horizon Control (RHC) RHC can destabilize if not done properly! Receding horizon, temporal logic planning? 19 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

  20. Receding Horizon for LTL Synthesis W 0 ν 10 ( ϕ init ∧ ϕ env ) → ( ϕ safety ∧ ϕ goal ) W 1 ν 9 ν 8 partial order covering system states ( {W j } , � ϕ g ) W 2 A mapping such that F ν 7 & F ( W j ) ≺ ϕ g W j for j � = 0 F ( W 0 ) = W 0 , a propositional formula such that W 3 Φ ν 6 For each j, there exists a short-horizon controller that realizes ν 5 ( ξ ∈ W j ) ∧ Φ ∧ ϕ j � � env W 4 � � ϕ j safety ∧ � ⋄ ( ξ ∈ F ( W j ) ∧ � Φ ν 4 ν 3 → ν 2 ν 1 Theorem: When the system state is in , W j implement the corresponding short-horizon controller. Then, the “global” spec’s hold. WTM@HSCC10 WTM@ITAC(s) 20 Synthesis of Embedded Control Software www.cds.caltech.edu/~UTopcu

Download Presentation
Download Policy: The content available on the website is offered to you 'AS IS' for your personal information and use only. It cannot be commercialized, licensed, or distributed on other websites without prior consent from the author. To download a presentation, simply click this link. If you encounter any difficulties during the download process, it's possible that the publisher has removed the file from their server.

Recommend


More recommend