Switch-Less Frequency-Domain Multiplexing of GFET Sensors and - - PowerPoint PPT Presentation

Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Switch-Less Frequency-Domain Multiplexing

• f GFET Sensors and Low-Power CMOS

Frontend for 1024-Channel µECOG

J.Cisneros-Fernández1, M.Dei1, L.Terés1,2 and F.Serra-Graells1,2

jose.cisneros@imb-cnm.csic.es

1Instituto de Microelectrónica de Barcelona, IMB-CNM(CSIC), Spain 2Universitat Autònoma de Barcelona, Spain

May 2019

Intro FDM ROIC CMOS Chip Conclusions

Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Introduction 1 Frequency-Domain Multiplexing of GFETs 2 1024-Ch ROIC Architecture 3 Test Chip in 0.18µm CMOS Technology 5 Conclusions 6

Intro FDM ROIC CMOS Chip Conclusions

Low-Power CMOS Circuits 4

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells Intro FDM ROIC CMOS Chip Conclusions

Introduction 1 Frequency-Domain Multiplexing of GFETs 2 1024-Ch ROIC Architecture 3 Test Chip in 0.18µm CMOS Technology 5 Conclusions 6 Low-Power CMOS Circuits 4

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Introduction

Low-power ICs with massive number

• f channels needed for neural recording

Liquid-gate Graphene field-effect transistors (GFETs) are good candidates for micro-electrocorticography (µECOG)

Intro FDM ROIC CMOS Chip Conclusions

Hybrid (sensors+IC) device preferred for large sensing area, low cost, CMOS compatibility and flexible substrates = sensor multiplexing Monolithical high density in small areas, high fabrication cost and low scalability.

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells IntroFDM ROIC CMOS Chip Conclusions

Introduction 1 Frequency-Domain Multiplexing of GFETs 2 1024-Ch ROIC Architecture 3 Test Chip in 0.18µm CMOS Technology 5 Conclusions 6 Low-Power CMOS Circuits 4

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Frequency-Domain Multiplexing

IntroFDM ROIC CMOS Chip Conclusions

Row current read-out Column voltage carriers

CMOS frontend

Switch-less and artifact-free

Row current read-out Column digital multiplexer

CMOS frontend

Classic Time-Domain Multiplexing Frequency-Domain Multiplexing

Series Switch Gfet Sensor

GFET + Switch technology integration GFET mismatch + transient operation =Multiplexing artifacs Each GFET is permanently connected

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GFET matrix GFET matrix

Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Frequency-Domain Multiplexing

IntroFDM ROIC CMOS Chip Conclusions

Row current read-out Column voltage carriers

CMOS frontend

Insensitive to CMOS flicker noise Low-noise lock-in demodulation Frequency-Domain Multiplexing Each GFET is permanently connected and used as transconductor+mixer

Carrier column voltage Recording site uecog signal Modulated GFET Current

Irow different channels frequency allocation

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GFET matrix

Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Frequency-Domain Multiplexing

IntroFDM ROIC CMOS Chip Conclusions

GFET asymmetrical operation generates odd and even harmonics: FDM carrier pre-distortion to promote second-harmonic cancellation: + Calibration not needed + Compatible with I/Q generation Symmetrical operation Asymmetrical operation

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells IntroFDMROIC CMOS Chip Conclusions

Introduction 1 Frequency-Domain Multiplexing of GFETs 2 1024-Ch ROIC Architecture 3 Test Chip in 0.18µm CMOS Technology 5 Conclusions 6 Low-Power CMOS Circuits 4

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

1024-Channel ROIC Architecture

Modular and scalable read-out IC (ROIC) for 32x32 GFET sensory arrays:

IntroFDMROIC CMOS Chip Conclusions

VCRO CP PFC PLL DAC DAC SAR ADC Configuration Configuration Dual Column Module (x16) Row Module (x32) Config. Config. Bus Acquisition Bus Master clock Digital control I/O Bus Analog Bias

ROIC

Analog voltage references Core supply Preamp PGA

columns of GFET array rows of GFET array digital backend (e.g. lock-in demux)

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

1024-Channel ROIC Architecture

ROIC specifications from functional model in Scientific Python:

IntroFDMROIC CMOS Chip Conclusions

Recording of local field potentials (LFPs) and high-frequency spikes Main design trade-offs at system level: Highly configurable to cover GFET process corners + FDM freq. allocation vs GFET bandwidth + FDM carrier amplitude vs GFET array power + Row ADC sampling rate vs channel aliasing + Row ADC DR vs number of array columns

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells IntroFDMROICCMOS Chip Conclusions

Introduction 1 Frequency-Domain Multiplexing of GFETs 2 1024-Ch ROIC Architecture 3 Test Chip in 0.18µm CMOS Technology 5 Conclusions 6 Low-Power CMOS Circuits 4

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Linear VCRO with Symmetrical Propagation Delay

Two-stage current-starved voltage-controlled ring oscillator (VCRO) for the column PLL Quadrature (I/Q) generation

IntroFDMROICCMOS Chip Conclusions 12/24

Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Linear VCRO with Symmetrical Propagation Delay

Two-stage current-starved voltage-controlled ring oscillator (VCRO) for the column PLL Quadrature (I/Q) generation Symmetrical propagation delays by the addition of logical masking

IntroFDMROICCMOS Chip Conclusions

without masking with masking

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Linear VCRO with Symmetrical Propagation Delay

Two-stage current-starved voltage-controlled ring oscillator (VCRO) for the column PLL Quadrature (I/Q) generation Symmetrical propagation delays by the addition of logical masking Linear V/I conversion to improve PLL stability:

IntroFDMROICCMOS Chip Conclusions

without masking with masking

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

FDM Carrier DAC with Class-AB Column Driver

Each PLL generates I/Q square waveforms at the FDM frequency wc/2π and 3wc/2π Synthesis of carrier pre-distortion:

IntroFDMROICCMOS Chip Conclusions

1

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

FDM Carrier DAC with Class-AB Column Driver

Each PLL generates I/Q square waveforms at the FDM frequency wc/2π and 3wc/2π Synthesis of carrier pre-distortion:

IntroFDMROICCMOS Chip Conclusions

1

Single-stage Class-AB variable-mirror amplifier (VMA): + Simple frequency compensation + Low PVT sensitivity

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

FDM Carrier DAC with Class-AB Column Driver

Each PLL generates I/Q square waveforms at the FDM frequency wc/2π and 3wc/2π Synthesis of carrier pre-distortion

IntroFDMROICCMOS Chip Conclusions

Single-stage Class-AB variable-mirror amplifier (VMA): + Simple frequency compensation + Low PVT sensitivity Efficient Vcol driving of the low-impedance (~60Ω) GFET array column:

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

SAR ADC with Low-Kickback Comparator

Segmented (6MSB+7LSB) SAR ADC for each array row: Low kickback can be achieved by combining folded cascode input and preset at metastability:

IntroFDMROICCMOS Chip Conclusions

+ 2-Vpp differential full scale + 60-fF unitary capacitor

32 16 8 4 2 1 32 16 8 4 2 1 1 64 32 16 8 4 2 1 32 16 8 4 2 1 1 64

SAR ctrl. logic

+ 1.8-MS/s sampling freq. Low-power operation usually allows kickback to reach high-impedance comparator inputs + 13-bit ENOB + 125-µW power consumption @ 1.8V

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells IntroFDMROICCMOSChip Conclusions

Introduction 1 Frequency-Domain Multiplexing of GFETs 2 1024-Ch ROIC Architecture 3 Test Chip in 0.18µm CMOS Technology 5 Conclusions 6 Low-Power CMOS Circuits 4

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Test Chip

3.3mm x 2.7mm (9mm2)

IntroFDMROICCMOSChip Conclusions

Integrated in 0.18-µm 6-metal CMOS technology To be tested with 8x8 GFET arrays 8x8 vs 32x32 ROIC = Num. of Modules

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Test Chip

Integrated in 0.18-µm 6-metal CMOS technology To be tested with 8x8 GFET arrays

IntroFDMROICCMOSChip Conclusions

All CMOS building blocks designed for 1024-ch specs In case of reducing system configurability, the final ROIC could be targeted for: + < 50mW + < 25mm2

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8x8 vs 32x32 ROIC = Num. of Modules

Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells IntroFDMROICCMOSChip Conclusions

Introduction 1 Frequency-Domain Multiplexing of GFETs 2 1024-Ch ROIC Architecture 3 Test Chip in 0.18µm CMOS Technology 5 Conclusions 6 Low-Power CMOS Circuits 4

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Conclusions

A switch-lessartifact-free frequency-domain multiplexing (FDM)

• f liquid-gate GFET sensors for large-scale µECOG

Flicker-freelock-in channel demodulation in digital domain Specific CMOS circuits for low-power operation An 8x8 test chip in 0.18-µm 6-metal CMOS technology

IntroFDMROICCMOSChip Conclusions

Modular read-out IC (ROIC) architecture for 1024 channels

Partially funded by European Commission H2020-FETPROACT-2016-732032 and supported by TecnioSpring+ TECSPR16-1-0056 and CSIC-IP4SS-201650E019.

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Switch-Less FDM GFET Sensors LP CMOS Frontend 1024-Ch µECOG J.Cisneros-Fernández, M.Dei, L.Terés and F.Serra-Graells

Partially funded by European Commission H2020-FETPROACT-2016-732032 and supported by TecnioSpring+ TECSPR16-1-0056 and CSIC-IP4SS-201650E019.

your attention! Thanks for

IntroFDMROICCMOSChip Conclusions

Conclusions

To be tested in short...

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