Stupid PCIe Tricks Joe FitzPatrick Breakpoint 2014 whoami - - PowerPoint PPT Presentation

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Stupid PCIe Tricks Joe FitzPatrick Breakpoint 2014 whoami - - PowerPoint PPT Presentation

Aug 21, 2022 96 likes •1.06k views

Stupid PCIe Tricks Joe FitzPatrick Breakpoint 2014 whoami Electrical Engineering education with focus on CS and Infosec 8 years doing security research, speed debug, and tool development for CPUs Hardware Pen Testing of CPUs

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Joe FitzPatrick Breakpoint 2014

Stupid PCIe Tricks

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  • Electrical Engineering education with

focus on CS and Infosec

  • 8 years doing security research, speed

debug, and tool development for CPUs

  • Hardware Pen Testing of CPUs
  • Security training for functional validators

worldwide

  • Software Exploitation via Hardware

Exploits, AKA SExViaHEx

whoami

Joe FitzPatrick @securelyfitz

joefitz@securinghardware.com

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If Joe Fitz... Joe Sitz

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This is not academic-caliber research. Lots of this stuff has been done before. The difference is that I aim to show that PCIe attacks can be easier and cheaper than previously thought

Disclaimer

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What is PCIe?

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PCIe is PCI!

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PCIe is NOT PCI!

Foto tomada por Jorge González http://es.wikipedia.org Photo by snikerdo http://en.wikipedia.org

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Links and Lanes

Diagram: PCIe 2.1 specification

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Hierarchy

Diagram: PCIe 2.1 specification

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Switching and Routing

Diagram: PCIe 2.1 specification

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Layers

Diagram: PCIe 2.1 specification

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Configuration Space

Diagram: PCIe 2.1 specification

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Configuration Space

Diagram: PCIe 2.1 specification

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Configuration Space

Diagram: PCIe 2.1 specification

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Configuration Space

Diagram: PCIe 2.1 specification

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Configuration Space

Diagram: PCIe 2.1 specification

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Enumeration

Diagram: PCIe 2.1 specification

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Routing PCIe

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The Step-By-Step, Complicated, Mandatory, Inflexible Rules of Routing PCIe:

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  • 1. route pairs adjacent and equal length

The Step-By-Step, Complicated, Mandatory, Inflexible Rules of Routing PCIe:

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  • 1. route pairs adjacent and equal length

… that’s mostly it

The Step-By-Step, Complicated, Mandatory, Inflexible Rules of Routing PCIe:

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Routing PCIe

System Board Traces 12 Inches Add-in Card Traces 3.5 inches Chip-to-Chip Routes 15 inches

Follow these rules and your board might work. Break them and it might not.

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Routing PCIe

Minimum PCIe:

  • 2.5GHz TX
  • 2.5GHz RX
  • 100MHz Clock (optional)
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$ $ $ $ $

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Routing PCIe

Cross-section of a USB 3.0 cable. Image courtesy of USB Implementers Forum

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PEXternalizer

  • n github
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PEXternalizer

  • n github
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PEXternalizer

  • n github
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PEXternalizer

  • n github
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mPEXternalizer

  • n github
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POC || GTFO 0x05

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POC || GTFO 0x05

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POC || GTFO 0x05

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A brief history of DMA attacks

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Tribble

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Firewire Attacks

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Video Demo Slides SysCan ‘14

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PLX Technologies Buy one

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Thunderbolt

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Thunderbolt

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USB3380 Firmware

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USB3380 Firmware

> xxd SLOTSCREAMER.bin 0000000: 5a00 0c00 2310 4970 0000 0000 e414 bc16 Z...#.Ip........

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USB3380 Firmware

> xxd SLOTSCREAMER.bin 0000000: 5a00 0c00 2310 4970 0000 0000 e414 bc16 Z...#.Ip........

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USB3380 Firmware

> xxd SLOTSCREAMER.bin 0000000: 5a00 0c00 2310 4970 0000 0000 e414 bc16 Z...#.Ip........

That’s all!

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Hardware

http://www.hwtools.net/PLX.html

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Software

tools used in preparing this presentation:

  • plx’s flashing

software

  • pyusb + scripts
  • inception_pci
  • volatility for

memory analysis

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Attack-side Software

Quick ‘n’ dirty PCIe memory read/write with PyUSB

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More attack-side Software

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More attack-side Software

# EQUALS: # # |-- Offset 0x00 # / # /\ |-patchoffset--------------->[b0 01] # 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f .. (byte offset) # ----------------------------------------------- # c6 0f 85 a0 b8 00 00 b8 ab 05 03 ff ef 01 00 00 .. (chunk of memory data) # ----------------------------------------------- # \______/ \___/ \______/ # \ \ \ # \ \ |-- Chunk 2 at internaloffset 0x05 # \ |-- Some data (ignore, don't match this) # |-- Chunk 1 at internaloffset 0x00 # \_____________________/ # \ # |-- Entire signature #

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More attack-side Software

{'OS': 'Mac OS X 10.9', 'versions': ['10.9'], 'architectures': ['x64'], 'name': 'DirectoryService/OpenDirectory unlock/privilege escalation', 'notes': 'Overwrites the DoShadowHashAuth/ODRecordVerifyPassword return value. 'signatures': [{'offsets': [0x1e5], # 10.9 'chunks': [{'chunk': 0x4488e84883c4685b415c415d415e415f5d, 'internaloffset': 0x00, 'patch': 0x90b001, # nop; mov al,1; 'patchoffset': 0x00}]}]}]

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Attacking via PCIe

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MRd

Find important values at known locations Take memory dumps for later analysis Example: Dump memory and use Volatility to analyze it

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Dump Analysis with Volatility

dmesg log of the attack recovered from the memory dump of the victim

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Dump Analysis with Volatility

names, pids, and uids for dumped processes

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Dump Analysis with Volatility

extracted machine info the perfect amount of memory to dump!

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MWr

Modify values at known locations Manipulate code!!! Example: Use Inception to modify lock screen checking, or drop a metasploit payload!

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Inception with Metasploit (W7sp1 POC only)

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IORd/IOWr

Only for legacy devices (legacy means not thoroughly tested recently)

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CfgRd/CfgWr

Interact with other PCI devices’ config spaces Yet another separate address space/different means of accessing hardware

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Msg/MsgD

Messages send things like interrupts and vendor- defined configuration Many message types are very rarely used Example: Invisible Things Labs SNB VT-D

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Mitigations

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Bus Master Enable

joefitz@linUX31a:~/Documents/pcie/SLOTSCREAMER/inception_pci$ lspci -vv | grep BusMaster Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

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Access Control Services

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IOMMU

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Mitigating the Mitigations

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  • Identifies device to the OS
  • OS chooses which driver to load
  • OS configures ACS, BME, etc…
  • OS loads driver

VID:PID

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Default Drivers

  • Some drivers are ‘class’ drivers (think USB

MSC, etc...)

  • Some device specific drivers might be

installed by default (OSX)

  • Drivers contain bugs
  • Think facedancer for PCIE or Thunderbolt
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Early Boot

  • IOMMU is not configured yet
  • Neither is much else
  • Wishlist: Volatility support for EFI shell
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Option ROM/EFI drivers

  • Some devices have firmware that gets run at

early boot

  • Some systems block this (but usually for

anti-competitive reasons, not security)

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Breaking the rules

  • Spoof requesterID for posted transactions
  • Well-timed spoofed requesterID for non-

posted transactions

  • Setting the ‘translated request’ bit
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Misconfigurations

  • Everything is MMIO now - memory

protections are essential

  • Memory protections are not enough - need

Cfg and IO protections as well - don’t forget about them

  • Does installing a hypervisor change how

your OS uses its IOMMU?

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Putting it all together

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Thunderbolt

Diagram: Apple Thunderbolt Device Driver Programming Guide

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HALIBUTDUGOUT

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Sorry, Previous Speakers

ALLOYVIPER

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Building ALLOYVIPER

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Building ALLOYVIPER

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Building ALLOYVIPER

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Building ALLOYVIPER

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Building ALLOYVIPER

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Building ALLOYVIPER

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Building ALLOYVIPER

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Building ALLOYVIPER

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MITMing

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⇐ Thanks for the slides, snare & rzn

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⇐ Thanks for the slides, snare & rzn

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Bypassing VT-d on Macbooks?

  • VT-d is off at boot/reboot
  • Broadcom Ethernet drivers crash the system
  • System reboots - all the doors are open for a

few moments No POC yet (I’ll GTFO soon…)

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Can we do it without imitating a device?

  • Some PCIe switches have ‘transparent’

mode

  • Some PCIe switches have TLP injection

debug features

  • Can we build one into a genuine device?
  • Can we build one into a cable?

No POC yet here either

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Potential enhancements

  • 64-bit DMA (>4gb access!)
  • Full control over TLP Header

○ spoofing requester ID ○ testing ‘reserved’ bits

Enough unproven concepts… time to GTFO...

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Joe FitzPatrick @securelyfitz joefitz@securinghardware.com http://www.securinghardware.com

Questions?