SCRAM Instructions II Philipp Koehn 23 February 2018 Philipp Koehn - - PowerPoint PPT Presentation

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SCRAM Instructions II Philipp Koehn 23 February 2018 Philipp Koehn - - PowerPoint PPT Presentation

SCRAM Instructions II Philipp Koehn 23 February 2018 Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018 Reminder 1 Fully work through a computer circuit assembly code Simple but Complete Random


slide-1
SLIDE 1

SCRAM Instructions II

Philipp Koehn 23 February 2018

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

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SLIDE 2

1

Reminder

  • Fully work through a computer

– circuit – assembly code

  • Simple but Complete Random Access Machine (SCRAM)

– every instruction is 8 bit – 4 bit for op-code: 9 different operations (of 16 possible) – 4 bit for address: 16 bytes of memory

  • Background reading on web page

– The Random Access Machine – The SCRAM

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-3
SLIDE 3

2

Circuit (At This Point)

DI DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

AC

W

Selector

S

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-4
SLIDE 4

3

Instruction Fetch

  • Retrieve instruction from memory
  • Increase program counter

Time Command t0 MAR ← PC t1 MBR ← M, PC ← PC + 1 t2 IR ← MBR

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-5
SLIDE 5

4

Micro Program for STA

  • Store value from accumulator

Op Code Time Command q3 t3 MAR ← IR(D) q3 t4 M ← AC

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-6
SLIDE 6

5

q3 t3: MAR ← IR(D)

DI DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

AC

W

Selector

S

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-7
SLIDE 7

6

q3 t4: M ← AC

D I DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

AC

W

Selector

S

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-8
SLIDE 8

7

arithmetic logic unit

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-9
SLIDE 9

8

Arithmetric Logic Unit

ALU

A B S CO CI Z SUB

  • Adds two numbers:

S=A+B

  • With subtraction flag:

S=A-B

  • Overflow handling with carry in (CI) and carry out (CO)
  • Zero flag:

set if result of operation is 0

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-10
SLIDE 10

9

Accumulator

ALU

A B S CO CI Z SUB

AC

W

  • Store result of ALU operation in accumulator (AC)

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-11
SLIDE 11

10

AC = AC ± B

ALU

A B S CO CI Z SUB

AC

W

  • Accumulator feeds back into ALU
  • Operations are AC = AC + B or AC = AC - B

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-12
SLIDE 12

11

ALU in Circuit

DI DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

Selector

S

ALU

A B S CO CI Z SUB

AC

W

Selector

S

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-13
SLIDE 13

12

add

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

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SLIDE 14

13

ADD: Add to Accumulator

  • Add value from memory address to accumulator
  • Steps

– load value of specified memory address – use that value as a memory address (second lookup) – store value from second lookup into accumulator

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-15
SLIDE 15

14

Micro Program for ADD

  • Load indirectly into accumulator

Op Code Time Command q5 t3 MAR ← IR(D) q5 t4 MBR ← M q5 t5 AC ← AC + MBR

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-16
SLIDE 16

15

q5 t3: MAR ← IR(D)

DI DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

Selector

S

ALU

A B S CO CI Z SUB

AC

W

Selector

S

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-17
SLIDE 17

16

q5 t4: MBR ← M

DI DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

Selector

S

ALU

A B S CO CI Z SUB

AC

W

Selector

S

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-18
SLIDE 18

17

q5 t5: AC ← AC + MBR

DI DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

Selector

S

ALU

A B S CO CI Z SUB

AC

W

Selector

S

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-19
SLIDE 19

18

sub

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

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SLIDE 20

19

SUB: Subtract from Accumulator

  • Subtract from accumulator the value from memory
  • Same as ADD, just set subtraction flag of ALU

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

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SLIDE 21

20

Micro Program for SUB

  • Load indirectly into accumulator

Op Code Time Command q5 t3 MAR ← IR(D) q5 t4 MBR ← M q5 t5 AC ← AC - MBR

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

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SLIDE 22

21

q5 t3: MAR ← IR(D)

DI DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

Selector

S

ALU

A B S CO CI Z SUB

AC

W

Selector

S

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-23
SLIDE 23

22

q5 t4: MBR ← M

DI DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

Selector

S

ALU

A B S CO CI Z SUB

AC

W

Selector

S

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-24
SLIDE 24

23

q5 t5: AC ← AC + MBR

DI DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

Selector

S

ALU

A B S CO CI Z SUB

AC

W

Selector

S

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-25
SLIDE 25

24

jmp

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

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SLIDE 26

25

Program Counter (PC)

  • Position of the next instruction is stored in program counter
  • This gets updated during instruction fetch

Time Command t0 MAR ← PC t1 MBR ← M t2 IR ← MBR ⇒ t3 PC ← PC + 1

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

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SLIDE 27

26

JMP: Jump

  • Assign value to position of the next instruction
  • Sequencing of micro program

– instruction fetch (includes program counter inc) – command-specific micro instructions

  • No problem that program counter gets modified twice

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-28
SLIDE 28

27

Micro Program for JMP

  • Change program counter to specified address

Op Code Time Command q7 t3 PC ← IR(D)

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

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SLIDE 29

28

q7 t3: PC ← IR(D)

DI DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

Selector

S

ALU

A B S CO CI Z SUB

AC

W

Selector

S

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-30
SLIDE 30

29

jpz

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-31
SLIDE 31

30

Zero Flag

  • Zero flag

– set when result of a ALU operation is 0 – stored in flag

ALU

A B S CO CI Z SUB

Z

W

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-32
SLIDE 32

31

Z Flag in Circuit

DI DO W A

16x8 RAM MAR MBR

W W

PC

W INC

IR

W

Decoder Control Logic Unit

C D

T

INC

Decoder

CLEAR

NOT

Q T

Selector

S

ALU

A B S CO CI Z SUB

AC

W

Selector

S

Z

W

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018

slide-33
SLIDE 33

32

Micro Program for JPZ

  • Z flag is a condition for executing a micro program

(same as JMP) Zero Op Code Time Command 1 q7 t3 PC ← IR(D)

  • If not set, no micro program is executed

Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018