SCRAM Instructions II
Philipp Koehn 23 February 2018
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
SCRAM Instructions II Philipp Koehn 23 February 2018 Philipp Koehn - - PowerPoint PPT Presentation
SCRAM Instructions II Philipp Koehn 23 February 2018 Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018 Reminder 1 Fully work through a computer circuit assembly code Simple but Complete Random
Philipp Koehn 23 February 2018
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
1
– circuit – assembly code
– every instruction is 8 bit – 4 bit for op-code: 9 different operations (of 16 possible) – 4 bit for address: 16 bytes of memory
– The Random Access Machine – The SCRAM
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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DI DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
AC
W
Selector
S
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
3
Time Command t0 MAR ← PC t1 MBR ← M, PC ← PC + 1 t2 IR ← MBR
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
4
Op Code Time Command q3 t3 MAR ← IR(D) q3 t4 M ← AC
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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DI DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
AC
W
Selector
S
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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D I DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
AC
W
Selector
S
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
8
S=A+B
S=A-B
set if result of operation is 0
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
10
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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DI DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
Selector
S
ALU
A B S CO CI Z SUB
AC
W
Selector
S
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
13
– load value of specified memory address – use that value as a memory address (second lookup) – store value from second lookup into accumulator
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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Op Code Time Command q5 t3 MAR ← IR(D) q5 t4 MBR ← M q5 t5 AC ← AC + MBR
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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DI DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
Selector
S
ALU
A B S CO CI Z SUB
AC
W
Selector
S
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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DI DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
Selector
S
ALU
A B S CO CI Z SUB
AC
W
Selector
S
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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DI DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
Selector
S
ALU
A B S CO CI Z SUB
AC
W
Selector
S
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
20
Op Code Time Command q5 t3 MAR ← IR(D) q5 t4 MBR ← M q5 t5 AC ← AC - MBR
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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DI DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
Selector
S
ALU
A B S CO CI Z SUB
AC
W
Selector
S
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
22
DI DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
Selector
S
ALU
A B S CO CI Z SUB
AC
W
Selector
S
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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DI DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
Selector
S
ALU
A B S CO CI Z SUB
AC
W
Selector
S
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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Time Command t0 MAR ← PC t1 MBR ← M t2 IR ← MBR ⇒ t3 PC ← PC + 1
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
26
– instruction fetch (includes program counter inc) – command-specific micro instructions
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
27
Op Code Time Command q7 t3 PC ← IR(D)
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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DI DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
Selector
S
ALU
A B S CO CI Z SUB
AC
W
Selector
S
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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– set when result of a ALU operation is 0 – stored in flag
ALU
A B S CO CI Z SUB
Z
W
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
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DI DO W A
16x8 RAM MAR MBR
W W
PC
W INC
IR
W
Decoder Control Logic Unit
C D
T
INC
Decoder
CLEAR
NOT
Q T
Selector
S
ALU
A B S CO CI Z SUB
AC
W
Selector
S
Z
W
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018
32
(same as JMP) Zero Op Code Time Command 1 q7 t3 PC ← IR(D)
Philipp Koehn Computer Systems Fundamentals: SCRAM Instructions II 23 February 2018