Saving energy and increasing density in information processing using - PowerPoint PPT Presentation

Saving energy and increasing density in information processing using photonics David Miller, Stanford University For an electronic copy of these slides, please e- mail dabm@ee.stanford.edu See also D. A. B. Miller, “Attojoule Optoelectronics for Low-Energy Information Processing and Communications: a Tutorial Review,” IEEE/OSA J. Lightwave Technology 35 (3), 343-393 (2017) DOI: 10.1109/JLT.2017.2647779

Summary Growth in the use of information  Limits   interconnect density  energy – which is mostly from interconnects Using optics to eliminate the energies of wires  Using optics to solve the interconnect density problem off chips  Using optics to eliminate unnecessary circuits (and their power)  Goal – interconnects from 1cm to 10 m with  ~10 – 100 fJ/bit instead of 1 – 10 pJ/bit Optics is the only physical way of scaling interconnect density off the chip  eliminating this interconnect energy  Stanford Computer Systems Colloquium, April 3, 2019 David Miller 2

Growth in information communication and processing Both 1.E+13 Internet traffic General purpose computing 1.E+12 hardware have grown ~ 60 % per year 1.E+11 Telecommunications (B/s) Telecommunications (B/s) ~ X 100 in 10 years Voice Voice Massive challenge for hardware 1.E+10 Phone Phone scaling of (B/s) (B/s) Gen. Gen. Energy 1.E+09 Purpose Purpose Energy per bit has to reduce Computing Computing (MIPS) (MIPS) Energy scaling not 1.E+08 environmentally sustainable ~ 4.6 – 9% of electricity in 1.E+07 Internet (B/s) Internet (B/s) 2012 (Van Heddeghem et al., Computer Comm. 50 1.E+06 64–76 (2014)) 1986 1993 2000 2007 Communication density inside M. Hilbert and P . Lopez, “The World’s Technological Capacity to systems Store, Communicate, and Compute Information,” already at limits for electrical Science 332, 60 (2011) MIPS – million instructions per second approaches ~ 3 - 6 instructions = 1 floating point operation (FLOP) Stanford Computer Systems Colloquium, April 3, 2019 David Miller 3

The first transatlantic cable (1865) William Thomson (Lord Kelvin) (1824 – 1907) Stanford Computer Systems Colloquium, April 3, 2019 David Miller 4

What’s wrong with wires? Signal gets weaker with distance Information gets mixed up over long distances Original signal tape “Intersymbol from Bamfield cable interference” Wiring density Wires have to be thick for long distance communications 1902 Transpacific cable from Bamfield, Vancouver to Fanning Island. 4000 miles long, ~ 100 characters/minute (~ 7 bits per second) with a skilled operator Stanford Computer Systems Colloquium, April 3, 2019 David Miller 5

Density problem in electrical interconnects  A carries the same J. Parallel and Dist. Comp. number of bits per this wire this wire 41, 4252 (1997) second as Once the wiring fills all space, Get universal form of scaling for the capacity cannot be increased simple digital connections either by making the system no repeaters, no multilevel modem smaller techniques or making it larger Optics completely avoids this scaling bit rate B  A /  2 limitation no resistive loss small wavelength Stanford Computer Systems Colloquium, April 3, 2019 David Miller 6

Wiring density Chip vertical cross-section Chip wiring layers e.g., ~ 5 microns thick Transistors ~ 10 nm (not to scale) dimensions Stanford Computer Systems David Miller 7 Colloquium, April 3, 2019

ITRS Projected Chip Performance – Bytes/FLOP 100.00 Compute power in floating point 100.00 Byte/FLOP operations per second (FLOPs) gap Scaled from 2007 chip FLOPs Input/Output rate from ITRS I/O rate (International Technology Roadmap for Semiconductors 10.00 10.00 (scaling number) Input/ (# Signal pins) x (off-chip clock Compute Output power rate) Rate (TFLOPs) (TByte/s) DM “Device Requirements for Optical 1.00 1.00 Interconnects to Silicon Chips, ” Proc. IEEE 97, 1166 - 1185 (2009) 2005 2010 2015 2020 2025 Year Input/Output interconnect (I/O) rate does not keep up with ability of chip to calculate Ideal of 1 Byte of memory access for each floating point operation (FLOP) cannot be retained • Byte/FLOP gap Stanford Computer Systems Colloquium, April 3, 2019 David Miller 8

Energies for communications and computations Operation Energy per bit Wireless data 10 – 30  J Internet: access 40 – 80nJ Internet: routing 20nJ Internet: optical WDM links 3nJ Reading DRAM 5pJ Communicating off chip 1 – 20 pJ Data link multiplexing and timing circuits ~ 2 pJ Communicating across chip 600 fJ Floating point operation 100fJ Energy in DRAM cell 10fJ Switching CMOS gate ~50aJ – 3fJ 1 electron at 1V, or 0.16aJ (160zJ) 1 photon @1eV most energy is used for communications, not logic Stanford Computer Systems Colloquium, April 3, 2019 David Miller 9

Data rates at different length scales Total long distance internet traffic ~ 280 Tb/s (Cisco) Equivalent to everyone talking on the phone at once all the time Traffic on “rack to rack” network inside one large data center ~ 1 Pb/s (Google) Graphics processor and server chips peak bandwidth on and off chip ~ 1.4 Tb/s – 2 Tb/s Server processor chip on-chip bandwidths on-chip network bandwidth ~ 4 Tb/s bandwidth in and out of L3 cache ~ 12.8 Tb/s DM, JLT 35 , 343 (2017) Stanford Computer Systems Colloquium, April 3, 2019 David Miller 10 10

Interconnect power Interconnect power limits chip performance ~ 50% of microprocessor power was interconnects in 2002, and has likely risen since System power is financially significant The cost of powering a server is comparable to the purchase cost of the server hardware Energy for one Google search? ~ 1 kJ Server interconnect power is already larger than solar power generation D. A. B. Miller, Proc. IEEE 97, 1166 - 1185 (2009) Stanford Computer Systems David Miller 11 Colloquium, April 3, 2019

Energy and information Though it does take more energy to send a bit over longer distances there is massively more information sent at shorter distances so much so that most energy dissipation is in shorter links and in interconnects inside machines Stanford Computer Systems Colloquium, April 3, 2019 David Miller 12

Power dissipation in electrical wires Wires always have large capacitance per unit length ~ 2 pF/cm, 200 aF/micron Simple logic-level signaling results in large dissipation Dissipate at least ~ ¼CV 2 per bit in on-off signaling E.g., at 2pF/cm and a 2 cm chip, at 1 V on-off signaling energy per bit communicated at least ~ 1pJ electrical connection low impedance and/or high capacitance / unit length small, high-impedance devices Stanford Computer Systems Colloquium, April 3, 2019 David Miller 13 13

Logic and wiring capacitance Wiring capacitance even to neighboring gates is Logic gate comparable to or greater than the transistor capacitance Most energy in information processing is in communications not in logic even at the gate level Wire Most energy dissipation in information processing is in charging and discharging wire capacitance which is ~ 200 aF/micron Just “touching” a bit typically costs many fJ in CMOS Stanford Computer Systems Colloquium, April 3, 2019 David Miller 14 14

Energy and information The dominant energy dissipation at short distances inside machines is charging and discharging wire capacitance Stanford Computer Systems Colloquium, April 3, 2019 David Miller 15

Need to move to optics to save energy  To save energy in the physical process of communications stop wasting energy in charging and discharging electrical lines a fundamental quantum-mechanical advantage of optics quantum impedance conversion charge the photodetector, not the wire (Also can continue to increase interconnect density using optics solving the “byte per FLOP” problem in computer architectures) Stanford Computer Systems Colloquium, April 3, 2019 David Miller 16 16

Quantum impedance conversion The photoelectric effect means it is possible to generate a “large” voltage in a detector (e.g., a fraction of a volt), with 1 nW with very little signal power or 1 eV energy photons and very little classical voltage ~ 1 nA in the light beam (< 1mV for 1 G  1nW) “quantum impedance conversion” ~ 1 V Optics only has to charge the photodetector and transistor to the logic voltage DM, Optics Letters, 14 , 146 (1989) not the interconnect line Stanford Computer Systems Colloquium, April 3, 2019 David Miller 17

How to do this? Reduce energy in optoelectronic devices so the energy to send information optically becomes less than that of wires even for short distances e.g., centimeters or even shorter Low energy optoelectronic devices Pushing operating energies into the sub 10fJ or even attojoule range for output devices Modulators, LEDs, lasers including advanced nanophotonic structures Integrating sub-fF photodetectors right beside transistors DM, JLT 35 , 343 (2017) Stanford Computer Systems Colloquium, April 3, 2019 David Miller 18 18