SAT-Based Methods for Circuit Synthesis* October 22, 2014 Roderick - - PowerPoint PPT Presentation

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SAT-Based Methods for Circuit Synthesis* October 22, 2014 Roderick - - PowerPoint PPT Presentation

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Robert Knighofer SAT-Based Methods for Circuit Synthesis SAT-Based Methods for Circuit Synthesis* October 22, 2014 Roderick Bloem Uwe Egly Patrick Klampfl Florian Lonsing Robert Knighofer * This work was supported in part by the

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Robert Könighofer SAT-Based Methods for Circuit Synthesis

u www.iaik.tugraz.at u www.iaik.tugraz.at

SAT-Based Methods for Circuit Synthesis*

October 22, 2014

* This work was supported in part by the Austrian Science Fund (FWF) through the national research network RiSE (S11406-N23, S11409-N23) and the project QUAINT (I774-N23), as well as by the European Commission through project STANCE (317753).

Roderick Bloem Patrick Klampfl Robert Könighofer Uwe Egly Florian Lonsing

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Robert Könighofer SAT-Based Methods for Circuit Synthesis

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  • Specification: What?
  • From: Graz,

Inffeldgasse

  • To: Lausanne, 6pm
  • Implementation: How?
  • Walk to Moserhofgasse
  • Tram 6 to Jakominiplatz
  • Buy tram ticket
  • Tram 3 to train station Graz
  • Buy train ticket
  • Train to Salzburg
  • Train to Zürich
  • Train to Launsanne
  • Walk to Lausanne Fon
  • And so on …

What is Synthesis?

Synthesis FMCAD

FMCAD 2014 Lausanne, October 22

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Robert Könighofer SAT-Based Methods for Circuit Synthesis

3

  • Specification:
  • Temporal Logic
  • Implementation:
  • Reactive system

Reactive Synthesis

Synthesis

System

r1 r2 g1 g2 always(𝑠

1 → eventually(𝑕1))

always(𝑠

2 → eventually(𝑕2))

never(𝑕1 ∧ 𝑕2)

Environment

Lausanne, October 22 FMCAD 2014

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Robert Könighofer SAT-Based Methods for Circuit Synthesis

Typical Synthesis Flow

4 FMCAD 2014 Lausanne, October 22

Specification Game Strategy Circuit

Formula 𝑇(𝑗 , 𝑝 )

always(𝑗1 → eventually(𝑝1)) System

  • 1

Environment

IF THEN Inputs 𝑗 Outputs 𝑝 i1 i2

  • 1
  • 2

1

  • 1

1 1 And so on … FF ?

𝑗 𝑝

i1 Focus of this work

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Robert Könighofer SAT-Based Methods for Circuit Synthesis

Challenges

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  • Scalability
  • Symbolic algorithms
  • Traditionally: BDDs
  • This work: SAT/QBF
  • Find small circuits
  • Low number of gates
  • Exploit freedom in 𝑇 𝑗 , 𝑝 wisely
  • Our work:
  • Comparison of SAT/QBF-based methods
  • Optimizations

FMCAD 2014 Lausanne, October 22

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Robert Könighofer SAT-Based Methods for Circuit Synthesis

Method 1:

QBF Certification

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Given:

  • ∀𝑗 : ∃𝑝 :𝑇(𝑗 , 𝑝 )

Find:

  • Skolem function 𝑝 = 𝑔(𝑗 )

Existing Tool:

  • QBFCert [SAT’12]

FMCAD 2014 Lausanne, October 22

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Robert Könighofer SAT-Based Methods for Circuit Synthesis

Method 2:

Interpolation [ICCAD’09]

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For one output after the other:

  • Construct formulas mustBeTrue(𝑗 ), mustBeFalse 𝑗
  • mustBeTrue 𝑗 ∧ mustBeFalse 𝑗 = UNSAT
  • Compute Interpolant 𝐽(𝑗 )
  • mustBeTrue 𝑗 → 𝐽 𝑗 → ¬mustBeFalse 𝑗

FMCAD 2014 Lausanne, October 22

mustBeTrue mustBeFalse

𝐽(𝑗 )

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Robert Könighofer SAT-Based Methods for Circuit Synthesis

Method 3:

Computational Learning [FMCAD’12]

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For one output after the other:

  • Construct formulas mustBeTrue(𝑗 ), mustBeFalse 𝑗
  • mustBeTrue 𝑗 ∧ mustBeFalse 𝑗 = UNSAT
  • “Learn” Interpolant 𝐽(𝑗 )
  • Counterexample-guided refinement
  • Many options: SAT or QBF, …

FMCAD 2014 Lausanne, October 22

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Robert Könighofer SAT-Based Methods for Circuit Synthesis 1 10 100 1000 10000 Execution Time [sec]

Results:

Execution Time

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  • Cactus Plot

FMCAD 2014 Lausanne, October 22

Benchmarks

Interpolation QBF Cert QBF Learning BDDs SAT Learning

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Robert Könighofer SAT-Based Methods for Circuit Synthesis

Results:

Circuit Size

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  • Cactus Plot

FMCAD 2014 Lausanne, October 22

Benchmarks

Interpolation QBF Cert QBF Learning BDDs SAT Learning 2 SAT Learning 1

10 100 1000 10000 100000 1000000 Circuit Size [#Gates] Benchmarks

QBF Cert QBF Learning Interpolation BDDs SAT Learning

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Robert Könighofer SAT-Based Methods for Circuit Synthesis

Conclusions

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  • SAT-based learning works best
  • Execution time and circuit size correlate
  • Check out the paper for details
  • Optimizations
  • More results
  • Implementation is available:
  • http://www.iaik.tugraz.at/content/research/design_verification/demiurge/

FMCAD 2014 Lausanne, October 22

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Robert Könighofer SAT-Based Methods for Circuit Synthesis

References

12 FMCAD 2014 Lausanne, October 22

[SAT’12]

  • A. Niemetz, M. Preiner, F. Lonsing, M. Seidl, and A. Biere.

Resolution- based certificate extraction for QBF. In SAT’12. Springer, 2012. [ICCAD’09] J.-H. R. Jiang, H.-P. Lin, and W.-L. Hung. Interpolating functions from large boolean relations. In ICCAD’09. IEEE, 2009. [FMCAD’12]

  • R. Ehlers, R. Könighofer, and G. Hofferek. Symbolically

synthesizing small circuits. In FMCAD’12. IEEE, 2012