RC(L) Interconnect Sizing with Second Order Considerations via - - PowerPoint PPT Presentation

Carnegie Mellon

RC(L) Interconnect Sizing with Second Order Considerations via Posynomial Programming

Tao Lin and Lawrence T. Pileggi

• Dept. Electrical and Computer Engineering

Carnegie Mellon University

1

Outline

Elmore delay based formulation Central moment metrics Posynomiality of central moments Extension to inductive interconnects Applications Experiment results

2

Interconnect Problem

The delay due to the global RC(L) interconnects

is becoming a dominant portion of the overall path delay

Interconnect Delay (Al) Interconnect Delay (Cu)

Practical interconnect

• ptimization methods

are required for global nets

3

Optimization Via Elmore Delay

Interconnect sizing formulations based on the

Elmore delay model:

to subject

) W (

Area minimize

d ) W (

Elmore

k

<

and

N ,... i w w w

i i i

1 = ≤ ≤

— Minimize the area — Delay constraints — Width bounds Many efficient algorithms have been developed:

Lagrange relaxation method Sensitivity based convex programming Local refinement algorithm Sequential quadratic programming

4

Posynomial function of sizes:

Posynomiality:

Posynomiality of Elmore Delay

Elmore delay is the first order metric of RC

interconnect delay

The first moment: Sum of RC products: Function of width:

... ) (

2 2 1

+ + + = s m s m m s H

∑ ∑

∈ ∈

=

) ( ) ( k P i i D j j i k

C R Elmore

1

> Π =∑

i j i n

), w ( ) w w ( f

ij

α α

β

L

∑ ∑

∈ ∈

=

) k ( P i ) i ( D j j ij i k

w a ) w ( ) w ( Elmore 1

i i i i

w C w R ∝ ∝ 1

5

Posynomial Programming

Posynomial geometric programming:

A posynomial function can be transformed into a

convex function under the exponential substitution:

The interconnect sizing problem is a convex

programming problem under exponential substitution

to subject

) W (

Area minimize

d ) W (

Elmore

k

<

and

N ,... i w w w

i i i

1 = ≤ ≤

— Sum of wi*li — Delay constraints — Width bounds

) x exp( w

j j =

6

Signal integrity becomes an important

issue in giga-scale DSM design

Signal quality

Clock attenuation Signal transition time

Signal uncertainty

Noise peak Extra-delay due to noise

Signal Integrity Problems

7

Higher Order Moments

Limitation of first order metrics

Incapable of modeling integrity Incapable of modeling noise

High order moments:

It is trivial to show that higher order moments (RC

trees) are also posynomial

But reduced order models in terms of higher order

moments do not preserve posynomiality

∑ ∑

∈ ∈

=

) ( ) ( , 1 , 2 k P i i D j j i k

m R m

... 1 5 .

2 1

2 1

− − − =

− − t p t p

e a e a

8

Central Moments

Definition of the central moments µ2 is a natural metric for signal quality/shape

Standard deviation Dispersion

2 6 6 (var 2

3 1 2 1 3 3 2 1 2 2 1

m m m m iance) m m mean m − + − = − = ≡ = µ µ µ (skewness)

σ

∫ =

∞

1 ) ( dt t h

h

t

2

µ s =

9

Signal Attenuation

An accurate model for signal attenuation in RCL

clock tree [Celik99]

A provable upper bound for RC responses An upper bound for overdamped cases (RCL)

) ( ) 1 log( 10 ) (

2 2

db ω µ ω α − − =

Frequency (GHz) Attenuation (db) 2 0.01 1

Approx. Exact

10

Signal Transition

2

2 µ p TR =

µ2 as a metric of RC signal transition time

[Elmore48]:

Transfer function: Signal transition time:

) 2 ( 5 . 1 ) (

2 2 2

TD TR s sTD s g + + − =

TR TD

2

µ s =

11

Delay Due To Crosstalk

µ2 is a metric of delay uncertainty due to

crosstalk noise

Assuming a finite ramp input TR and an

environment noise Vn

Worst case alignment: ∆delay=TR*Vn/Vdd

Noise VN

∆delay

12

Posynomiality Proof

Is µ2 a posynomial function of wire widths?

m1 and m2 in an RC tree are posynomial

functions of wire widths

µ2 is provable positive for RC tree response

[Gupta97]

Prove by induction: µ2 of RC tree response

is a posynomial function of wire widths

2 1 2 2

2 m m − = µ

13

For Inductive Interconnect

High order moments for RCL circuits:

M2 is not guaranteed to be positive for RCL circuit

responses

Modeling of on-chip inductance

A simple linear model for embedded wire

Posynomial condition of µ2 (sufficient condition)

which can be verified before solving the problem

w / t L µ ≈

k k k L D k

L C R C R R ≥ +

2

4 1

∑ ∑ ∑ ∑

∈ ∈ ∈ ∈

− =

) ( ) ( ) ( ) ( , 1 , 2 k P i i D j j i k P i i D j j i k

C L m R m

14

Sizing Formulations

A posynomial interconnect sizing

formulation with second order constraints:

The inequality constraints on µ2 represent

the constraints on signal quality

Attenuation: Transition time:

2 2

) 1 log( 10 ) ( α ω µ ω α ≤ − − =

2

2 TR p TR ≤ = µ

(I)

and to subject ) W ( Area minimize d ) W ( m 1,k and N ,... i w w w

i i i

1 = ≤ ≤

2

µ s ) W (

k ,

≤ ≤

15

Sizing Formulations

For clock tree sizing problems, the delay

constraints are equality constraints in order to achieve zero skew solutions

Given the posynomiality of the constraints,

the above problem can be solved via a multi- stage approach. Each stage involves solving a problem of (I). [Celik99][Kay97]

and to subject ) W ( Area minimize d ) W ( m 1,k = and N ,... i w w w

i i i

1 = ≤ ≤

2

µ s ) w (

k ,

≤

16

Sizing Formulations

The posynomiality can be applied to

• ther type of sizing formulations

Sizing formulations (I) and (II) are both

posynomial programs as the Elmore delay based sizing problems

(II)

and to subject ) W ( Max delay minimize a ) W ( Area ≤ and N ,... i w w w

i i i

1 = ≤ ≤

2

µ s ) W (

k ,

≤ to subject dmax minimize a ) W ( Area ≤ and N ,... i w w w

i i i

1 = ≤ ≤ and

2

µ s ) W (

k ,

≤ dmax ) W ( Delay1,k ≤

and

17

Experiments

1.97p 1.37p .85p 1.98p 3.01p 2.75p 2.18p 1.03p 2.06p 287 287 287 287 575 575 718 1202 1077 287 287 287 287 575 575 610 610 R=0.02 (ohms/• ) Ca=0.08fF/um2 Cf=0.06fF/um Length unit (um) Width 0.5um-20um Rd=2ohm 610

ps TR ps Delay 240 105 ≤ ≤

Example:

Design Constraints:

Extend sequential quadratic programming wire

sizing algorithm (ORCIDS)

Provable convergence Compute µ2 in o(n) complexity by path tracing Match the second order moments of transmission

line models [Yu95]

18

Experiment Results

1.97p 1.37p .85p 1.98p 3.01p 2.75p 2.18p 1.03p 2.06p 287 287 287 287 575 575 718 1202 1077 287 287 287 287 575 575 610 610 R=0.02 (ohms/• ) Ca=0.08fF/um2 Cf=0.06fF/um Unit (um) Width 0.5-20u Rd=2ohm 610 1.97p 1.37p .85p 1.98p 3.01p 2.75p 2.18p 1.03p 2.06p 1.70 1.71 1.19 0.74 3.53 2.0 5.8 10.3 20 2.48 2.34 1.17 3.12 4.47 5.0 3.08 3.25 Target delay=105ps 3.42 Elmore Delay Only Area=56,843 1.97p 1.37p .85p 1.98p 3.01p 2.75p 2.18p 1.03p 2.06p 2.03 2.04 1.42 0.88 4.41 2.5 7.77 13.6 20 2.88 2.72 1.36 3.63 5.47 6.13 3.69 4.14 Target delay=105ps Target Tr=240ps 4.62

• Form. (I) (RC)

Area=66,611 1.97p 1.37p .85p 1.98p 3.01p 2.75p 2.18p 1.03p 2.06p 1.77 1.77 1.23 0.76 3.79 2.15 6.78 11.4 20 2.50 2.36 1.19 3.14 4.70 5.26 3.18 3.54 Target delay=105ps Target Tr=240ps 3.87

• Form. (I) (RCL)

Area=59,836

19

Conclusions

The second central moment is a posynomial

metric of interconnect signal integrity

Interconnect sizing problems with second order

signal integrity constraints are formulated as posynomial programs

The existing algorithms can be extended to

solve the new sizing problems with provable convergence