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Title RadixVM: Scalable address spaces for multithreaded applications Austin T. Clements M. Frans Kaashoek Nickolai Zeldovich MIT CSAIL RadixVM: Scalable address spaces for multithreaded applications Parallel applications use VM intensively

  1. Array-based memory map 0 2 35 RadixVM: Scalable address spaces for multithreaded applications

  2. Array-based memory map s r w x file 0 (anon) (anon) (anon) (anon) /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc 2 35 RadixVM: Scalable address spaces for multithreaded applications

  3. Array-based memory map Good: Operations on non-overlapping s r w x file 0 regions are concurrent and induce no communication. (anon) (anon) (anon) (anon) /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc 2 35 RadixVM: Scalable address spaces for multithreaded applications

  4. Array-based memory map Good: Operations on non-overlapping s r w x file 0 regions are concurrent and induce no communication. (anon) (anon) (anon) Bad: Space use is obscene, (anon) time is proportional to region size /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc 2 35 RadixVM: Scalable address spaces for multithreaded applications

  5. Array-based memory map Good: Operations on non-overlapping s r w x file 0 regions are concurrent and induce no communication. (anon) (anon) (anon) Bad: Space use is obscene, (anon) time is proportional to region size How can we achieve good concurrency while keeping space and time under control? /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc 2 35 RadixVM: Scalable address spaces for multithreaded applications

  6. Radix tree Solution: Range-oriented radix tree s r w x file 0 (anon) (anon) (anon) (anon) /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc 2 35 RadixVM: Scalable address spaces for multithreaded applications

  7. Radix tree s r w x file Solution: Range-oriented radix tree (anon) (anon) (anon) (anon) ... /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc RadixVM: Scalable address spaces for multithreaded applications

  8. Radix tree s r w x file Solution: Range-oriented radix tree (anon) (anon) (anon) (anon) ... ... /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc RadixVM: Scalable address spaces for multithreaded applications

  9. Radix tree s r w x file Solution: Range-oriented radix tree (anon) (anon) (anon) (anon) ... ... ... /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc RadixVM: Scalable address spaces for multithreaded applications

  10. Radix tree s r w x file Solution: Range-oriented radix tree Fold constant-valued chunks into parent, (anon) (anon) recursively. (anon) (anon) ... ... ... /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc RadixVM: Scalable address spaces for multithreaded applications

  11. Radix tree s r w x file Solution: Range-oriented radix tree Fold constant-valued chunks into parent, (anon) (anon) recursively. (anon) (anon) ... ... /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc /lib/libc RadixVM: Scalable address spaces for multithreaded applications

  12. Radix tree s r w x file Solution: Range-oriented radix tree Fold constant-valued chunks into parent, (anon) (anon) recursively. (anon) (anon) ... ... /lib/libc RadixVM: Scalable address spaces for multithreaded applications

  13. Radix tree s r w x file Solution: Range-oriented radix tree Fold constant-valued chunks into parent, (anon) (anon) recursively. (anon) (anon) ... ... /lib/libc 2-3x the size of the balanced region tree RadixVM: Scalable address spaces for multithreaded applications

  14. Radix tree s r w x file Solution: Range-oriented radix tree Fold constant-valued chunks into parent, (anon) (anon) recursively. (anon) (anon) ... ... /lib/libc 2-3x the size of the balanced region tree We can achieve array-like concurrency with time and space similar to the balanced tree. RadixVM: Scalable address spaces for multithreaded applications

  15. TLB shootdown munmap must notify cores of changes to cached mappings RadixVM: Scalable address spaces for multithreaded applications

  16. TLB shootdown munmap must notify cores of changes to cached mappings Which cores have a mapping cached? Who knows?! RadixVM: Scalable address spaces for multithreaded applications

  17. TLB shootdown munmap must notify cores of changes to cached mappings Which cores have a mapping cached? Who knows?! RadixVM: Scalable address spaces for multithreaded applications

  18. TLB shootdown munmap must notify cores of changes to cached mappings Which cores have a mapping cached? Who knows?! RadixVM: Scalable address spaces for multithreaded applications

  19. TLB shootdown munmap must notify cores of changes to cached mappings Which cores have a mapping cached? Who knows?! RadixVM: Scalable address spaces for multithreaded applications

  20. TLB shootdown munmap must notify cores of changes to cached mappings Which cores have a mapping cached? Who knows?! In the common case, there is little or no sharing. RadixVM: Scalable address spaces for multithreaded applications

  21. TLB tracking A software-managed TLB would make this easy. Virt Phys 0 18bca 00230 ? s r w x 87c38 0049c /bin/ls Virt Phys Page faults TLB misses ? 8a4bd 00382 87c38 0049c Virt Phys s r w x b987a 00520 ? (anon) 8a4bd 00382 87c38 0049c 2 35 RadixVM: Scalable address spaces for multithreaded applications

  22. TLB tracking A software-managed TLB would make this easy. Virt Phys 0 18bca 00230 ? s r w x 87c38 0049c /bin/ls Virt Phys Page faults TLB misses ? 8a4bd 00382 87c38 0049c Virt Phys s r w x b987a 00520 ? (anon) 8a4bd 00382 87c38 0049c 2 35 Trap and track RadixVM: Scalable address spaces for multithreaded applications

  23. TLB tracking A software-managed TLB would make this easy. Virt Phys 0 18bca 00230 ? s r w x 87c38 0049c /bin/ls Virt Phys Page faults TLB misses ? 8a4bd 00382 87c38 0049c Virt Phys s r w x b987a 00520 ? (anon) 8a4bd 00382 87c38 0049c 2 35 Trap and track RadixVM: Scalable address spaces for multithreaded applications

  24. Soft TLBs, the hard way Solution: Per-core page tables for precise TLB tracking Virt Phys 0 18bca 00230 s r w x 87c38 0049c /bin/ls Virt Phys Page faults TLB misses 8a4bd 00382 87c38 0049c Virt Phys s r w x b987a 00520 (anon) 8a4bd 00382 87c38 0049c 2 35 RadixVM: Scalable address spaces for multithreaded applications

  25. Soft TLBs, the hard way Solution: Per-core page tables for precise TLB tracking Virt Phys 0 18bca 00230 s r w x 87c38 0049c /bin/ls Virt Phys Page faults TLB misses 8a4bd 00382 87c38 0049c Virt Phys s r w x b987a 00520 (anon) 8a4bd 00382 87c38 0049c 2 35 RadixVM: Scalable address spaces for multithreaded applications

  26. Soft TLBs, the hard way Solution: Per-core page tables for precise TLB tracking Virt Phys 0 18bca 00230 s r w x 87c38 0049c /bin/ls Virt Phys Page faults TLB misses 8a4bd 00382 87c38 0049c Virt Phys s r w x b987a 00520 (anon) 8a4bd 00382 87c38 0049c 2 35 Trap and track RadixVM: Scalable address spaces for multithreaded applications

  27. Soft TLBs, the hard way Solution: Per-core page tables for precise TLB tracking Virt Phys 0 18bca 00230 s r w x 87c38 0049c /bin/ls Virt Phys Page faults TLB misses 8a4bd 00382 87c38 0049c Virt Phys s r w x b987a 00520 (anon) 8a4bd 00382 TLB tracking allows us to target TLB shootdowns, 87c38 0049c eliminating unnecessary shootdown communication. 2 35 Trap and track RadixVM: Scalable address spaces for multithreaded applications

  28. Reference counting Reference counting for physical pages and radix nodes RadixVM: Scalable address spaces for multithreaded applications

  29. Reference counting Reference counting for physical pages and radix nodes Shared counters N Scalable inc/dec RadixVM: Scalable address spaces for multithreaded applications

  30. Reference counting Reference counting for physical pages and radix nodes Shared Distributed counters counters N Y Scalable inc/dec Zero-detection cost O(1) O(objs*cpus) Space O(1) O(cpus) RadixVM: Scalable address spaces for multithreaded applications

  31. Reference counting Reference counting for physical pages and radix nodes SNZIs Shared Distributed [Ellen '07] counters counters N Y Scalable inc/dec Mostly Zero-detection cost O(1) O(1) O(objs*cpus) Space O(1) O(cpus) O(cpus) RadixVM: Scalable address spaces for multithreaded applications

  32. Reference counting Reference counting for physical pages and radix nodes SNZIs Shared Distributed [Ellen '07] counters counters Refcache N Y Y Scalable inc/dec Mostly Zero-detection cost O(1) O(1) O(1) O(objs*cpus) Space O(1) O(cpus) O(cpus) O(1) RadixVM: Scalable address spaces for multithreaded applications

  33. Reference counting Reference counting for physical pages and radix nodes SNZIs Shared Distributed [Ellen '07] counters counters Refcache N Y Y Scalable inc/dec Mostly Zero-detection cost O(1) O(1) O(1) O(objs*cpus) Space O(1) O(cpus) O(cpus) O(1) Immediate Y N Y N zero detection RadixVM: Scalable address spaces for multithreaded applications

  34. Refcache Approach: Shared counters with per-core delta caches RadixVM: Scalable address spaces for multithreaded applications

  35. Refcache Approach: Shared counters with per-core delta caches Object A Object B Single counter global_count = 1 global_count = 2 per object ... ... RadixVM: Scalable address spaces for multithreaded applications

  36. Refcache Approach: Shared counters with per-core delta caches Object A Object B Single counter global_count = 1 global_count = 2 per object ... ... Caches changes, not values V Object Delta V Object Delta V Object Delta V Object Delta 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CPU 0 CPU 1 CPU 2 CPU 3 RadixVM: Scalable address spaces for multithreaded applications

  37. Refcache Approach: Shared counters with per-core delta caches Object A Object B Single counter global_count = 1 global_count = 2 per object ... ... Caches changes, not values V Object Delta V Object Delta V Object Delta V Object Delta 0 0 0 0 0 0 0 0 0 1 A +1 1 A +1 0 0 0 0 0 CPU 0 CPU 1 CPU 2 CPU 3 inc(A) inc(A) Operations are local RadixVM: Scalable address spaces for multithreaded applications

  38. Refcache Approach: Shared counters with per-core delta caches Object A Object B Single counter global_count = 1 global_count = 2 per object ... ... Caches changes, not values V Object Delta V Object Delta V Object Delta V Object Delta 0 0 0 0 0 0 0 1 B -1 0 1 A +1 1 A +1 0 0 0 0 0 CPU 0 CPU 1 CPU 2 CPU 3 inc(A) inc(A) Operations dec(B) are local RadixVM: Scalable address spaces for multithreaded applications

  39. Refcache Approach: Shared counters with per-core delta caches Object A Object B Single counter global_count = 1 global_count = 2 per object ... ... True count = ∑ True count = ∑ Generally Caches changes, unknown not values V Object Delta V Object Delta V Object Delta V Object Delta 0 0 0 0 0 0 0 1 B -1 0 1 A +1 1 A +1 0 0 0 0 0 CPU 0 CPU 1 CPU 2 CPU 3 inc(A) inc(A) Operations dec(B) are local RadixVM: Scalable address spaces for multithreaded applications

  40. Refcache When is the true count zero? RadixVM: Scalable address spaces for multithreaded applications

  41. Refcache When is the true count zero? Assumption: When the true count is zero, it will stay zero. RadixVM: Scalable address spaces for multithreaded applications

  42. Refcache When is the true count zero? Assumption: When the true count is zero, it will stay zero. Divide time in to epochs. Each epoch, all CPUs flush their delta caches. If an object's global count stays zero for a whole epoch, then its true count is zero. t RadixVM: Scalable address spaces for multithreaded applications

  43. Refcache When is the true count zero? Assumption: When the true count is zero, it will stay zero. Divide time in to epochs. Each epoch, all CPUs flush their delta caches. If an object's global count stays zero for a whole epoch, then its true count is zero. CPU 0 1 2 3 t RadixVM: Scalable address spaces for multithreaded applications

  44. Refcache When is the true count zero? Assumption: When the true count is zero, it will stay zero. Divide time in to epochs. Each epoch, all CPUs flush their delta caches. If an object's global count stays zero for a whole epoch, then its true count is zero. global CPU 0 1 2 3 t RadixVM: Scalable address spaces for multithreaded applications

  45. Refcache example Initially: Global count is 1, no cached deltas (so true count is 1) global CPU 0 1 2 3 t true RadixVM: Scalable address spaces for multithreaded applications

  46. Refcache example Initially: Global count is 1, no cached deltas (so true count is 1) global CPU 0 1 2 3 t true RadixVM: Scalable address spaces for multithreaded applications

  47. Refcache example Initially: Global count is 1, no cached deltas (so true count is 1) CPU 0 decrements and flushes; global count is now 0. What about true count? global CPU 0 1 2 3 t true RadixVM: Scalable address spaces for multithreaded applications

  48. Refcache example Initially: Global count is 1, no cached deltas (so true count is 1) CPU 1 increments after flush, before CPU 0's decrement CPU 0 decrements and flushes; global count is now 0. What about true count? global CPU 0 1 2 3 t true RadixVM: Scalable address spaces for multithreaded applications

  49. Refcache example Initially: Global count is 1, no cached deltas (so true count is 1) CPU 1 increments after flush, before CPU 0's decrement CPU 0 decrements and flushes; global count is now 0. What about true count? global CPU 0 1 2 3 t true The true count is the sum of everything up to right now. RadixVM: Scalable address spaces for multithreaded applications

  50. Refcache example Initially: Global count is 1, no cached deltas (so true count is 1) CPU 1 increments after flush, before CPU 0's decrement CPU 0 decrements and flushes; global count is now 0. What about true count? global CPU 0 1 2 3 t true The true count is the sum of everything up to right now. But the global count only reflects the blue region. Operations in the orange region are still cached. RadixVM: Scalable address spaces for multithreaded applications

  51. Refcache example Initially: Global count is 1, no cached deltas (so true count is 1) CPU 1 increments after flush, before CPU 0's decrement CPU 0 decrements and flushes; global count is now 0. What about true count? global CPU 0 1 2 3 t true The true count is the sum of everything up to right now. But the global count only reflects the blue region. Operations in the orange region are still cached. RadixVM: Scalable address spaces for multithreaded applications

  52. Refcache example Initially: Global count is 1, no cached deltas (so true count is 1) CPU 1 increments after flush, before CPU 0's decrement CPU 0 decrements and flushes; global count is now 0. What about true count? Global count now reflects cached ops global CPU 0 1 2 3 t true The true count is the sum of everything up to right now. But the global count only reflects the blue region. Operations in the orange region are still cached. RadixVM: Scalable address spaces for multithreaded applications

  53. Refcache example Initially: Global count is 1, no cached deltas (so true count is 1) CPU 1 increments after flush, before CPU 0's decrement CPU 0 decrements and flushes; global count is now 0. What about true count? Global count now reflects cached ops global CPU 0 1 2 3 t true The true count is the sum of everything up to right now. But the global count only reflects the blue region. Operations in the orange region are still cached. Abort delete RadixVM: Scalable address spaces for multithreaded applications

  54. Refcache example Initially: Global count is 1, no cached deltas (so true count is 1) CPU 1 increments after flush, before CPU 0's decrement CPU 0 decrements and flushes; global count is now 0. What about true count? Global count now reflects cached ops global CPU 0 1 2 3 t true Refcache enables time- and space-efficient The true count is the sum of everything up to right now. scalable reference counting with minimal latency. But the global count only reflects the blue region. Operations in the orange region are still cached. Abort delete RadixVM: Scalable address spaces for multithreaded applications

  55. Bringing it all together s r w x file cores (anon) (anon) (anon) (anon) Radix tree memory map 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 Per-core page tables Reference counted physical pages RadixVM: Scalable address spaces for multithreaded applications

  56. Bringing it all together s r w x file cores (anon) (anon) (anon) (anon) (anon) mmap (anon) (anon) (anon) Radix tree memory map 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 Per-core page tables Reference counted physical pages RadixVM: Scalable address spaces for multithreaded applications

  57. Bringing it all together s r w x file cores (anon) (anon) (anon) (anon) (anon) (anon) (anon) (anon) Radix tree memory map 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 Per-core page tables Reference counted physical pages RadixVM: Scalable address spaces for multithreaded applications

  58. Bringing it all together s r w x file cores (anon) (anon) (anon) (anon) (anon) Page fault (anon) (anon) (anon) Radix tree memory map 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 Per-core page tables Reference counted physical pages RadixVM: Scalable address spaces for multithreaded applications

  59. Bringing it all together s r w x file cores (anon) (anon) (anon) (anon) Record faulting CPU (anon) Page fault (anon) Allocate (anon) (anon) backing page Radix tree memory map 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 Install in local page table 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 Per-core page tables Reference counted physical pages RadixVM: Scalable address spaces for multithreaded applications

  60. Bringing it all together s r w x file cores (anon) (anon) (anon) (anon) (anon) (anon) (anon) (anon) Radix tree memory map 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 Per-core page tables Reference counted physical pages RadixVM: Scalable address spaces for multithreaded applications

  61. Bringing it all together s r w x file cores (anon) (anon) (anon) (anon) munmap (anon) (anon) Release (anon) (anon) backing pages Shootdown Clear Radix tree memory map page table 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 Per-core page tables Reference counted physical pages RadixVM: Scalable address spaces for multithreaded applications

  62. Bringing it all together s r w x file cores (anon) (anon) (anon) (anon) Radix tree memory map 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01010 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 01100 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 11001 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 10100 Per-core page tables Reference counted physical pages RadixVM: Scalable address spaces for multithreaded applications

  63. Implementation We built RadixVM in a custom research kernel. We believe RadixVM could be built in a mainstream kernel. All benchmarks are source-compatible with Linux. RadixVM: Scalable address spaces for multithreaded applications

  64. The other 99% is perspiration Booting 80 cores (ACPI, x2APIC, IOMMU, oh my!) NUMA-aware everything (memory allocation, per-CPU data, etc) Performance analysis tools (NMI profiling, PEBS, load latency profiling, statistics counters) Hardware curve balls (false sharing, bad prefetch behavior, etc) All necessary for good results; all standard engineering. RadixVM: Scalable address spaces for multithreaded applications

  65. Evaluation Does parallel mmap/munmap matter to applications? Are all of RadixVM's components necessary for scalability? RadixVM: Scalable address spaces for multithreaded applications

  66. RadixVM improves application scalability Metis multicore MapReduce [Mao '10], inverse indexing application 1200 RadixVM Total throughput (jobs/hour) Linux 3.5.7 1000 800 600 400 200 0 1 10 20 30 40 50 60 70 80 # cores RadixVM: Scalable address spaces for multithreaded applications

  67. RadixVM improves application scalability Metis multicore MapReduce [Mao '10], inverse indexing application 1200 RadixVM Total throughput (jobs/hour) Linux 3.5.7 1000 800 600 400 200 Page fault lock contention 0 1 10 20 30 40 50 60 70 80 # cores RadixVM: Scalable address spaces for multithreaded applications

  68. RadixVM improves application scalability Metis multicore MapReduce [Mao '10], inverse indexing application 1200 RadixVM Total throughput (jobs/hour) Linux 3.5.7 1000 Pairwise sharing 800 600 400 200 Page fault lock contention 0 1 10 20 30 40 50 60 70 80 # cores RadixVM: Scalable address spaces for multithreaded applications

  69. Radix trees avoid communication 350M Radix tree Total throughput (lookups/sec) Lock-free skiplist 300M ~No communication 250M Linear scalability 200M 150M 100M 50M 0 1 10 20 30 40 50 60 70 80 # cores (n/2 readers, n/2 writers) lookup existing keys insert/delete random keys RadixVM: Scalable address spaces for multithreaded applications

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