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Priority-based Wormhole Networks-on-Chip: challenges and - - PowerPoint PPT Presentation

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Leandro Soares Indrusiak Priority-based Wormhole Networks-on-Chip: challenges and opportunities Leandro Soares Indrusiak Real-Time Systems Group Department of Computer Science University of York United Kingdom RTN 2017 1 Real-Time Systems

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1 Leandro Soares Indrusiak Real-Time Systems Group

Priority-based Wormhole Networks-on-Chip: challenges and opportunities

Leandro Soares Indrusiak

Real-Time Systems Group Department of Computer Science University of York United Kingdom

RTN 2017

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2 Leandro Soares Indrusiak Real-Time Systems Group

Outline

  • Wormhole Networks
  • Networks-on-Chip
  • Real-Time Analysis
  • Resource Management
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3 Leandro Soares Indrusiak Real-Time Systems Group

Motivation

  • Multiprocessor and multicore systems

forced a shift towards communication- centric design

abundant computation resources shared communication media

  • Inter-processor communication

point-to-point bus networks

source: IBM, Intel

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4 Leandro Soares Indrusiak Real-Time Systems Group

Networks – key characteristics

  • topology

mesh, star, torus…

  • routing protocol

deterministic, adaptive…

  • arbitration

round-robin, priority preemptive, priority non- preemptive, TDM…

  • buffering

FIFO, SAFC, SAMQ, DAMQ, hot potato…

  • flow control protocol

handshake, credit-based…

  • switching protocol

circuit, store-and-forward, wormhole

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5 Leandro Soares Indrusiak Real-Time Systems Group

Networks – key characteristics

  • topology

mesh, star, torus…

  • routing protocol

deterministic, adaptive…

  • arbitration

round-robin, priority preemptive, priority non- preemptive, TDM…

  • buffering

FIFO, SAFC, SAMQ, DAMQ, hot potato…

  • flow control protocol

handshake, credit-based…

  • switching protocol

circuit, store-and-forward, wormhole

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6 Leandro Soares Indrusiak Real-Time Systems Group

Circuit switching

  • Packets are forwarded through dedicated paths that are

kept until the transmission is finished

  • Contention can arise when establishing a path

 no further contention once path is established

  • Temporary packet buffering in routers is not required
  • Suitable to long and infrequent messages

 time to establish a path can be high

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7 Leandro Soares Indrusiak Real-Time Systems Group

Circuit Switching

Terminal

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

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8 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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9 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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10 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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11 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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12 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

A segment of reserved path is idle for a significant period

  • f time.

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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13 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

A segment of reserved path is idle for a significant period

  • f time.

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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14 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

A segment of reserved path is idle for a significant period

  • f time.

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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15 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

A segment of reserved path is idle for a significant period

  • f time.

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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16 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

A segment of reserved path is idle for a significant period

  • f time.

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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17 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

A segment of reserved path is idle for a significant period

  • f time.

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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18 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

A segment of reserved path is idle for a significant period

  • f time.

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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19 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

A segment of reserved path is idle for a significant period

  • f time.

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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20 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

A segment of reserved path is idle for a significant period

  • f time.

Circuit Switching

Terminal Terminal

Packet Header Packet Data

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21 Leandro Soares Indrusiak Real-Time Systems Group

SAF Switching

  • SAF - Store And Forward
  • Routers can only forward a packet once it is completely

received and stored

 packet acquires one link at a time

  • Router input ports must have enough buffering space to

temporarily store a complete packet

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22 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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23 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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24 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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25 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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26 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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27 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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28 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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29 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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30 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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31 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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32 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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33 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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34 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

SAF Switching

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35 Leandro Soares Indrusiak Real-Time Systems Group

Wormhole switching

  • Packet is routed and forwarded as soon the header flit has

arrived

 payload flits follow header

  • Input ports does not need to buffer a complete packet

flits of a packet can be stored across multiple routers

  • Trade-off between buffer overheads and network contention
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36 Leandro Soares Indrusiak Real-Time Systems Group

Wormhole Switching

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

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37 Leandro Soares Indrusiak Real-Time Systems Group

Wormhole Switching

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

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38 Leandro Soares Indrusiak Real-Time Systems Group

Wormhole Switching

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

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39 Leandro Soares Indrusiak Real-Time Systems Group

Wormhole Switching

Switch Switch Switch Switch Switch Switch

Terminal

Packet Header Packet Data

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40 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Wormhole Switching

Terminal

Packet Header Packet Data

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41 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Wormhole Switching

Terminal

Packet Header Packet Data

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42 Leandro Soares Indrusiak Real-Time Systems Group

Switch Switch Switch Switch Switch Switch

Wormhole Switching

Terminal

Packet Header Packet Data

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43 Leandro Soares Indrusiak Real-Time Systems Group

Wormhole Networks-on-Chip

  • Small buffering overheads
  • f wormhole networks is

particularly attractive to a special class of resource- constrained networks: Networks-on-Chip (NoCs)

small buffers mean smaller area and lower energy dissipation

PE PE PE PE PE PE PE PE R PE R R R R R R R R

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44 Leandro Soares Indrusiak Real-Time Systems Group

Wormhole Networks-on-Chip

PE PE PE PE PE PE PE PE R PE R R R R R R R R

Core Router Link

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45 Leandro Soares Indrusiak Real-Time Systems Group

Wormhole Networks-on-Chip

PE PE PE PE PE PE PE PE R PE R R R R R R R R

Link

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arbitration routing & transmission control routing & transmission control

data out data in data out data in data out data in data out data in data out data in

PE PE PE PE PE PE PE PE R PE R R R R R R R R

Wormhole Networks-on-Chip

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47 Leandro Soares Indrusiak Real-Time Systems Group

Wormhole Networks-on-Chip

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48 Leandro Soares Indrusiak Real-Time Systems Group

NoC parallelism and scalability

CPU CPU CPU CPU RAM CPU I/O CPU

Multiple connections simultaneously

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NoC performance

link contention leads to latency variability

CPU CPU CPU CPU RAM CPU I/O CPU

task contention leads to latency variability

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Time predictability in embedded NoCs

  • Ability to guarantee an upper bound
  • n the system’s temporal behaviour

 worst-case response time of each task  worst-case latency of each NoC packet  worst-case end-to-end latencies of communicating task chains

  • Ability to constrain the variability of

the system’s temporal behaviour

 limited best/worst case difference

upper bound

time time frequency frequency

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51 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Wormhole Networks-on-Chip

PE

Packet Header Packet Data

PE

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52 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Wormhole Networks-on-Chip

PE

Packet Header Packet Data

PE

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53 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Wormhole Networks-on-Chip

PE

Packet Header Packet Data

PE

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54 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Wormhole Networks-on-Chip

PE

Packet Header Packet Data

PE

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R R R R R R

Wormhole Networks-on-Chip

PE

Packet Header Packet Data

PE

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R R R R R R

Wormhole Networks-on-Chip

PE

packet is blocked Packet Header Packet Data

PE

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R R R R R R

Wormhole Networks-on-Chip

PE

Packet Header Packet Data

PE

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R R R R R R

Wormhole Networks-on-Chip

PE

Packet Header Packet Data

PE

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59 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Wormhole Networks-on-Chip

PE

new packet released Packet Header Packet Data

PE

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60 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Wormhole Networks-on-Chip

PE

Packet Header Packet Data

PE

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61 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Wormhole Networks-on-Chip

PE

Packet Header Packet Data

PE

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R R R R R R

Wormhole Networks-on-Chip

PE

Packet Header Packet Data

PE

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63 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Wormhole Networks-on-Chip

PE

Packet Header Packet Data

PE

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64 Leandro Soares Indrusiak Real-Time Systems Group

Performance guarantees in embedded NoCs

  • As the core counts increase, NoC link

contention tends to me the dominant source of latency variability

  • Current solutions

Full traffic separation (i.e. no link contention)

  • deterministic routing, fully disjoint routes (e.g. Hermes)
  • multiple overlay networks (e.g. Tilera)
  • contention over NIs and memory still possible
  • circuit switching (e.g. PNoC)
  • unpredictable circuit setup time
  • very low utilisation
  • state of the art: mixed criticality, virtual traffic separation
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65 Leandro Soares Indrusiak Real-Time Systems Group

Performance guarantees in embedded NoCs

  • As the core counts increase, NoC link

contention tends to me the dominant source of latency variability

  • Current solutions

Virtual traffic separation

  • time-division multiplexing (TDM)
  • fixed traffic slotting (e.g. Aethereal, AElite)
  • round-robin (RR)
  • rate controlling (e.g. Kalray, Nostrum, IDAMC)
  • fixed-priority (FP)
  • priority-arbitrated virtual channels (e.g. QNoC)
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66 Leandro Soares Indrusiak Real-Time Systems Group

Priority preemptive virtual channels

  • Wormhole NoCs using virtual channels

with priority preemptive arbitration can discriminate packets of different levels of urgency

  • Matches previous work on schedulability

analysis in priority-preemptive wormhole networks

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67 Leandro Soares Indrusiak Real-Time Systems Group

Priority preemptive virtual channels

…

highest priority with remaining credit data_in credit_out data_out credit_in

…

routing & transmission control priority ID

…

highest priority with remaining credit

…

routing & transmission control

PE PE PE PE PE PE PE PE R PE R R R R R R R R

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R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

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69 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

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70 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

high priority packet released

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R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

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R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

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R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

first packet is preempted

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R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

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R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

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76 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

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77 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

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78 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

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79 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

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80 Leandro Soares Indrusiak Real-Time Systems Group

R R R R R R

Priority preemptive virtual channels

PE

wormhole NoC with priority preemptive virtual channels

Packet Header Packet Data

PE

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81 Leandro Soares Indrusiak Real-Time Systems Group

Priority-preemptive wormhole NoCs

Pros vs Cons

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82 Leandro Soares Indrusiak Real-Time Systems Group

Priority-preemptive wormhole NoCs

  • Cons

 not available as COTS

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83 Leandro Soares Indrusiak Real-Time Systems Group

Priority-preemptive wormhole NoCs

  • Cons

 hardware overhead related to virtual channel buffering and arbitration

Xilinx Artix FPGA

  • B. Sudev, L. S. Indrusiak: Low overhead predictability enhancement in non-preemptive network-on-chip routers using Priority Forwarded Packet
  • Splitting. ReCoSoC 2014.
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84 Leandro Soares Indrusiak Real-Time Systems Group

Priority-preemptive wormhole NoCs

  • Cons

 hardware overhead related to virtual channel buffering and arbitration

simple round-robin, no traffic shaping

Xilinx Artix FPGA

  • B. Sudev, L. S. Indrusiak: Low overhead predictability enhancement in non-preemptive network-on-chip routers using Priority Forwarded Packet
  • Splitting. ReCoSoC 2014.
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85 Leandro Soares Indrusiak Real-Time Systems Group

Priority-preemptive wormhole NoCs

  • Cons

 hardware overhead related to virtual channel buffering and arbitration

priority non- preemptive arbitration [Sudev & Indrusiak, ReCoSoC 2014]

Xilinx Artix FPGA

OPEN PROBLEM ALERT

  • B. Sudev, L. S. Indrusiak: Low overhead predictability enhancement in non-preemptive network-on-chip routers using Priority Forwarded Packet
  • Splitting. ReCoSoC 2014.
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86 Leandro Soares Indrusiak Real-Time Systems Group

Priority-preemptive wormhole NoCs

  • Cons

 hardware overhead related to virtual channel buffering and arbitration

priority preemptive arbitration, 4 VCs with 2 position buffers each

Xilinx Artix FPGA

  • B. Sudev, L. S. Indrusiak: Low overhead predictability enhancement in non-preemptive network-on-chip routers using Priority Forwarded Packet
  • Splitting. ReCoSoC 2014.
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87 Leandro Soares Indrusiak Real-Time Systems Group

Priority-preemptive wormhole NoCs

  • Pros

 notion of priorities is very intuitive and natural  no waste of bandwidth through reservation mechanisms  amenable to tight analysis methods (more on this later)  virtual separation of traffic  accommodates change in traffic properties (periods, packet sizes, jitter)

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88 Leandro Soares Indrusiak Real-Time Systems Group

Priority-preemptive wormhole NoCs

  • Pros

 simple protocols to handle mixed-criticality traffic

  • L. S. Indrusiak, J. Harbin, A. Burns: Average and Worst-Case Latency Improvements in Mixed-Criticality Wormhole Networks-on-Chip. ECRTS 2015.

C R R R R C R R C R R C R C C C C C

mode change notification

C R R R R C R R C R R C R C C C C C

after a mode change, routers arbitrate links in criticality order, and in priority

  • rder within the

same criticality

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89 Leandro Soares Indrusiak Real-Time Systems Group

Priority-preemptive wormhole NoCs

vs

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90 Leandro Soares Indrusiak Real-Time Systems Group

Outline

  • Wormhole Networks
  • Networks-on-Chip
  • Real-Time Analysis
  • Resource Management
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91 Leandro Soares Indrusiak Real-Time Systems Group

Performance evaluation

  • How to estimate performance figures for a particular

application mapped to a Network-on-Chip?

 full system prototyping

  • cores + NoC in FPGA, running OS + application
  • extremely costly setup time, can only explore few design alternatives

 accurate system simulation

  • cycle-accurate model of cores + NoC, running OS + application
  • extremely long simulation time, can only explore few design alternatives

 approximately-timed system simulation

  • approximately-timed model of cores + NoC, executing an abstract model of

the OS + application

 analytical system performance models

  • average or worst-case latency estimation for restricted application styles

(periodic independent tasks, synchronous dataflow, etc.)

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92 Leandro Soares Indrusiak Real-Time Systems Group

Performance evaluation

  • How to estimate performance figures for a particular

application mapped to a Network-on-Chip?

 full system prototyping

  • cores + NoC in FPGA, running OS + application
  • extremely costly setup time, can only explore few design alternatives

 accurate system simulation

  • cycle-accurate model of cores + NoC, running OS + application
  • extremely long simulation time, can only explore few design alternatives

 approximately-timed system simulation

  • approximately-timed model of cores + NoC, executing an abstract model of

the OS + application

 analytical system performance models

  • average or worst-case latency estimation for restricted application styles

(periodic independent tasks, synchronous dataflow, etc.)

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93 Leandro Soares Indrusiak Real-Time Systems Group

Real-Time Analysis

  • First approaches to analyse priority-preemptive

wormhole networks came during the 90s

 Mutka (1994)  Hary and Ozguner (1997)

  • Key idea is to consider the entire path of a packet

as a single shared resource

 worst-case latency bound of a packet flow can be found by analysing the higher priority packet flows that share at least one link of its route

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94 Leandro Soares Indrusiak Real-Time Systems Group

Real-Time Analysis

PE PE PE PE PE PE PE PE R PE R R R R R R R R

t4 t3 t2 t1 pri(t1)>pri(t2)>pri(t3)>pri(t4) t2 t4 t3 t1 interference graph

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95 Leandro Soares Indrusiak Real-Time Systems Group

Real-Time Analysis

  • Kim et al (1998) recognised

that direct interferences are not enough to produce correct upper bounds

  • Indirect interference must

be considered, in order to take into account back-to- back hits caused by upstream indirect interference

PE PE PE PE PE PE PE PE R PE R R R R R R R R

t2 t3 t1 pri(t1)>pri(t2)>pri(t3)

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96 Leandro Soares Indrusiak Real-Time Systems Group

Real-Time Analysis

  • With the introduction of Networks-on-Chip in the

2000s, the approach of Kim et al was revisited by Lu et al (ASP DAC 2005)

aiming to provide upper bounds to sporadic packets over NoCs with priority preemptive virtual channels flawed assumption of a critical instant where all packets start flowing simultaneously

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97 Leandro Soares Indrusiak Real-Time Systems Group

Real-Time Analysis

  • Shi and Burns (NOCS 2008) corrected the flaw
  • n Lu et al and produced a response time

formulation that uses a conservative approach to upstream indirect interference

interference jitter Jj

I = Rj-Lj

OPEN PROBLEM ALERT

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98 Leandro Soares Indrusiak Real-Time Systems Group

Real-Time Analysis

  • Several lines of work were derived from Shi and

Burns 2008

highly cited: 145 (Google Scholar) many works on priority assignment and task mapping a few on analysis improvement, aiming to make it tighter

  • Nikolic et al (arxiv 2016) considered that the interference should not

be calculated based on the full path, but the contention domain

  • Kashif et al (Trans Comp 2015) attempted to analyse packet paths
  • n a link-by-link manner, but assumed infinite buffering (i.e. did not

consider backpressure)

  • Kashif and Patel (RTAS 2016) attempted to consider buffering and

backpressure effects

  • all of them upper-bounded by Shi and Burns 2008
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Real-Time Analysis

  • Xiong et al (GLSVLSI 2016) has made two key

contributions

new formulation to the upstream indirect interference problem, aiming to be tighter than Shi and Burns 2008 new formulation to the downstream indirect interference problem, aiming to capture a previously unseen issue, and showing that Shi and Burns 2008 is optimistic and unsafe (and so are all the analyses upper-bounded by it)

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Real-Time Analysis

  • Indrusiak et al (arxiv 2016) has shown that

Xiong et al’s formulation to the upstream indirect interference problem was flawed Xiong et al’s formulation to the downstream indirect interference problem was correct, but unnecessarily pessimistic (i.e. it assumed all indirect interference as if it is direct interference) a tighter upper bound that considers the downstream indirect interference problem is possible

  • Xiong et al published a corrected analysis on

IEEE Trans Comp in 2017

OPEN PROBLEM ALERT

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101 Leandro Soares Indrusiak Real-Time Systems Group

Outline

  • Wormhole Networks
  • Networks-on-Chip
  • Real-Time Analysis
  • Resource Management
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102 Leandro Soares Indrusiak Real-Time Systems Group

Resource Management

  • Analytical models can be used to test

whether a particular NoC configuration meets its hard real-time constraints

  • It can be used as a fitness function in a

search-based optimisation

guides the search towards full schedulability much faster than simulation, therefore can cover a wider search space

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103 Leandro Soares Indrusiak Real-Time Systems Group

  • P. Mesidis and L. S. Indrusiak, “Genetic mapping of hard real-time applications onto NoC-based MPSoCs — A first approach,” in Int Workshop on

Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2011.

  • M. N. S. M. Sayuti and L. S. Indrusiak, “Real-time low-power task mapping in Networks-on-Chip,” in IEEE Computer Society Annual Symposium on

VLSI (ISVLSI), 2013.

Optimisation Algorithm

  • Optimisation performed by a population-based

evolutionary algorithm

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104 Leandro Soares Indrusiak Real-Time Systems Group

Optimisation Algorithm

  • A population contains a group of individuals represented

by a chromosome structure

  • Creation of new individuals is facilitated by operators:

 Selection  Crossover  Mutation

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105 Leandro Soares Indrusiak Real-Time Systems Group

Optimisation algorithm

  • Goal: evolve a fully schedulable mapping
  • ver generations

# unschedulable tasks and flows generations

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106 Leandro Soares Indrusiak Real-Time Systems Group

Experiment results

  • Autonomous vehicle application (AVA) benchmark (38

communicating tasks), 4x4 Mesh NoC

  • M. N. S. M. Sayuti and L. S. Indrusiak, “Real-time low-power task mapping in Networks-on-Chip,” in IEEE Computer Society Annual Symposium on

VLSI (ISVLSI), 2013.

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107 Leandro Soares Indrusiak Real-Time Systems Group

Multi-objective optimisation algorithm

  • Additional fitness functions can be added to the

evolutionary algorithm

 example: evolve mappings that are fully schedulable and low power

# unschedulable tasks and flows generations dissipated power generations

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108 Leandro Soares Indrusiak Real-Time Systems Group

  • Autonomous vehicle

application (AVA) benchmark, 4x4 Mesh

  • Comparison of best

solution convergence between single and multiple objectives

Experiment results

  • M. N. S. M. Sayuti and L. S. Indrusiak, “Real-time low-power task mapping in Networks-on-Chip,” in IEEE Computer Society Annual Symposium on

VLSI (ISVLSI), 2013.

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109 Leandro Soares Indrusiak Real-Time Systems Group

  • Synthetic application

(SA) benchmark, 4x4 Mesh

  • Comparison of best

solution convergence between single and multiple objectives

Experiment results

  • M. N. S. M. Sayuti and L. S. Indrusiak, “Real-time low-power task mapping in Networks-on-Chip,” in IEEE Computer Society Annual Symposium on

VLSI (ISVLSI), 2013.

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110 Leandro Soares Indrusiak Real-Time Systems Group

  • Synthetic application

(SA) benchmark, 5x5 Mesh

  • Comparison of best

solution convergence between single and multiple objectives

Experiment results

  • M. N. S. M. Sayuti and L. S. Indrusiak, “Real-time low-power task mapping in Networks-on-Chip,” in IEEE Computer Society Annual Symposium on

VLSI (ISVLSI), 2013.

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111 Leandro Soares Indrusiak Real-Time Systems Group

Conclusions

  • Priority-preemptive wormhole networks

have interesting properties, making them amenable to real-time analysis

  • Analysis is less trivial than originally

thought

advances needed on accounting for indirect interference

  • Analytical models are useful guides to

search heuristics attempting to configure multiple system aspects

task mapping, packet routing, priority assignment, security features, voltage and frequency scaling

OPEN PROBLEM ALERT OPEN PROBLEM ALERT

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112 Leandro Soares Indrusiak Real-Time Systems Group

Priority-based Wormhole Networks-on-Chip: challenges and opportunities

RTN 2017

Leandro Soares Indrusiak

with contributions by: Alan Burns, Rob Davis, Iain Bate, Neil Audsley, James Harbin, Piotr Dziurzanski, Amit Singh, Paris Mesidis, Adrian Racu, Norazizi Sayuti, Zheng Shi, Yunfeng Ma, Rosh Mendis, Bharath Sudev with funding from: EU (DreamCloud, T-CREST), EPSRC (MCC, MCCps)