Port of a fixed point MPEG2-AAC encoder on a ARM platform Romain - - PowerPoint PPT Presentation

Port of a fixed point MPEG2-AAC encoder

• n a ARM platform

Romain Pagniez University College Dublin

Information Hiding Laboratory Department of Computer Science Belfield, Dublin 4 – Ireland http://ihl.ucd.ie/

⊲ UCD, August 2004

Overview

Introduction Perceptual Audio Coding Fixed Point Elements Development Toolset Implementation Results Summary

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Introduction: hardware encoding

MPEG2 AAC: state of the art in perceptual audio compression. It

achieves a compression rate about 30% higher than mp3. Compressed stereo audio at 128 kbit/s is indistinguishable from the original 1.4 Mbit/s CD quality.

MPEG-like perceptual encoders are quite complex and involve a

significant amount of calculations.

Computing the algorithm on a dedicated hardware chip could be an

efficient solution allowing fast encoding at reduced cost.

Hardware encoding research is been conduced in the IHL on that

specific subject and particularly highlights fixed point encoding.

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Introduction: main points of my work

Having the encoder properly working on a ARM platform. Communication functions: serial port of the board. Ethernet port. Double precision multiplication algorithm.

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Introduction: workflow

AAC Specifications Floating Point Software Encoder Fixed Point Software Encoder Fixed Point ARM Encoder Fixed Point FPGA Encoder

Keith Cullen (PhD) Keith Cullen (PhD) Alexis Guerin (MSc) My project

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Perceptual Audio Coding: Encoding

Filterbank Time / Frequency Mapping Digital Audio Input Bit / Noise Allocation and Coding Bitstream Formatting Psychoacoustic Model Encoded Bitstream Ancillary Data (optional)

Filter bank:

divides the input stream into multiple subbands of frequency.

Psychoacoustic model: simultaneously determines the overall masking

threshold for each subband.

Allocation block: uses the masking threshold to decide how many

bits should be used.

Bitstream formatting: multiplexes all the data to be transmitted.

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Perceptual Audio Coding: Threshold in Quiet

10

1

10

2

10

3

10

4

20 40 60 80 100

Frequency (Hz) Sound Pressure Level (dB) Threshold in Quiet

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Perceptual Audio Coding: Threshold in Quiet

Frequency Amplitude MaskingThreshold MaskingTone MaskedTone

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Perceptual Audio Coding: Masking

Time Level (dB) Frequency

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Fixed point

S

2 2 2 2

1

• 2
• 1

WL IWL FWL

Fixed point representation virtually places a radix point somewhere

in the middle of the digits and uses integer arithmetics.

This is equivalent to considering integers of portion of some unit. For example, one might represent 1/100ths of a unit; with 4 decimal

digits, 10.82 or 00.01 can be represented.

What is the more accurate position for the radix point ?

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Fixed point: range and error

Range 4-bit Unsigned Step Size

1.00000 0.50000 0.25000 0.12500 0.06250 2.00000 0.03125 [0, 0.93750] [0, 7.50000] [0, 30.00000] [0, 15.00000] [0, 1.87500] [0, 0.46875] [0, 3.75000]

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Fixed point: optimal position

The optimal position of the radix point must be chosen considering

precision and range of data.

The goal is to minimize error: overflow must be avoided and precision

maximized.

Position of the binary point may vary along the encoding process. Simulations must be carried out to determine the optimal position of

each binary point.

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Development Toolset: development kit

EPXA1 development board: EPXA1F484C device

• ARM922T 32-bit RISC microprocessor
• 100 k gates APEX 20KE FPGA

32 Mo RAM 8 Mo flash 100 Mbit Ethernet JTAG header LCD display Quartus II software GNUpro compiler

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Development Toolset: development board

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Development Toolset: architecture

ARM PLD

LCD Serial Port Switch LEDs Ethernet etc. AHB

The PLD is the only interface of the ARM processor. We must configure the FPGA.

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Development Toolset: flash programming

Quartus II Software Builder quartus_swb

Software Source Files

MegaWizard Plug-in Manager

System Build Descriptor File Slave Binary Image File From Quartus II Hardware Compiler (full compilation) Flash Programming File Simulator Initialisation Files To Quartus II Simulator or

• ther EDA

Simulation Tools

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Implementation: simulation files

Simulation program running on a PC

Fixed Point AAC Encoder

Simulated fixed point environment Audio data

AAC Compressed audio file

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Implementation: master slave architecture

Master program running on a host PC

Fixed Point AAC Encoder

Audio data

AAC Compressed audio file

Slave fixed point encoder running on the EPXA1

Communication Functions Communication Functions

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Implementation: communication sequence

Bit Rate (4 Bytes) encode (2 Bytes) 1024 audio samples (mono - 1024 * 2 Bytes)

• r 2048 audio samples (stereo - 2048 * 2 Bytes)

Number of samples (4 Bytes) Bytes per sample (4 Bytes) Sample Rate (4 Bytes) Number of channels (4 Bytes) encode (2 Bytes) Size of Buffer (4 Bytes) Encoded Bitstream (size_of_buffer * 1 Byte) Size of Buffer (4 Bytes) Encoded Bitstream (size_of_buffer * 1 Byte) STOP (2 Bytes) Size of Buffer (4 Bytes) Encoded Bitstream (size_of_buffer * 1 Byte)

From Host PC to Board From Board to Host PC

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Implementation: naive vs overlapped protocol

AAC Encoding AAC Encoding AAC Encoding

Host PC EPXA1 Dev. Board Host PC EPXA1 Dev. Board

AAC Encoding AAC Encoding AAC Encoding AAC Encoding Time

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Results: communication vs computations

Naive implementation

Proportion Real Time Communications 8.63 s 0.411 s/frame 48.6 % × 0.056 Computations 8.88 s 0.434 s/frame 51.4 % × 0.053 Total 17.51 s 0.845 s/frame 100 % × 0.027

Communication overlapped with (faster) computations

Proportion Real Time Communications 140 s 0.392 s/frame 100 % × 0.059 Computations 93 s 0.260 s/frame 66.3 % × 0.089 Total 140 s 0.392 s/frame 100 % × 0.059

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Results: overlapped and high speed mult.

Encoding time for the communication overlapped with computations

encoder (high speed multiplication) at 128 kbit/s. Encoding Time Real Time 86.1 ko 0.48 s 8.30 s 0.415 s/frame × 0.058 1.41 Mo 8.45 s 139.3 s 0.385 s/frame × 0.063 10.9 Mo 1 min 04 s 1065 s 0.384 s/frame × 0.060

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Conclusion

The encoder works as expected Communications on the serial port, even if slower the Ethernet, are

sufficient to manage the encoding of a complete file

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