ARM v4T CS2253 Owen Kaser, UNBSJ ARM v4T History of ARM - PowerPoint PPT Presentation

ARM v4T CS2253 Owen Kaser, UNBSJ

ARM v4T ● History of ARM processors ● R is for RISC ● Registers ● Status flags and conditional execution ● Memory ● Example program

History of ARM v4T ● Acorn Computers in the UK, early 1980s ● Designed own CPU for a line of PCs, based on cutting-edge design trends then. ● Cutting edge was RISC: Reduced Instruction Set Computers. ● ARM was the Acorn RISC Machine ● Circa 1990, retitled Advanced RISC Machine and the design was licensed to other companies to manufacture or add extra components, as part of a System-on-a-Chip. ● Like the extra stuff to make an Apple Newton, an iPod, a Nokia phone...

History of ARM v4T, cont. ● The ISA has been added to over the years. ARM v4T dates from early 1990s. ● Actually, v4T has the regular 32-bit ARM ISA and a simpler Thumb ISA, where instructions can be 16 bits long. We ignore Thumb in CS2253. ● New versions of the ISA have come out in the meantime (though old are still being produced). ● ISAs that evolve tend to get ugly, preserving backwards compatibility. There is now a 64-bit ISA that apparently is once again clean. Maybe we can shift 2253 to it in future.

ARM is Popular ● ARM variations are the champion in popularity for mobile devices. ● By 2002, there were 1.3 billion manufactured ● In just 2012, 8.7 billion were manufactured.

What's RISC? ● The R in ARM stands for Reduced Instruction Set Computer. – in contrast to the extremely complicated CPUs of the late 1970s (VAX had an “evaluate polynomial” instruction, for instance) A “CISC” machine has some advantages, in “code density”. – complex means expensive to make, and hard to make run fast. – RISC tried to simplify ISAs, so implementation can be simple and fast.

RISC Principles ● There should be a small number of instructions. ● Every instruction should do something very simple, so it can run in 1 clock cycle. ● All machine codes should be the same length (32 bits). ● There should be relatively few different machine code formats. ● Should be a fair number of storage registers, and most operations should involve only them. ● Values should be transferred between RAM and registers by explicit Load and Store instructions.

ARM v4T Components ● There are 15 main registers, R0 to R14. Each can store any 32-bit value. R13 and R14 are a tad special. ● As a first approximation, a HLL programmer can view them as the only real “variables” you have. ● R15 is also called PC (Program Counter) and keeps track of where to fetch instructions. ● Due to “pipelining”, when an instruction executes, PC actually stores the address of the instruction that is 8 bytes ahead. Pipelining is an advanced CS3813 topic.

Example Instructions ● Add two register values, result in 3 rd register. ● Exclusive-OR two register values, results in 3 rd . ● Change the program counter (subtract 16 from it) ● Get a halfword from memory, at an address that is 10 more than the current value of R1. Sign extend it and put it in R2. Modify R1 to be increased by 10. ● Store the first byte in R1 into memory, address obtained by taking R2 and shifting it left 2, then adding that value to R3. In each case, the technical ARM documentation can tell you how the instruction would be encoded into bits.

ARM Components: CPSR ● The Current Program Status Register is a collection of 12 miscellaneous bits. – 4 keep track of how recent instructions went (“status flags”) – 8 allow you to see and control the processor configuration (“control bits”). We don't need them initially. ● Chapter 2 of the textbook tells you about other advanced concepts that aren't needed until the hardest parts of the course, much later. ● Please ignore anything about “processor modes” other than User, for now.

Status Flags ● Most ISAs (except the MIPS ISAs we often study in CS3813) use status flags. ● They help record the outcome of an earlier instruction, so that your program can do different things, depending on what happened earlier. ● Flags are N (bit 31 was 1), Z (all bits were 0), V (result oVerflowed), and C (there was a Carry out) ● Many instructions have a version that updates the flags and another that doesn't. But some instructions always update the flags.

Conditional Execution ● Most ARM instructions can be made conditional, so they do nothing unless the specified status flags are set. ● Example: 64-bit counter. – First instruction sets flags while incrementing the low-order 32 bits – Second instruction runs conditionally and only increments the high-order 32 bits if the Z flag is set – Maybe low-order bits in R1 and high-order in R2 ● Non-ARM ISAs generally have only a few conditional instructions (the ones that implement IF)

Constants ● Many ARM operations can use constants (just like you can add two registers together, you can add a register to a constant, etc.) ● ARM constants are weird. Numbers -128 to 255 are okay, as are a few larger numbers ● Allowable larger numbers are those obtained by rotations of 0-255 by an even number of positions, etc. More later.

Memory ● The ARM processor is byte addressed, in that every byte of memory has its own address, starting from address 0. ● Addresses are 32 bits long, leading to a maximum of 4GB of memory (at least for a given running program). [But note that some addresses are typically carved out for non-memory.] ● Special Load and Store instructions are used to access memory. You can transfer 1, 2 or 4 bytes in one operation. ● In ARMv4, 4-byte transfer must begin at a memory address that is a multiple of 4: the alignment rule. Similarly, 2-byte transfers must begin at an even address.

Big Endian vs Little Endian ● When a 4-byte word is laid out in memory, does the most-significant byte (big end) come first, or the least-significant byte (little end)? ● A religious war arose between the two camps. ● ARM7TDMI processor can do either, but the default for ARM is usually little-endian. ● The issue is only visible if you write a word/halfword into memory and then try to read it back in smaller pieces (eg bytes).

Example Program ● Compute 10+9+8+7+6+5+4+3+2+1 – Put the constant 0 into R1 – Put the constant 10 into R2 – Add R1 and R2, put the result into R1 – Subtract the constant 1 from R2 and set the status flags – If the Z flag is not set, reset the PC to contain the address of the 3 rd instruction above. ● Each of these instructions can be encoded into machine code, if you are willing to slog through the reference manuals enough.