SLIDE 1
PMT driver status update 2 Continuation from presentation 2 weeks - - PowerPoint PPT Presentation
PMT driver status update 2 Continuation from presentation 2 weeks - - PowerPoint PPT Presentation
10/26/17 1 1 PMT driver status update 2 Continuation from presentation 2 weeks ago: 3 What is the current status? Circuit design finished PCB design finished Final design review in progress Enclosure design in
SLIDE 2
SLIDE 3
What is the current status?
- Circuit design – finished
- PCB design – finished
- Final design review – in progress
- Enclosure design – in progress
- PCB manufacturing – to begin when review passes
- Assembly – to begin when components and PCB arrive
- Testing and debugging – not started
3
SLIDE 4
PMT driver specifications
- PMT power (15V) and individual PMT gain adjustment. Designed for Hamamatsu H10425
Series.
- Four input channels.
- Per PMT input channel:
- Amplifier with 6mV per 1uA gain, 350MHz bandwidth.
- Pulse height discriminator with adjustable discriminator level (0 - 3.3V) and adjustable
constant length pulse output (20ns – 5us). Timing jitter on the order of 100ps.
- Precise trigger pulse output as LVDS pair over cat5 Ethernet cable.
- Trigger pulses go through optional delay line and are combined through programmable
logic.
- Combined trigger pulse is output as TTL and LVDS.
4
SLIDE 5
Schematic overview
5
SLIDE 6
PMT signal input Amplifier Pulse height discriminator
- Adjustable threshold
- Adjustable output pulse duration
TTL trigger pulse LVDS trigger pulse Optional delay line
Programmable logic
Outputs low timing accuracy trigger pulse (~±10ns)
High timing accuracy pulses (~±200ps)
- utput over cat5 cable
6
SLIDE 7
PMT signal input Amplifier Pulse height discriminator
- Adjustable threshold
- Adjustable output pulse duration
LVDS trigger pulse Optional delay line
Programmable logic
Outputs low timing accuracy trigger pulse (~±10ns)
High timing accuracy pulses (~±200ps)
- utput over cat5 cable
TTL trigger pulse
7
SLIDE 8
PMT signal input Amplifier Pulse height discriminator
- Adjustable threshold
- Adjustable output pulse duration
TTL trigger pulse LVDS trigger pulse Optional delay line
Programmable logic
Outputs low timing accuracy trigger pulse (~±10ns)
High timing accuracy pulses (~±200ps)
- utput over cat5 cable
8
SLIDE 9
PMT signal input Amplifier Pulse height discriminator
- Adjustable threshold
- Adjustable output pulse duration
TTL trigger pulse LVDS trigger pulse Optional delay line
Programmable logic
Outputs low timing accuracy trigger pulse (~±10ns)
High timing accuracy pulses (~±200ps)
- utput over cat5 cable
9
SLIDE 10
Programmable logic
10
SLIDE 11
22cm 16cm 11
SLIDE 12
Coaxial input
Terminated to 50Ω
Buffer Buffer Buffer Inverting amplifier
21.6 dB
Noninverting amplifier
20.2 dB
Amplifier chain overview
SLIDE 13
Decoupling inductors.
Prevents high frequency signals from propagating on the power rails. These can couple into other amplifiers, creating positive feedback, instabilities, crosstalk, and ringing.
Analog ground plane
Quiet
Digital ground plane
Possibly noisy
Vias along signal lines.
Provides easy return path for high frequency current. Arises from capacitive coupling between signal line and ground planes.
Decoupling capacitor close to amplifier output.
Minimizes return current path length and current loop area.
A few details about high frequency amplifier circuit design Ground plane cutouts.
Reduces stray capacitance on amplifier inputs. Very sensitive, a few pF can lead to instabilities.
SLIDE 14
Medium frequency High frequency
SLIDE 15
Planned work:
- Submit design for manufacturing
- Order components
- Assemble
- Test and debug
Design available on github: https://github.com/nup002/pmt_driver 15
SLIDE 16
Thanks!
16
SLIDE 17
BACKUP
SLIDE 18
SLIDE 19
SLIDE 20
SLIDE 21
SLIDE 22
SLIDE 23
SLIDE 24