PERFORMANCE ANALYSIS OF OPENFLOW HARDWARE Michiel Appelman Maikel - - PowerPoint PPT Presentation

performance analysis of openflow hardware
SMART_READER_LITE
LIVE PREVIEW

PERFORMANCE ANALYSIS OF OPENFLOW HARDWARE Michiel Appelman Maikel - - PowerPoint PPT Presentation

PERFORMANCE ANALYSIS OF OPENFLOW HARDWARE Michiel Appelman Maikel de Boer Supervisor: Ronald van der Pol (SARA) PERFORMANCE ANALYSIS OF OPENFLOW HARDWARE Michiel Appelman Maikel de Boer Supervisor: Ronald van der Pol (SARA) AGENDA


slide-1
SLIDE 1

PERFORMANCE ANALYSIS OF OPENFLOW HARDWARE

Michiel Appelman Maikel de Boer Supervisor: Ronald van der Pol (SARA)

slide-2
SLIDE 2

PERFORMANCE ANALYSIS OF OPENFLOW HARDWARE

Michiel Appelman Maikel de Boer Supervisor: Ronald van der Pol (SARA)

slide-3
SLIDE 3

AGENDA

3

  • Experiments
  • Installing flows
  • Performance overhead
  • Lookup procedure
  • Failover speed
  • DoS controller
  • Conclusion
  • Questions
  • Presentation approximately 20 minutes
  • Questions approximately 5 minutes
  • 21 slides
slide-4
SLIDE 4

4

RESEARCH QUESTION

“How can the scalability of OpenFlow switches be explained by their hardware design?”

slide-5
SLIDE 5

EXPERIMENTS

Hardware

5

  • Pronto 3290
  • Xorplus
  • Pica8
  • Open vSwitch
  • NetFPGA Gigabit Card
  • Anritsu MD1230A Ethernet Traffic Tester
slide-6
SLIDE 6

EXPERIMENTS

Installing flows

6

  • Types of flows
  • Initial hand-shake
  • Install flows rapidly

Switch Controller

(OpenFlow packets exchanged) Hello Hello Features Request Features Reply Vendor Error Flow Mod Connect() Listen() Request to delete all excising flows

slide-7
SLIDE 7

EXPERIMENTS

Installing flows

7

Pica8 OpenFlow NetFPGA Install 1 linear flow Install 1 hash flow 4.3 ms 0.8 ms 2.0 ms 6.1 ms

Three tries installing the maximum amount of flows

slide-8
SLIDE 8

EXPERIMENTS

Performance overhead

8

  • Does OpenFlow add a big amount of latency when switching?
slide-9
SLIDE 9

EXPERIMENTS

Performance overhead

9

Port 4 to port 3 Port 3 to port 4 Max Min 7.1 µs 7.7 µs 6.4 µs 7.1 µs

slide-10
SLIDE 10

EXPERIMENTS

Performance overhead

10

  • Test packet send from Anritsu is not

recognized

  • 4 bytes are added

A B C D E

A) Anritsu B) Ethernet hub C) Laptop running Wireshark D) OpenFlow switch E) OpenFlow controller

slide-11
SLIDE 11

EXPERIMENTS

Performance overhead

11

Frame 2: 60 bytes on wire (480 bits), 60 bytes captured (480 bits) Ethernet II, Src: Beckhoff_03:00:00 (00:01:05:03:00:00), Dst: Beckhoff_04:00:00 (00:01:05:04:00:00) Internet Protocol Version 4, Src: 10.1.5.3 (10.1.5.3), Dst: 10.1.5.4 (10.1.5.4) Data (26 bytes) 0000 00 01 05 04 00 00 00 01 05 03 00 00 08 00 45 00 0010 00 2e 00 00 40 00 40 00 1c c8 0a 01 05 03 0a 01 0020 05 04 f6 f6 28 28 00 0c ff 83 df 17 32 09 4e d1 0030 e7 cd d6 31 00 dc 8c 70 00 01 9c 89

Send from Anritsu

slide-12
SLIDE 12

EXPERIMENTS

Performance overhead

12

Frame 3: 68 bytes on wire (544 bits), 68 bytes captured (544 bits) Ethernet II, Src: Beckhoff_03:00:00 (00:01:05:03:00:00), Dst: Beckhoff_04:00:00 (00:01:05:04:00:00) Internet Protocol Version 4, Src: 10.1.5.3 (10.1.5.3), Dst: 10.1.5.4 (10.1.5.4) Data (26 bytes) 0000 00 01 05 04 00 00 00 01 05 03 00 00 08 00 45 00 0010 00 2e 00 00 40 00 40 00 1c c8 0a 01 05 03 0a 01 0020 05 04 f6 f6 28 28 00 0c ff 83 df 17 32 09 4e d1 0030 e7 cd d6 31 00 dc 8c 70 00 01 9c 89 30 6a da fd 0040 1c df 44 21

Received at laptop

slide-13
SLIDE 13

EXPERIMENTS

Lookup procedure

13

  • Throughput and latency with different

frame sizes

NetFPGA Pica8 Open vSwitch 99.9% 100.0% 100.0%

4.5 1 2

3

4 Frame size (bytes) Latency (µs) 64 256 512 1024 1280 1518

slide-14
SLIDE 14

EXPERIMENTS

Failover speed

14

  • Mid-stream path switch
  • Implications

✓Frame loss ✓Latency

  • One measurement per second...

A B

1 1 2 2 3 3

slide-15
SLIDE 15

EXPERIMENTS

Failover speed

15

  • Mid-stream path switch
  • Implications

✓Frame loss ✓Latency

  • One measurement per second...

A B

1 1 2 2 3 3

slide-16
SLIDE 16

EXPERIMENTS

Failover speed

16

NetFPGA Pronto Pica8 Pronto Open vSwitch Frame loss Sequence errors 122

  • 1,740 - 1,898

1 7.952

100,000,000 frames sent at supported line rate

slide-17
SLIDE 17

EXPERIMENTS

DoS controller

17

  • The controller becomes a critical and

maybe vulnerable component

  • Is it possible to flood the controller?
slide-18
SLIDE 18

EXPERIMENTS

DoS controller

18

NetFPGA ProntoPica8 No traffic Random stream 1.37 ms 8.50 ms 16.74 ms

N/A

slide-19
SLIDE 19

CONCLUSION

Results

19

  • 1. Hardware design of ToR switches not yet optimized for OpenFlow
  • 2. Pronto adds unnecessary Ethernet trailer to frame
  • 3. Pronto unable to forward ARP when flooded with unknown flows
slide-20
SLIDE 20

CONCLUSION

Recommendations

20

  • Development ongoing
  • Interoperability between versions an issue
  • Benchmarking not an easy task...
slide-21
SLIDE 21

QUESTIONS?

21